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[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
1 /*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a7795-sysc.h>
14
15 / {
16 compatible = "renesas,r8a7795";
17 #address-cells = <2>;
18 #size-cells = <2>;
19
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &i2c4;
26 i2c5 = &i2c5;
27 i2c6 = &i2c6;
28 };
29
30 psci {
31 compatible = "arm,psci-0.2";
32 method = "smc";
33 };
34
35 cpus {
36 #address-cells = <1>;
37 #size-cells = <0>;
38
39 a57_0: cpu@0 {
40 compatible = "arm,cortex-a57", "arm,armv8";
41 reg = <0x0>;
42 device_type = "cpu";
43 power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
44 next-level-cache = <&L2_CA57>;
45 enable-method = "psci";
46 };
47
48 a57_1: cpu@1 {
49 compatible = "arm,cortex-a57","arm,armv8";
50 reg = <0x1>;
51 device_type = "cpu";
52 power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
53 next-level-cache = <&L2_CA57>;
54 enable-method = "psci";
55 };
56
57 a57_2: cpu@2 {
58 compatible = "arm,cortex-a57","arm,armv8";
59 reg = <0x2>;
60 device_type = "cpu";
61 power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
62 next-level-cache = <&L2_CA57>;
63 enable-method = "psci";
64 };
65
66 a57_3: cpu@3 {
67 compatible = "arm,cortex-a57","arm,armv8";
68 reg = <0x3>;
69 device_type = "cpu";
70 power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
71 next-level-cache = <&L2_CA57>;
72 enable-method = "psci";
73 };
74
75 L2_CA57: cache-controller@0 {
76 compatible = "cache";
77 reg = <0>;
78 power-domains = <&sysc R8A7795_PD_CA57_SCU>;
79 cache-unified;
80 cache-level = <2>;
81 };
82
83 L2_CA53: cache-controller@100 {
84 compatible = "cache";
85 reg = <0x100>;
86 power-domains = <&sysc R8A7795_PD_CA53_SCU>;
87 cache-unified;
88 cache-level = <2>;
89 };
90 };
91
92 extal_clk: extal {
93 compatible = "fixed-clock";
94 #clock-cells = <0>;
95 /* This value must be overridden by the board */
96 clock-frequency = <0>;
97 };
98
99 extalr_clk: extalr {
100 compatible = "fixed-clock";
101 #clock-cells = <0>;
102 /* This value must be overridden by the board */
103 clock-frequency = <0>;
104 };
105
106 /*
107 * The external audio clocks are configured as 0 Hz fixed frequency
108 * clocks by default.
109 * Boards that provide audio clocks should override them.
110 */
111 audio_clk_a: audio_clk_a {
112 compatible = "fixed-clock";
113 #clock-cells = <0>;
114 clock-frequency = <0>;
115 };
116
117 audio_clk_b: audio_clk_b {
118 compatible = "fixed-clock";
119 #clock-cells = <0>;
120 clock-frequency = <0>;
121 };
122
123 audio_clk_c: audio_clk_c {
124 compatible = "fixed-clock";
125 #clock-cells = <0>;
126 clock-frequency = <0>;
127 };
128
129 /* External CAN clock - to be overridden by boards that provide it */
130 can_clk: can {
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 clock-frequency = <0>;
134 };
135
136 /* External SCIF clock - to be overridden by boards that provide it */
137 scif_clk: scif {
138 compatible = "fixed-clock";
139 #clock-cells = <0>;
140 clock-frequency = <0>;
141 };
142
143 /* External PCIe clock - can be overridden by the board */
144 pcie_bus_clk: pcie_bus {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 clock-frequency = <0>;
148 };
149
150 soc {
151 compatible = "simple-bus";
152 interrupt-parent = <&gic>;
153
154 #address-cells = <2>;
155 #size-cells = <2>;
156 ranges;
157
158 gic: interrupt-controller@f1010000 {
159 compatible = "arm,gic-400";
160 #interrupt-cells = <3>;
161 #address-cells = <0>;
162 interrupt-controller;
163 reg = <0x0 0xf1010000 0 0x1000>,
164 <0x0 0xf1020000 0 0x20000>,
165 <0x0 0xf1040000 0 0x20000>,
166 <0x0 0xf1060000 0 0x20000>;
167 interrupts = <GIC_PPI 9
168 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
169 };
170
171 wdt0: watchdog@e6020000 {
172 compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
173 reg = <0 0xe6020000 0 0x0c>;
174 clocks = <&cpg CPG_MOD 402>;
175 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
176 status = "disabled";
177 };
178
179 gpio0: gpio@e6050000 {
180 compatible = "renesas,gpio-r8a7795",
181 "renesas,gpio-rcar";
182 reg = <0 0xe6050000 0 0x50>;
183 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
184 #gpio-cells = <2>;
185 gpio-controller;
186 gpio-ranges = <&pfc 0 0 16>;
187 #interrupt-cells = <2>;
188 interrupt-controller;
189 clocks = <&cpg CPG_MOD 912>;
190 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
191 };
192
193 gpio1: gpio@e6051000 {
194 compatible = "renesas,gpio-r8a7795",
195 "renesas,gpio-rcar";
196 reg = <0 0xe6051000 0 0x50>;
197 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
198 #gpio-cells = <2>;
199 gpio-controller;
200 gpio-ranges = <&pfc 0 32 28>;
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 clocks = <&cpg CPG_MOD 911>;
204 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
205 };
206
207 gpio2: gpio@e6052000 {
208 compatible = "renesas,gpio-r8a7795",
209 "renesas,gpio-rcar";
210 reg = <0 0xe6052000 0 0x50>;
211 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
212 #gpio-cells = <2>;
213 gpio-controller;
214 gpio-ranges = <&pfc 0 64 15>;
215 #interrupt-cells = <2>;
216 interrupt-controller;
217 clocks = <&cpg CPG_MOD 910>;
218 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
219 };
220
221 gpio3: gpio@e6053000 {
222 compatible = "renesas,gpio-r8a7795",
223 "renesas,gpio-rcar";
224 reg = <0 0xe6053000 0 0x50>;
225 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
226 #gpio-cells = <2>;
227 gpio-controller;
228 gpio-ranges = <&pfc 0 96 16>;
229 #interrupt-cells = <2>;
230 interrupt-controller;
231 clocks = <&cpg CPG_MOD 909>;
232 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
233 };
234
235 gpio4: gpio@e6054000 {
236 compatible = "renesas,gpio-r8a7795",
237 "renesas,gpio-rcar";
238 reg = <0 0xe6054000 0 0x50>;
239 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
240 #gpio-cells = <2>;
241 gpio-controller;
242 gpio-ranges = <&pfc 0 128 18>;
243 #interrupt-cells = <2>;
244 interrupt-controller;
245 clocks = <&cpg CPG_MOD 908>;
246 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
247 };
248
249 gpio5: gpio@e6055000 {
250 compatible = "renesas,gpio-r8a7795",
251 "renesas,gpio-rcar";
252 reg = <0 0xe6055000 0 0x50>;
253 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
254 #gpio-cells = <2>;
255 gpio-controller;
256 gpio-ranges = <&pfc 0 160 26>;
257 #interrupt-cells = <2>;
258 interrupt-controller;
259 clocks = <&cpg CPG_MOD 907>;
260 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
261 };
262
263 gpio6: gpio@e6055400 {
264 compatible = "renesas,gpio-r8a7795",
265 "renesas,gpio-rcar";
266 reg = <0 0xe6055400 0 0x50>;
267 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
268 #gpio-cells = <2>;
269 gpio-controller;
270 gpio-ranges = <&pfc 0 192 32>;
271 #interrupt-cells = <2>;
272 interrupt-controller;
273 clocks = <&cpg CPG_MOD 906>;
274 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
275 };
276
277 gpio7: gpio@e6055800 {
278 compatible = "renesas,gpio-r8a7795",
279 "renesas,gpio-rcar";
280 reg = <0 0xe6055800 0 0x50>;
281 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
282 #gpio-cells = <2>;
283 gpio-controller;
284 gpio-ranges = <&pfc 0 224 4>;
285 #interrupt-cells = <2>;
286 interrupt-controller;
287 clocks = <&cpg CPG_MOD 905>;
288 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
289 };
290
291 pmu_a57 {
292 compatible = "arm,cortex-a57-pmu";
293 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
294 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
295 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
296 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
297 interrupt-affinity = <&a57_0>,
298 <&a57_1>,
299 <&a57_2>,
300 <&a57_3>;
301 };
302
303 timer {
304 compatible = "arm,armv8-timer";
305 interrupts = <GIC_PPI 13
306 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
307 <GIC_PPI 14
308 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
309 <GIC_PPI 11
310 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
311 <GIC_PPI 10
312 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
313 };
314
315 cpg: clock-controller@e6150000 {
316 compatible = "renesas,r8a7795-cpg-mssr";
317 reg = <0 0xe6150000 0 0x1000>;
318 clocks = <&extal_clk>, <&extalr_clk>;
319 clock-names = "extal", "extalr";
320 #clock-cells = <2>;
321 #power-domain-cells = <0>;
322 };
323
324 rst: reset-controller@e6160000 {
325 compatible = "renesas,r8a7795-rst";
326 reg = <0 0xe6160000 0 0x0200>;
327 };
328
329 prr: chipid@fff00044 {
330 compatible = "renesas,prr";
331 reg = <0 0xfff00044 0 4>;
332 };
333
334 sysc: system-controller@e6180000 {
335 compatible = "renesas,r8a7795-sysc";
336 reg = <0 0xe6180000 0 0x0400>;
337 #power-domain-cells = <1>;
338 };
339
340 audma0: dma-controller@ec700000 {
341 compatible = "renesas,dmac-r8a7795",
342 "renesas,rcar-dmac";
343 reg = <0 0xec700000 0 0x10000>;
344 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
351 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
352 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
353 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
354 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
355 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
356 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
357 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
358 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
359 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
360 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
361 interrupt-names = "error",
362 "ch0", "ch1", "ch2", "ch3",
363 "ch4", "ch5", "ch6", "ch7",
364 "ch8", "ch9", "ch10", "ch11",
365 "ch12", "ch13", "ch14", "ch15";
366 clocks = <&cpg CPG_MOD 502>;
367 clock-names = "fck";
368 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
369 #dma-cells = <1>;
370 dma-channels = <16>;
371 };
372
373 audma1: dma-controller@ec720000 {
374 compatible = "renesas,dmac-r8a7795",
375 "renesas,rcar-dmac";
376 reg = <0 0xec720000 0 0x10000>;
377 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
380 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
381 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
382 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
383 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
384 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
385 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
386 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
387 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
394 interrupt-names = "error",
395 "ch0", "ch1", "ch2", "ch3",
396 "ch4", "ch5", "ch6", "ch7",
397 "ch8", "ch9", "ch10", "ch11",
398 "ch12", "ch13", "ch14", "ch15";
399 clocks = <&cpg CPG_MOD 501>;
400 clock-names = "fck";
401 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
402 #dma-cells = <1>;
403 dma-channels = <16>;
404 };
405
406 pfc: pfc@e6060000 {
407 compatible = "renesas,pfc-r8a7795";
408 reg = <0 0xe6060000 0 0x50c>;
409 };
410
411 intc_ex: interrupt-controller@e61c0000 {
412 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
413 #interrupt-cells = <2>;
414 interrupt-controller;
415 reg = <0 0xe61c0000 0 0x200>;
416 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
417 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
418 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
419 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
420 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
422 clocks = <&cpg CPG_MOD 407>;
423 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
424 };
425
426 dmac0: dma-controller@e6700000 {
427 compatible = "renesas,dmac-r8a7795",
428 "renesas,rcar-dmac";
429 reg = <0 0xe6700000 0 0x10000>;
430 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
442 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
443 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
444 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
445 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
446 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
447 interrupt-names = "error",
448 "ch0", "ch1", "ch2", "ch3",
449 "ch4", "ch5", "ch6", "ch7",
450 "ch8", "ch9", "ch10", "ch11",
451 "ch12", "ch13", "ch14", "ch15";
452 clocks = <&cpg CPG_MOD 219>;
453 clock-names = "fck";
454 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
455 #dma-cells = <1>;
456 dma-channels = <16>;
457 };
458
459 dmac1: dma-controller@e7300000 {
460 compatible = "renesas,dmac-r8a7795",
461 "renesas,rcar-dmac";
462 reg = <0 0xe7300000 0 0x10000>;
463 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
473 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
474 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
475 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
476 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
477 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
478 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
479 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
480 interrupt-names = "error",
481 "ch0", "ch1", "ch2", "ch3",
482 "ch4", "ch5", "ch6", "ch7",
483 "ch8", "ch9", "ch10", "ch11",
484 "ch12", "ch13", "ch14", "ch15";
485 clocks = <&cpg CPG_MOD 218>;
486 clock-names = "fck";
487 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
488 #dma-cells = <1>;
489 dma-channels = <16>;
490 };
491
492 dmac2: dma-controller@e7310000 {
493 compatible = "renesas,dmac-r8a7795",
494 "renesas,rcar-dmac";
495 reg = <0 0xe7310000 0 0x10000>;
496 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
497 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
498 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
499 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
500 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
501 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
502 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
503 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
504 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
505 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
506 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
507 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
508 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
509 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
510 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
511 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
512 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
513 interrupt-names = "error",
514 "ch0", "ch1", "ch2", "ch3",
515 "ch4", "ch5", "ch6", "ch7",
516 "ch8", "ch9", "ch10", "ch11",
517 "ch12", "ch13", "ch14", "ch15";
518 clocks = <&cpg CPG_MOD 217>;
519 clock-names = "fck";
520 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
521 #dma-cells = <1>;
522 dma-channels = <16>;
523 };
524
525 avb: ethernet@e6800000 {
526 compatible = "renesas,etheravb-r8a7795",
527 "renesas,etheravb-rcar-gen3";
528 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
529 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
530 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
531 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
532 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
535 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
536 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
547 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
548 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
549 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
550 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
552 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
553 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
554 interrupt-names = "ch0", "ch1", "ch2", "ch3",
555 "ch4", "ch5", "ch6", "ch7",
556 "ch8", "ch9", "ch10", "ch11",
557 "ch12", "ch13", "ch14", "ch15",
558 "ch16", "ch17", "ch18", "ch19",
559 "ch20", "ch21", "ch22", "ch23",
560 "ch24";
561 clocks = <&cpg CPG_MOD 812>;
562 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
563 phy-mode = "rgmii-id";
564 #address-cells = <1>;
565 #size-cells = <0>;
566 };
567
568 can0: can@e6c30000 {
569 compatible = "renesas,can-r8a7795",
570 "renesas,rcar-gen3-can";
571 reg = <0 0xe6c30000 0 0x1000>;
572 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
573 clocks = <&cpg CPG_MOD 916>,
574 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
575 <&can_clk>;
576 clock-names = "clkp1", "clkp2", "can_clk";
577 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
578 assigned-clock-rates = <40000000>;
579 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
580 status = "disabled";
581 };
582
583 can1: can@e6c38000 {
584 compatible = "renesas,can-r8a7795",
585 "renesas,rcar-gen3-can";
586 reg = <0 0xe6c38000 0 0x1000>;
587 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
588 clocks = <&cpg CPG_MOD 915>,
589 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
590 <&can_clk>;
591 clock-names = "clkp1", "clkp2", "can_clk";
592 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
593 assigned-clock-rates = <40000000>;
594 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
595 status = "disabled";
596 };
597
598 canfd: can@e66c0000 {
599 compatible = "renesas,r8a7795-canfd",
600 "renesas,rcar-gen3-canfd";
601 reg = <0 0xe66c0000 0 0x8000>;
602 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
603 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
604 clocks = <&cpg CPG_MOD 914>,
605 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
606 <&can_clk>;
607 clock-names = "fck", "canfd", "can_clk";
608 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
609 assigned-clock-rates = <40000000>;
610 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
611 status = "disabled";
612
613 channel0 {
614 status = "disabled";
615 };
616
617 channel1 {
618 status = "disabled";
619 };
620 };
621
622 hscif0: serial@e6540000 {
623 compatible = "renesas,hscif-r8a7795",
624 "renesas,rcar-gen3-hscif",
625 "renesas,hscif";
626 reg = <0 0xe6540000 0 96>;
627 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
628 clocks = <&cpg CPG_MOD 520>,
629 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
630 <&scif_clk>;
631 clock-names = "fck", "brg_int", "scif_clk";
632 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
633 dma-names = "tx", "rx";
634 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
635 status = "disabled";
636 };
637
638 hscif1: serial@e6550000 {
639 compatible = "renesas,hscif-r8a7795",
640 "renesas,rcar-gen3-hscif",
641 "renesas,hscif";
642 reg = <0 0xe6550000 0 96>;
643 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
644 clocks = <&cpg CPG_MOD 519>,
645 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
646 <&scif_clk>;
647 clock-names = "fck", "brg_int", "scif_clk";
648 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
649 dma-names = "tx", "rx";
650 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
651 status = "disabled";
652 };
653
654 hscif2: serial@e6560000 {
655 compatible = "renesas,hscif-r8a7795",
656 "renesas,rcar-gen3-hscif",
657 "renesas,hscif";
658 reg = <0 0xe6560000 0 96>;
659 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
660 clocks = <&cpg CPG_MOD 518>,
661 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
662 <&scif_clk>;
663 clock-names = "fck", "brg_int", "scif_clk";
664 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
665 dma-names = "tx", "rx";
666 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
667 status = "disabled";
668 };
669
670 hscif3: serial@e66a0000 {
671 compatible = "renesas,hscif-r8a7795",
672 "renesas,rcar-gen3-hscif",
673 "renesas,hscif";
674 reg = <0 0xe66a0000 0 96>;
675 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
676 clocks = <&cpg CPG_MOD 517>,
677 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
678 <&scif_clk>;
679 clock-names = "fck", "brg_int", "scif_clk";
680 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
681 dma-names = "tx", "rx";
682 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
683 status = "disabled";
684 };
685
686 hscif4: serial@e66b0000 {
687 compatible = "renesas,hscif-r8a7795",
688 "renesas,rcar-gen3-hscif",
689 "renesas,hscif";
690 reg = <0 0xe66b0000 0 96>;
691 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
692 clocks = <&cpg CPG_MOD 516>,
693 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
694 <&scif_clk>;
695 clock-names = "fck", "brg_int", "scif_clk";
696 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
697 dma-names = "tx", "rx";
698 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
699 status = "disabled";
700 };
701
702 scif0: serial@e6e60000 {
703 compatible = "renesas,scif-r8a7795",
704 "renesas,rcar-gen3-scif", "renesas,scif";
705 reg = <0 0xe6e60000 0 64>;
706 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
707 clocks = <&cpg CPG_MOD 207>,
708 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
709 <&scif_clk>;
710 clock-names = "fck", "brg_int", "scif_clk";
711 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
712 dma-names = "tx", "rx";
713 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
714 status = "disabled";
715 };
716
717 scif1: serial@e6e68000 {
718 compatible = "renesas,scif-r8a7795",
719 "renesas,rcar-gen3-scif", "renesas,scif";
720 reg = <0 0xe6e68000 0 64>;
721 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
722 clocks = <&cpg CPG_MOD 206>,
723 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
724 <&scif_clk>;
725 clock-names = "fck", "brg_int", "scif_clk";
726 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
727 dma-names = "tx", "rx";
728 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
729 status = "disabled";
730 };
731
732 scif2: serial@e6e88000 {
733 compatible = "renesas,scif-r8a7795",
734 "renesas,rcar-gen3-scif", "renesas,scif";
735 reg = <0 0xe6e88000 0 64>;
736 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
737 clocks = <&cpg CPG_MOD 310>,
738 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
739 <&scif_clk>;
740 clock-names = "fck", "brg_int", "scif_clk";
741 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
742 dma-names = "tx", "rx";
743 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
744 status = "disabled";
745 };
746
747 scif3: serial@e6c50000 {
748 compatible = "renesas,scif-r8a7795",
749 "renesas,rcar-gen3-scif", "renesas,scif";
750 reg = <0 0xe6c50000 0 64>;
751 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
752 clocks = <&cpg CPG_MOD 204>,
753 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
754 <&scif_clk>;
755 clock-names = "fck", "brg_int", "scif_clk";
756 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
757 dma-names = "tx", "rx";
758 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
759 status = "disabled";
760 };
761
762 scif4: serial@e6c40000 {
763 compatible = "renesas,scif-r8a7795",
764 "renesas,rcar-gen3-scif", "renesas,scif";
765 reg = <0 0xe6c40000 0 64>;
766 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
767 clocks = <&cpg CPG_MOD 203>,
768 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
769 <&scif_clk>;
770 clock-names = "fck", "brg_int", "scif_clk";
771 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
772 dma-names = "tx", "rx";
773 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
774 status = "disabled";
775 };
776
777 scif5: serial@e6f30000 {
778 compatible = "renesas,scif-r8a7795",
779 "renesas,rcar-gen3-scif", "renesas,scif";
780 reg = <0 0xe6f30000 0 64>;
781 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
782 clocks = <&cpg CPG_MOD 202>,
783 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
784 <&scif_clk>;
785 clock-names = "fck", "brg_int", "scif_clk";
786 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
787 dma-names = "tx", "rx";
788 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
789 status = "disabled";
790 };
791
792 i2c0: i2c@e6500000 {
793 #address-cells = <1>;
794 #size-cells = <0>;
795 compatible = "renesas,i2c-r8a7795";
796 reg = <0 0xe6500000 0 0x40>;
797 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&cpg CPG_MOD 931>;
799 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
800 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
801 dma-names = "tx", "rx";
802 i2c-scl-internal-delay-ns = <110>;
803 status = "disabled";
804 };
805
806 i2c1: i2c@e6508000 {
807 #address-cells = <1>;
808 #size-cells = <0>;
809 compatible = "renesas,i2c-r8a7795";
810 reg = <0 0xe6508000 0 0x40>;
811 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
812 clocks = <&cpg CPG_MOD 930>;
813 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
814 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
815 dma-names = "tx", "rx";
816 i2c-scl-internal-delay-ns = <6>;
817 status = "disabled";
818 };
819
820 i2c2: i2c@e6510000 {
821 #address-cells = <1>;
822 #size-cells = <0>;
823 compatible = "renesas,i2c-r8a7795";
824 reg = <0 0xe6510000 0 0x40>;
825 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
826 clocks = <&cpg CPG_MOD 929>;
827 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
828 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
829 dma-names = "tx", "rx";
830 i2c-scl-internal-delay-ns = <6>;
831 status = "disabled";
832 };
833
834 i2c3: i2c@e66d0000 {
835 #address-cells = <1>;
836 #size-cells = <0>;
837 compatible = "renesas,i2c-r8a7795";
838 reg = <0 0xe66d0000 0 0x40>;
839 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
840 clocks = <&cpg CPG_MOD 928>;
841 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
842 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
843 dma-names = "tx", "rx";
844 i2c-scl-internal-delay-ns = <110>;
845 status = "disabled";
846 };
847
848 i2c4: i2c@e66d8000 {
849 #address-cells = <1>;
850 #size-cells = <0>;
851 compatible = "renesas,i2c-r8a7795";
852 reg = <0 0xe66d8000 0 0x40>;
853 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
854 clocks = <&cpg CPG_MOD 927>;
855 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
856 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
857 dma-names = "tx", "rx";
858 i2c-scl-internal-delay-ns = <110>;
859 status = "disabled";
860 };
861
862 i2c5: i2c@e66e0000 {
863 #address-cells = <1>;
864 #size-cells = <0>;
865 compatible = "renesas,i2c-r8a7795";
866 reg = <0 0xe66e0000 0 0x40>;
867 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&cpg CPG_MOD 919>;
869 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
870 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
871 dma-names = "tx", "rx";
872 i2c-scl-internal-delay-ns = <110>;
873 status = "disabled";
874 };
875
876 i2c6: i2c@e66e8000 {
877 #address-cells = <1>;
878 #size-cells = <0>;
879 compatible = "renesas,i2c-r8a7795";
880 reg = <0 0xe66e8000 0 0x40>;
881 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
882 clocks = <&cpg CPG_MOD 918>;
883 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
884 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
885 dma-names = "tx", "rx";
886 i2c-scl-internal-delay-ns = <6>;
887 status = "disabled";
888 };
889
890 rcar_sound: sound@ec500000 {
891 /*
892 * #sound-dai-cells is required
893 *
894 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
895 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
896 */
897 /*
898 * #clock-cells is required for audio_clkout0/1/2/3
899 *
900 * clkout : #clock-cells = <0>; <&rcar_sound>;
901 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
902 */
903 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
904 reg = <0 0xec500000 0 0x1000>, /* SCU */
905 <0 0xec5a0000 0 0x100>, /* ADG */
906 <0 0xec540000 0 0x1000>, /* SSIU */
907 <0 0xec541000 0 0x280>, /* SSI */
908 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
909 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
910
911 clocks = <&cpg CPG_MOD 1005>,
912 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
913 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
914 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
915 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
916 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
917 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
918 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
919 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
920 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
921 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
922 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
923 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
924 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
925 <&audio_clk_a>, <&audio_clk_b>,
926 <&audio_clk_c>,
927 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
928 clock-names = "ssi-all",
929 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
930 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
931 "ssi.1", "ssi.0",
932 "src.9", "src.8", "src.7", "src.6",
933 "src.5", "src.4", "src.3", "src.2",
934 "src.1", "src.0",
935 "mix.1", "mix.0",
936 "ctu.1", "ctu.0",
937 "dvc.0", "dvc.1",
938 "clk_a", "clk_b", "clk_c", "clk_i";
939 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
940 status = "disabled";
941
942 rcar_sound,dvc {
943 dvc0: dvc-0 {
944 dmas = <&audma0 0xbc>;
945 dma-names = "tx";
946 };
947 dvc1: dvc-1 {
948 dmas = <&audma0 0xbe>;
949 dma-names = "tx";
950 };
951 };
952
953 rcar_sound,mix {
954 mix0: mix-0 { };
955 mix1: mix-1 { };
956 };
957
958 rcar_sound,ctu {
959 ctu00: ctu-0 { };
960 ctu01: ctu-1 { };
961 ctu02: ctu-2 { };
962 ctu03: ctu-3 { };
963 ctu10: ctu-4 { };
964 ctu11: ctu-5 { };
965 ctu12: ctu-6 { };
966 ctu13: ctu-7 { };
967 };
968
969 rcar_sound,src {
970 src0: src-0 {
971 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
972 dmas = <&audma0 0x85>, <&audma1 0x9a>;
973 dma-names = "rx", "tx";
974 };
975 src1: src-1 {
976 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
977 dmas = <&audma0 0x87>, <&audma1 0x9c>;
978 dma-names = "rx", "tx";
979 };
980 src2: src-2 {
981 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
982 dmas = <&audma0 0x89>, <&audma1 0x9e>;
983 dma-names = "rx", "tx";
984 };
985 src3: src-3 {
986 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
987 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
988 dma-names = "rx", "tx";
989 };
990 src4: src-4 {
991 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
992 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
993 dma-names = "rx", "tx";
994 };
995 src5: src-5 {
996 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
997 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
998 dma-names = "rx", "tx";
999 };
1000 src6: src-6 {
1001 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1002 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1003 dma-names = "rx", "tx";
1004 };
1005 src7: src-7 {
1006 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1007 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1008 dma-names = "rx", "tx";
1009 };
1010 src8: src-8 {
1011 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1012 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1013 dma-names = "rx", "tx";
1014 };
1015 src9: src-9 {
1016 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1017 dmas = <&audma0 0x97>, <&audma1 0xba>;
1018 dma-names = "rx", "tx";
1019 };
1020 };
1021
1022 rcar_sound,ssi {
1023 ssi0: ssi-0 {
1024 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1025 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1026 dma-names = "rx", "tx", "rxu", "txu";
1027 };
1028 ssi1: ssi-1 {
1029 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1030 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1031 dma-names = "rx", "tx", "rxu", "txu";
1032 };
1033 ssi2: ssi-2 {
1034 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1035 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1036 dma-names = "rx", "tx", "rxu", "txu";
1037 };
1038 ssi3: ssi-3 {
1039 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1040 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1041 dma-names = "rx", "tx", "rxu", "txu";
1042 };
1043 ssi4: ssi-4 {
1044 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1045 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1046 dma-names = "rx", "tx", "rxu", "txu";
1047 };
1048 ssi5: ssi-5 {
1049 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1050 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1051 dma-names = "rx", "tx", "rxu", "txu";
1052 };
1053 ssi6: ssi-6 {
1054 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1055 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1056 dma-names = "rx", "tx", "rxu", "txu";
1057 };
1058 ssi7: ssi-7 {
1059 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1060 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1061 dma-names = "rx", "tx", "rxu", "txu";
1062 };
1063 ssi8: ssi-8 {
1064 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1065 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1066 dma-names = "rx", "tx", "rxu", "txu";
1067 };
1068 ssi9: ssi-9 {
1069 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1070 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1071 dma-names = "rx", "tx", "rxu", "txu";
1072 };
1073 };
1074 };
1075
1076 sata: sata@ee300000 {
1077 compatible = "renesas,sata-r8a7795";
1078 reg = <0 0xee300000 0 0x1fff>;
1079 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1080 clocks = <&cpg CPG_MOD 815>;
1081 status = "disabled";
1082 };
1083
1084 xhci0: usb@ee000000 {
1085 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1086 reg = <0 0xee000000 0 0xc00>;
1087 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1088 clocks = <&cpg CPG_MOD 328>;
1089 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1090 status = "disabled";
1091 };
1092
1093 xhci1: usb@ee0400000 {
1094 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1095 reg = <0 0xee040000 0 0xc00>;
1096 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1097 clocks = <&cpg CPG_MOD 327>;
1098 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1099 status = "disabled";
1100 };
1101
1102 usb_dmac0: dma-controller@e65a0000 {
1103 compatible = "renesas,r8a7795-usb-dmac",
1104 "renesas,usb-dmac";
1105 reg = <0 0xe65a0000 0 0x100>;
1106 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1107 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1108 interrupt-names = "ch0", "ch1";
1109 clocks = <&cpg CPG_MOD 330>;
1110 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1111 #dma-cells = <1>;
1112 dma-channels = <2>;
1113 };
1114
1115 usb_dmac1: dma-controller@e65b0000 {
1116 compatible = "renesas,r8a7795-usb-dmac",
1117 "renesas,usb-dmac";
1118 reg = <0 0xe65b0000 0 0x100>;
1119 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1120 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1121 interrupt-names = "ch0", "ch1";
1122 clocks = <&cpg CPG_MOD 331>;
1123 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1124 #dma-cells = <1>;
1125 dma-channels = <2>;
1126 };
1127
1128 sdhi0: sd@ee100000 {
1129 compatible = "renesas,sdhi-r8a7795";
1130 reg = <0 0xee100000 0 0x2000>;
1131 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1132 clocks = <&cpg CPG_MOD 314>;
1133 max-frequency = <200000000>;
1134 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1135 status = "disabled";
1136 };
1137
1138 sdhi1: sd@ee120000 {
1139 compatible = "renesas,sdhi-r8a7795";
1140 reg = <0 0xee120000 0 0x2000>;
1141 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1142 clocks = <&cpg CPG_MOD 313>;
1143 max-frequency = <200000000>;
1144 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1145 status = "disabled";
1146 };
1147
1148 sdhi2: sd@ee140000 {
1149 compatible = "renesas,sdhi-r8a7795";
1150 reg = <0 0xee140000 0 0x2000>;
1151 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1152 clocks = <&cpg CPG_MOD 312>;
1153 max-frequency = <200000000>;
1154 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1155 status = "disabled";
1156 };
1157
1158 sdhi3: sd@ee160000 {
1159 compatible = "renesas,sdhi-r8a7795";
1160 reg = <0 0xee160000 0 0x2000>;
1161 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1162 clocks = <&cpg CPG_MOD 311>;
1163 max-frequency = <200000000>;
1164 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1165 status = "disabled";
1166 };
1167
1168 usb2_phy0: usb-phy@ee080200 {
1169 compatible = "renesas,usb2-phy-r8a7795",
1170 "renesas,rcar-gen3-usb2-phy";
1171 reg = <0 0xee080200 0 0x700>;
1172 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1173 clocks = <&cpg CPG_MOD 703>;
1174 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1175 #phy-cells = <0>;
1176 status = "disabled";
1177 };
1178
1179 usb2_phy1: usb-phy@ee0a0200 {
1180 compatible = "renesas,usb2-phy-r8a7795",
1181 "renesas,rcar-gen3-usb2-phy";
1182 reg = <0 0xee0a0200 0 0x700>;
1183 clocks = <&cpg CPG_MOD 702>;
1184 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1185 #phy-cells = <0>;
1186 status = "disabled";
1187 };
1188
1189 usb2_phy2: usb-phy@ee0c0200 {
1190 compatible = "renesas,usb2-phy-r8a7795",
1191 "renesas,rcar-gen3-usb2-phy";
1192 reg = <0 0xee0c0200 0 0x700>;
1193 clocks = <&cpg CPG_MOD 701>;
1194 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1195 #phy-cells = <0>;
1196 status = "disabled";
1197 };
1198
1199 ehci0: usb@ee080100 {
1200 compatible = "generic-ehci";
1201 reg = <0 0xee080100 0 0x100>;
1202 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1203 clocks = <&cpg CPG_MOD 703>;
1204 phys = <&usb2_phy0>;
1205 phy-names = "usb";
1206 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1207 status = "disabled";
1208 };
1209
1210 ehci1: usb@ee0a0100 {
1211 compatible = "generic-ehci";
1212 reg = <0 0xee0a0100 0 0x100>;
1213 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1214 clocks = <&cpg CPG_MOD 702>;
1215 phys = <&usb2_phy1>;
1216 phy-names = "usb";
1217 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1218 status = "disabled";
1219 };
1220
1221 ehci2: usb@ee0c0100 {
1222 compatible = "generic-ehci";
1223 reg = <0 0xee0c0100 0 0x100>;
1224 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1225 clocks = <&cpg CPG_MOD 701>;
1226 phys = <&usb2_phy2>;
1227 phy-names = "usb";
1228 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1229 status = "disabled";
1230 };
1231
1232 ohci0: usb@ee080000 {
1233 compatible = "generic-ohci";
1234 reg = <0 0xee080000 0 0x100>;
1235 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1236 clocks = <&cpg CPG_MOD 703>;
1237 phys = <&usb2_phy0>;
1238 phy-names = "usb";
1239 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1240 status = "disabled";
1241 };
1242
1243 ohci1: usb@ee0a0000 {
1244 compatible = "generic-ohci";
1245 reg = <0 0xee0a0000 0 0x100>;
1246 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1247 clocks = <&cpg CPG_MOD 702>;
1248 phys = <&usb2_phy1>;
1249 phy-names = "usb";
1250 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1251 status = "disabled";
1252 };
1253
1254 ohci2: usb@ee0c0000 {
1255 compatible = "generic-ohci";
1256 reg = <0 0xee0c0000 0 0x100>;
1257 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MOD 701>;
1259 phys = <&usb2_phy2>;
1260 phy-names = "usb";
1261 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1262 status = "disabled";
1263 };
1264
1265 hsusb: usb@e6590000 {
1266 compatible = "renesas,usbhs-r8a7795",
1267 "renesas,rcar-gen3-usbhs";
1268 reg = <0 0xe6590000 0 0x100>;
1269 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1270 clocks = <&cpg CPG_MOD 704>;
1271 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1272 <&usb_dmac1 0>, <&usb_dmac1 1>;
1273 dma-names = "ch0", "ch1", "ch2", "ch3";
1274 renesas,buswait = <11>;
1275 phys = <&usb2_phy0>;
1276 phy-names = "usb";
1277 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1278 status = "disabled";
1279 };
1280
1281 pciec0: pcie@fe000000 {
1282 compatible = "renesas,pcie-r8a7795";
1283 reg = <0 0xfe000000 0 0x80000>;
1284 #address-cells = <3>;
1285 #size-cells = <2>;
1286 bus-range = <0x00 0xff>;
1287 device_type = "pci";
1288 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1289 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1290 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1291 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1292 /* Map all possible DDR as inbound ranges */
1293 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1294 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1295 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1296 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1297 #interrupt-cells = <1>;
1298 interrupt-map-mask = <0 0 0 0>;
1299 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1300 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1301 clock-names = "pcie", "pcie_bus";
1302 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1303 status = "disabled";
1304 };
1305
1306 pciec1: pcie@ee800000 {
1307 compatible = "renesas,pcie-r8a7795";
1308 reg = <0 0xee800000 0 0x80000>;
1309 #address-cells = <3>;
1310 #size-cells = <2>;
1311 bus-range = <0x00 0xff>;
1312 device_type = "pci";
1313 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1314 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1315 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1316 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1317 /* Map all possible DDR as inbound ranges */
1318 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1319 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1320 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1321 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1322 #interrupt-cells = <1>;
1323 interrupt-map-mask = <0 0 0 0>;
1324 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1325 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1326 clock-names = "pcie", "pcie_bus";
1327 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1328 status = "disabled";
1329 };
1330
1331 vspbc: vsp@fe920000 {
1332 compatible = "renesas,vsp2";
1333 reg = <0 0xfe920000 0 0x8000>;
1334 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1335 clocks = <&cpg CPG_MOD 624>;
1336 power-domains = <&sysc R8A7795_PD_A3VP>;
1337
1338 renesas,fcp = <&fcpvb1>;
1339 };
1340
1341 fcpvb1: fcp@fe92f000 {
1342 compatible = "renesas,fcpv";
1343 reg = <0 0xfe92f000 0 0x200>;
1344 clocks = <&cpg CPG_MOD 606>;
1345 power-domains = <&sysc R8A7795_PD_A3VP>;
1346 };
1347
1348 fcpf0: fcp@fe950000 {
1349 compatible = "renesas,fcpf";
1350 reg = <0 0xfe950000 0 0x200>;
1351 clocks = <&cpg CPG_MOD 615>;
1352 power-domains = <&sysc R8A7795_PD_A3VP>;
1353 };
1354
1355 fcpf1: fcp@fe951000 {
1356 compatible = "renesas,fcpf";
1357 reg = <0 0xfe951000 0 0x200>;
1358 clocks = <&cpg CPG_MOD 614>;
1359 power-domains = <&sysc R8A7795_PD_A3VP>;
1360 };
1361
1362 fcpf2: fcp@fe952000 {
1363 compatible = "renesas,fcpf";
1364 reg = <0 0xfe952000 0 0x200>;
1365 clocks = <&cpg CPG_MOD 613>;
1366 power-domains = <&sysc R8A7795_PD_A3VP>;
1367 };
1368
1369 vspbd: vsp@fe960000 {
1370 compatible = "renesas,vsp2";
1371 reg = <0 0xfe960000 0 0x8000>;
1372 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1373 clocks = <&cpg CPG_MOD 626>;
1374 power-domains = <&sysc R8A7795_PD_A3VP>;
1375
1376 renesas,fcp = <&fcpvb0>;
1377 };
1378
1379 fcpvb0: fcp@fe96f000 {
1380 compatible = "renesas,fcpv";
1381 reg = <0 0xfe96f000 0 0x200>;
1382 clocks = <&cpg CPG_MOD 607>;
1383 power-domains = <&sysc R8A7795_PD_A3VP>;
1384 };
1385
1386 vspi0: vsp@fe9a0000 {
1387 compatible = "renesas,vsp2";
1388 reg = <0 0xfe9a0000 0 0x8000>;
1389 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1390 clocks = <&cpg CPG_MOD 631>;
1391 power-domains = <&sysc R8A7795_PD_A3VP>;
1392
1393 renesas,fcp = <&fcpvi0>;
1394 };
1395
1396 fcpvi0: fcp@fe9af000 {
1397 compatible = "renesas,fcpv";
1398 reg = <0 0xfe9af000 0 0x200>;
1399 clocks = <&cpg CPG_MOD 611>;
1400 power-domains = <&sysc R8A7795_PD_A3VP>;
1401 };
1402
1403 vspi1: vsp@fe9b0000 {
1404 compatible = "renesas,vsp2";
1405 reg = <0 0xfe9b0000 0 0x8000>;
1406 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1407 clocks = <&cpg CPG_MOD 630>;
1408 power-domains = <&sysc R8A7795_PD_A3VP>;
1409
1410 renesas,fcp = <&fcpvi1>;
1411 };
1412
1413 fcpvi1: fcp@fe9bf000 {
1414 compatible = "renesas,fcpv";
1415 reg = <0 0xfe9bf000 0 0x200>;
1416 clocks = <&cpg CPG_MOD 610>;
1417 power-domains = <&sysc R8A7795_PD_A3VP>;
1418 };
1419
1420 vspi2: vsp@fe9c0000 {
1421 compatible = "renesas,vsp2";
1422 reg = <0 0xfe9c0000 0 0x8000>;
1423 interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1424 clocks = <&cpg CPG_MOD 629>;
1425 power-domains = <&sysc R8A7795_PD_A3VP>;
1426
1427 renesas,fcp = <&fcpvi2>;
1428 };
1429
1430 fcpvi2: fcp@fe9cf000 {
1431 compatible = "renesas,fcpv";
1432 reg = <0 0xfe9cf000 0 0x200>;
1433 clocks = <&cpg CPG_MOD 609>;
1434 power-domains = <&sysc R8A7795_PD_A3VP>;
1435 };
1436
1437 vspd0: vsp@fea20000 {
1438 compatible = "renesas,vsp2";
1439 reg = <0 0xfea20000 0 0x4000>;
1440 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1441 clocks = <&cpg CPG_MOD 623>;
1442 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1443
1444 renesas,fcp = <&fcpvd0>;
1445 };
1446
1447 fcpvd0: fcp@fea27000 {
1448 compatible = "renesas,fcpv";
1449 reg = <0 0xfea27000 0 0x200>;
1450 clocks = <&cpg CPG_MOD 603>;
1451 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1452 };
1453
1454 vspd1: vsp@fea28000 {
1455 compatible = "renesas,vsp2";
1456 reg = <0 0xfea28000 0 0x4000>;
1457 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1458 clocks = <&cpg CPG_MOD 622>;
1459 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1460
1461 renesas,fcp = <&fcpvd1>;
1462 };
1463
1464 fcpvd1: fcp@fea2f000 {
1465 compatible = "renesas,fcpv";
1466 reg = <0 0xfea2f000 0 0x200>;
1467 clocks = <&cpg CPG_MOD 602>;
1468 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1469 };
1470
1471 vspd2: vsp@fea30000 {
1472 compatible = "renesas,vsp2";
1473 reg = <0 0xfea30000 0 0x4000>;
1474 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1475 clocks = <&cpg CPG_MOD 621>;
1476 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1477
1478 renesas,fcp = <&fcpvd2>;
1479 };
1480
1481 fcpvd2: fcp@fea37000 {
1482 compatible = "renesas,fcpv";
1483 reg = <0 0xfea37000 0 0x200>;
1484 clocks = <&cpg CPG_MOD 601>;
1485 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1486 };
1487
1488 vspd3: vsp@fea38000 {
1489 compatible = "renesas,vsp2";
1490 reg = <0 0xfea38000 0 0x4000>;
1491 interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1492 clocks = <&cpg CPG_MOD 620>;
1493 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1494
1495 renesas,fcp = <&fcpvd3>;
1496 };
1497
1498 fcpvd3: fcp@fea3f000 {
1499 compatible = "renesas,fcpv";
1500 reg = <0 0xfea3f000 0 0x200>;
1501 clocks = <&cpg CPG_MOD 600>;
1502 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1503 };
1504
1505 fdp1@fe940000 {
1506 compatible = "renesas,fdp1";
1507 reg = <0 0xfe940000 0 0x2400>;
1508 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1509 clocks = <&cpg CPG_MOD 119>;
1510 power-domains = <&sysc R8A7795_PD_A3VP>;
1511 renesas,fcp = <&fcpf0>;
1512 };
1513
1514 fdp1@fe944000 {
1515 compatible = "renesas,fdp1";
1516 reg = <0 0xfe944000 0 0x2400>;
1517 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1518 clocks = <&cpg CPG_MOD 118>;
1519 power-domains = <&sysc R8A7795_PD_A3VP>;
1520 renesas,fcp = <&fcpf1>;
1521 };
1522
1523 fdp1@fe948000 {
1524 compatible = "renesas,fdp1";
1525 reg = <0 0xfe948000 0 0x2400>;
1526 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1527 clocks = <&cpg CPG_MOD 117>;
1528 power-domains = <&sysc R8A7795_PD_A3VP>;
1529 renesas,fcp = <&fcpf2>;
1530 };
1531
1532 du: display@feb00000 {
1533 compatible = "renesas,du-r8a7795";
1534 reg = <0 0xfeb00000 0 0x80000>,
1535 <0 0xfeb90000 0 0x14>;
1536 reg-names = "du", "lvds.0";
1537 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1538 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1539 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1540 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1541 clocks = <&cpg CPG_MOD 724>,
1542 <&cpg CPG_MOD 723>,
1543 <&cpg CPG_MOD 722>,
1544 <&cpg CPG_MOD 721>,
1545 <&cpg CPG_MOD 727>;
1546 clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1547 status = "disabled";
1548
1549 vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1550
1551 ports {
1552 #address-cells = <1>;
1553 #size-cells = <0>;
1554
1555 port@0 {
1556 reg = <0>;
1557 du_out_rgb: endpoint {
1558 };
1559 };
1560 port@1 {
1561 reg = <1>;
1562 du_out_hdmi0: endpoint {
1563 };
1564 };
1565 port@2 {
1566 reg = <2>;
1567 du_out_hdmi1: endpoint {
1568 };
1569 };
1570 port@3 {
1571 reg = <3>;
1572 du_out_lvds0: endpoint {
1573 };
1574 };
1575 };
1576 };
1577 };
1578 };
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