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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-artful-kernel.git] / arch / arm64 / boot / dts / renesas / r8a7795.dtsi
1 /*
2 * Device Tree Source for the r8a7795 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corp.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13
14 / {
15 compatible = "renesas,r8a7795";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 };
28
29 psci {
30 compatible = "arm,psci-0.2";
31 method = "smc";
32 };
33
34 cpus {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 a57_0: cpu@0 {
39 compatible = "arm,cortex-a57", "arm,armv8";
40 reg = <0x0>;
41 device_type = "cpu";
42 next-level-cache = <&L2_CA57>;
43 enable-method = "psci";
44 };
45
46 a57_1: cpu@1 {
47 compatible = "arm,cortex-a57","arm,armv8";
48 reg = <0x1>;
49 device_type = "cpu";
50 next-level-cache = <&L2_CA57>;
51 enable-method = "psci";
52 };
53 a57_2: cpu@2 {
54 compatible = "arm,cortex-a57","arm,armv8";
55 reg = <0x2>;
56 device_type = "cpu";
57 next-level-cache = <&L2_CA57>;
58 enable-method = "psci";
59 };
60 a57_3: cpu@3 {
61 compatible = "arm,cortex-a57","arm,armv8";
62 reg = <0x3>;
63 device_type = "cpu";
64 next-level-cache = <&L2_CA57>;
65 enable-method = "psci";
66 };
67 };
68
69 L2_CA57: cache-controller@0 {
70 compatible = "cache";
71 cache-unified;
72 cache-level = <2>;
73 };
74
75 L2_CA53: cache-controller@1 {
76 compatible = "cache";
77 cache-unified;
78 cache-level = <2>;
79 };
80
81 extal_clk: extal {
82 compatible = "fixed-clock";
83 #clock-cells = <0>;
84 /* This value must be overridden by the board */
85 clock-frequency = <0>;
86 };
87
88 extalr_clk: extalr {
89 compatible = "fixed-clock";
90 #clock-cells = <0>;
91 /* This value must be overridden by the board */
92 clock-frequency = <0>;
93 };
94
95 /*
96 * The external audio clocks are configured as 0 Hz fixed frequency
97 * clocks by default.
98 * Boards that provide audio clocks should override them.
99 */
100 audio_clk_a: audio_clk_a {
101 compatible = "fixed-clock";
102 #clock-cells = <0>;
103 clock-frequency = <0>;
104 };
105
106 audio_clk_b: audio_clk_b {
107 compatible = "fixed-clock";
108 #clock-cells = <0>;
109 clock-frequency = <0>;
110 };
111
112 audio_clk_c: audio_clk_c {
113 compatible = "fixed-clock";
114 #clock-cells = <0>;
115 clock-frequency = <0>;
116 };
117
118 /* External CAN clock - to be overridden by boards that provide it */
119 can_clk: can {
120 compatible = "fixed-clock";
121 #clock-cells = <0>;
122 clock-frequency = <0>;
123 status = "disabled";
124 };
125
126 /* External SCIF clock - to be overridden by boards that provide it */
127 scif_clk: scif {
128 compatible = "fixed-clock";
129 #clock-cells = <0>;
130 clock-frequency = <0>;
131 };
132
133 soc {
134 compatible = "simple-bus";
135 interrupt-parent = <&gic>;
136
137 #address-cells = <2>;
138 #size-cells = <2>;
139 ranges;
140
141 gic: interrupt-controller@0xf1010000 {
142 compatible = "arm,gic-400";
143 #interrupt-cells = <3>;
144 #address-cells = <0>;
145 interrupt-controller;
146 reg = <0x0 0xf1010000 0 0x1000>,
147 <0x0 0xf1020000 0 0x2000>,
148 <0x0 0xf1040000 0 0x20000>,
149 <0x0 0xf1060000 0 0x2000>;
150 interrupts = <GIC_PPI 9
151 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
152 };
153
154 gpio0: gpio@e6050000 {
155 compatible = "renesas,gpio-r8a7795",
156 "renesas,gpio-rcar";
157 reg = <0 0xe6050000 0 0x50>;
158 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
159 #gpio-cells = <2>;
160 gpio-controller;
161 gpio-ranges = <&pfc 0 0 16>;
162 #interrupt-cells = <2>;
163 interrupt-controller;
164 clocks = <&cpg CPG_MOD 912>;
165 power-domains = <&cpg>;
166 };
167
168 gpio1: gpio@e6051000 {
169 compatible = "renesas,gpio-r8a7795",
170 "renesas,gpio-rcar";
171 reg = <0 0xe6051000 0 0x50>;
172 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
173 #gpio-cells = <2>;
174 gpio-controller;
175 gpio-ranges = <&pfc 0 32 28>;
176 #interrupt-cells = <2>;
177 interrupt-controller;
178 clocks = <&cpg CPG_MOD 911>;
179 power-domains = <&cpg>;
180 };
181
182 gpio2: gpio@e6052000 {
183 compatible = "renesas,gpio-r8a7795",
184 "renesas,gpio-rcar";
185 reg = <0 0xe6052000 0 0x50>;
186 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
187 #gpio-cells = <2>;
188 gpio-controller;
189 gpio-ranges = <&pfc 0 64 15>;
190 #interrupt-cells = <2>;
191 interrupt-controller;
192 clocks = <&cpg CPG_MOD 910>;
193 power-domains = <&cpg>;
194 };
195
196 gpio3: gpio@e6053000 {
197 compatible = "renesas,gpio-r8a7795",
198 "renesas,gpio-rcar";
199 reg = <0 0xe6053000 0 0x50>;
200 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
201 #gpio-cells = <2>;
202 gpio-controller;
203 gpio-ranges = <&pfc 0 96 16>;
204 #interrupt-cells = <2>;
205 interrupt-controller;
206 clocks = <&cpg CPG_MOD 909>;
207 power-domains = <&cpg>;
208 };
209
210 gpio4: gpio@e6054000 {
211 compatible = "renesas,gpio-r8a7795",
212 "renesas,gpio-rcar";
213 reg = <0 0xe6054000 0 0x50>;
214 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
215 #gpio-cells = <2>;
216 gpio-controller;
217 gpio-ranges = <&pfc 0 128 18>;
218 #interrupt-cells = <2>;
219 interrupt-controller;
220 clocks = <&cpg CPG_MOD 908>;
221 power-domains = <&cpg>;
222 };
223
224 gpio5: gpio@e6055000 {
225 compatible = "renesas,gpio-r8a7795",
226 "renesas,gpio-rcar";
227 reg = <0 0xe6055000 0 0x50>;
228 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
229 #gpio-cells = <2>;
230 gpio-controller;
231 gpio-ranges = <&pfc 0 160 26>;
232 #interrupt-cells = <2>;
233 interrupt-controller;
234 clocks = <&cpg CPG_MOD 907>;
235 power-domains = <&cpg>;
236 };
237
238 gpio6: gpio@e6055400 {
239 compatible = "renesas,gpio-r8a7795",
240 "renesas,gpio-rcar";
241 reg = <0 0xe6055400 0 0x50>;
242 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
243 #gpio-cells = <2>;
244 gpio-controller;
245 gpio-ranges = <&pfc 0 192 32>;
246 #interrupt-cells = <2>;
247 interrupt-controller;
248 clocks = <&cpg CPG_MOD 906>;
249 power-domains = <&cpg>;
250 };
251
252 gpio7: gpio@e6055800 {
253 compatible = "renesas,gpio-r8a7795",
254 "renesas,gpio-rcar";
255 reg = <0 0xe6055800 0 0x50>;
256 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
257 #gpio-cells = <2>;
258 gpio-controller;
259 gpio-ranges = <&pfc 0 224 4>;
260 #interrupt-cells = <2>;
261 interrupt-controller;
262 clocks = <&cpg CPG_MOD 905>;
263 power-domains = <&cpg>;
264 };
265
266 pmu_a57 {
267 compatible = "arm,cortex-a57-pmu";
268 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
272 interrupt-affinity = <&a57_0>,
273 <&a57_1>,
274 <&a57_2>,
275 <&a57_3>;
276 };
277
278 timer {
279 compatible = "arm,armv8-timer";
280 interrupts = <GIC_PPI 13
281 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
282 <GIC_PPI 14
283 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
284 <GIC_PPI 11
285 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
286 <GIC_PPI 10
287 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
288 };
289
290 cpg: clock-controller@e6150000 {
291 compatible = "renesas,r8a7795-cpg-mssr";
292 reg = <0 0xe6150000 0 0x1000>;
293 clocks = <&extal_clk>, <&extalr_clk>;
294 clock-names = "extal", "extalr";
295 #clock-cells = <2>;
296 #power-domain-cells = <0>;
297 };
298
299 audma0: dma-controller@ec700000 {
300 compatible = "renesas,rcar-dmac";
301 reg = <0 0xec700000 0 0x10000>;
302 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
303 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
304 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
305 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
306 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
307 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
308 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
309 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
310 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
311 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
312 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
313 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
314 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
315 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
316 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
317 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
318 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
319 interrupt-names = "error",
320 "ch0", "ch1", "ch2", "ch3",
321 "ch4", "ch5", "ch6", "ch7",
322 "ch8", "ch9", "ch10", "ch11",
323 "ch12", "ch13", "ch14", "ch15";
324 clocks = <&cpg CPG_MOD 502>;
325 clock-names = "fck";
326 power-domains = <&cpg>;
327 #dma-cells = <1>;
328 dma-channels = <16>;
329 };
330
331 audma1: dma-controller@ec720000 {
332 compatible = "renesas,rcar-dmac";
333 reg = <0 0xec720000 0 0x10000>;
334 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
335 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
336 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
337 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
338 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
339 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
340 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
341 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
342 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
343 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
344 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
345 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
346 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
347 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
348 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
349 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
350 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
351 interrupt-names = "error",
352 "ch0", "ch1", "ch2", "ch3",
353 "ch4", "ch5", "ch6", "ch7",
354 "ch8", "ch9", "ch10", "ch11",
355 "ch12", "ch13", "ch14", "ch15";
356 clocks = <&cpg CPG_MOD 501>;
357 clock-names = "fck";
358 power-domains = <&cpg>;
359 #dma-cells = <1>;
360 dma-channels = <16>;
361 };
362
363 pfc: pfc@e6060000 {
364 compatible = "renesas,pfc-r8a7795";
365 reg = <0 0xe6060000 0 0x50c>;
366 };
367
368 intc_ex: interrupt-controller@e61c0000 {
369 compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
370 #interrupt-cells = <2>;
371 interrupt-controller;
372 reg = <0 0xe61c0000 0 0x200>;
373 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
379 clocks = <&cpg CPG_MOD 407>;
380 power-domains = <&cpg>;
381 };
382
383 dmac0: dma-controller@e6700000 {
384 compatible = "renesas,dmac-r8a7795",
385 "renesas,rcar-dmac";
386 reg = <0 0xe6700000 0 0x10000>;
387 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
388 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
389 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
390 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
391 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
392 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
393 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
394 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
395 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
396 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
404 interrupt-names = "error",
405 "ch0", "ch1", "ch2", "ch3",
406 "ch4", "ch5", "ch6", "ch7",
407 "ch8", "ch9", "ch10", "ch11",
408 "ch12", "ch13", "ch14", "ch15";
409 clocks = <&cpg CPG_MOD 219>;
410 clock-names = "fck";
411 power-domains = <&cpg>;
412 #dma-cells = <1>;
413 dma-channels = <16>;
414 };
415
416 dmac1: dma-controller@e7300000 {
417 compatible = "renesas,dmac-r8a7795",
418 "renesas,rcar-dmac";
419 reg = <0 0xe7300000 0 0x10000>;
420 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
421 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
422 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
423 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
424 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
425 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
426 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
427 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
428 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
437 interrupt-names = "error",
438 "ch0", "ch1", "ch2", "ch3",
439 "ch4", "ch5", "ch6", "ch7",
440 "ch8", "ch9", "ch10", "ch11",
441 "ch12", "ch13", "ch14", "ch15";
442 clocks = <&cpg CPG_MOD 218>;
443 clock-names = "fck";
444 power-domains = <&cpg>;
445 #dma-cells = <1>;
446 dma-channels = <16>;
447 };
448
449 dmac2: dma-controller@e7310000 {
450 compatible = "renesas,dmac-r8a7795",
451 "renesas,rcar-dmac";
452 reg = <0 0xe7310000 0 0x10000>;
453 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
454 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
455 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
456 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
457 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
458 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
459 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
460 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
461 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
462 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
463 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
470 interrupt-names = "error",
471 "ch0", "ch1", "ch2", "ch3",
472 "ch4", "ch5", "ch6", "ch7",
473 "ch8", "ch9", "ch10", "ch11",
474 "ch12", "ch13", "ch14", "ch15";
475 clocks = <&cpg CPG_MOD 217>;
476 clock-names = "fck";
477 power-domains = <&cpg>;
478 #dma-cells = <1>;
479 dma-channels = <16>;
480 };
481
482 avb: ethernet@e6800000 {
483 compatible = "renesas,etheravb-r8a7795",
484 "renesas,etheravb-rcar-gen3";
485 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
486 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
488 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
490 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
491 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
492 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
493 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
496 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
497 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
498 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
499 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
501 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
502 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
503 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
504 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
505 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
506 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
507 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
511 interrupt-names = "ch0", "ch1", "ch2", "ch3",
512 "ch4", "ch5", "ch6", "ch7",
513 "ch8", "ch9", "ch10", "ch11",
514 "ch12", "ch13", "ch14", "ch15",
515 "ch16", "ch17", "ch18", "ch19",
516 "ch20", "ch21", "ch22", "ch23",
517 "ch24";
518 clocks = <&cpg CPG_MOD 812>;
519 power-domains = <&cpg>;
520 phy-mode = "rgmii-id";
521 #address-cells = <1>;
522 #size-cells = <0>;
523 };
524
525 can0: can@e6c30000 {
526 compatible = "renesas,can-r8a7795",
527 "renesas,rcar-gen3-can";
528 reg = <0 0xe6c30000 0 0x1000>;
529 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
530 clocks = <&cpg CPG_MOD 916>,
531 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
532 <&can_clk>;
533 clock-names = "clkp1", "clkp2", "can_clk";
534 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
535 assigned-clock-rates = <40000000>;
536 power-domains = <&cpg>;
537 status = "disabled";
538 };
539
540 can1: can@e6c38000 {
541 compatible = "renesas,can-r8a7795",
542 "renesas,rcar-gen3-can";
543 reg = <0 0xe6c38000 0 0x1000>;
544 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
545 clocks = <&cpg CPG_MOD 915>,
546 <&cpg CPG_CORE R8A7795_CLK_CANFD>,
547 <&can_clk>;
548 clock-names = "clkp1", "clkp2", "can_clk";
549 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
550 assigned-clock-rates = <40000000>;
551 power-domains = <&cpg>;
552 status = "disabled";
553 };
554
555 hscif0: serial@e6540000 {
556 compatible = "renesas,hscif-r8a7795",
557 "renesas,rcar-gen3-hscif",
558 "renesas,hscif";
559 reg = <0 0xe6540000 0 96>;
560 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
561 clocks = <&cpg CPG_MOD 520>,
562 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
563 <&scif_clk>;
564 clock-names = "fck", "brg_int", "scif_clk";
565 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
566 dma-names = "tx", "rx";
567 power-domains = <&cpg>;
568 status = "disabled";
569 };
570
571 hscif1: serial@e6550000 {
572 compatible = "renesas,hscif-r8a7795",
573 "renesas,rcar-gen3-hscif",
574 "renesas,hscif";
575 reg = <0 0xe6550000 0 96>;
576 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
577 clocks = <&cpg CPG_MOD 519>,
578 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
579 <&scif_clk>;
580 clock-names = "fck", "brg_int", "scif_clk";
581 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
582 dma-names = "tx", "rx";
583 power-domains = <&cpg>;
584 status = "disabled";
585 };
586
587 hscif2: serial@e6560000 {
588 compatible = "renesas,hscif-r8a7795",
589 "renesas,rcar-gen3-hscif",
590 "renesas,hscif";
591 reg = <0 0xe6560000 0 96>;
592 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
593 clocks = <&cpg CPG_MOD 518>,
594 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
595 <&scif_clk>;
596 clock-names = "fck", "brg_int", "scif_clk";
597 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
598 dma-names = "tx", "rx";
599 power-domains = <&cpg>;
600 status = "disabled";
601 };
602
603 hscif3: serial@e66a0000 {
604 compatible = "renesas,hscif-r8a7795",
605 "renesas,rcar-gen3-hscif",
606 "renesas,hscif";
607 reg = <0 0xe66a0000 0 96>;
608 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
609 clocks = <&cpg CPG_MOD 517>,
610 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
611 <&scif_clk>;
612 clock-names = "fck", "brg_int", "scif_clk";
613 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
614 dma-names = "tx", "rx";
615 power-domains = <&cpg>;
616 status = "disabled";
617 };
618
619 hscif4: serial@e66b0000 {
620 compatible = "renesas,hscif-r8a7795",
621 "renesas,rcar-gen3-hscif",
622 "renesas,hscif";
623 reg = <0 0xe66b0000 0 96>;
624 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
625 clocks = <&cpg CPG_MOD 516>,
626 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
627 <&scif_clk>;
628 clock-names = "fck", "brg_int", "scif_clk";
629 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
630 dma-names = "tx", "rx";
631 power-domains = <&cpg>;
632 status = "disabled";
633 };
634
635 scif0: serial@e6e60000 {
636 compatible = "renesas,scif-r8a7795",
637 "renesas,rcar-gen3-scif", "renesas,scif";
638 reg = <0 0xe6e60000 0 64>;
639 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
640 clocks = <&cpg CPG_MOD 207>,
641 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
642 <&scif_clk>;
643 clock-names = "fck", "brg_int", "scif_clk";
644 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
645 dma-names = "tx", "rx";
646 power-domains = <&cpg>;
647 status = "disabled";
648 };
649
650 scif1: serial@e6e68000 {
651 compatible = "renesas,scif-r8a7795",
652 "renesas,rcar-gen3-scif", "renesas,scif";
653 reg = <0 0xe6e68000 0 64>;
654 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
655 clocks = <&cpg CPG_MOD 206>,
656 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
657 <&scif_clk>;
658 clock-names = "fck", "brg_int", "scif_clk";
659 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
660 dma-names = "tx", "rx";
661 power-domains = <&cpg>;
662 status = "disabled";
663 };
664
665 scif2: serial@e6e88000 {
666 compatible = "renesas,scif-r8a7795",
667 "renesas,rcar-gen3-scif", "renesas,scif";
668 reg = <0 0xe6e88000 0 64>;
669 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
670 clocks = <&cpg CPG_MOD 310>,
671 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
672 <&scif_clk>;
673 clock-names = "fck", "brg_int", "scif_clk";
674 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
675 dma-names = "tx", "rx";
676 power-domains = <&cpg>;
677 status = "disabled";
678 };
679
680 scif3: serial@e6c50000 {
681 compatible = "renesas,scif-r8a7795",
682 "renesas,rcar-gen3-scif", "renesas,scif";
683 reg = <0 0xe6c50000 0 64>;
684 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
685 clocks = <&cpg CPG_MOD 204>,
686 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
687 <&scif_clk>;
688 clock-names = "fck", "brg_int", "scif_clk";
689 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
690 dma-names = "tx", "rx";
691 power-domains = <&cpg>;
692 status = "disabled";
693 };
694
695 scif4: serial@e6c40000 {
696 compatible = "renesas,scif-r8a7795",
697 "renesas,rcar-gen3-scif", "renesas,scif";
698 reg = <0 0xe6c40000 0 64>;
699 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
700 clocks = <&cpg CPG_MOD 203>,
701 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
702 <&scif_clk>;
703 clock-names = "fck", "brg_int", "scif_clk";
704 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
705 dma-names = "tx", "rx";
706 power-domains = <&cpg>;
707 status = "disabled";
708 };
709
710 scif5: serial@e6f30000 {
711 compatible = "renesas,scif-r8a7795",
712 "renesas,rcar-gen3-scif", "renesas,scif";
713 reg = <0 0xe6f30000 0 64>;
714 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
715 clocks = <&cpg CPG_MOD 202>,
716 <&cpg CPG_CORE R8A7795_CLK_S3D1>,
717 <&scif_clk>;
718 clock-names = "fck", "brg_int", "scif_clk";
719 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
720 dma-names = "tx", "rx";
721 power-domains = <&cpg>;
722 status = "disabled";
723 };
724
725 i2c0: i2c@e6500000 {
726 #address-cells = <1>;
727 #size-cells = <0>;
728 compatible = "renesas,i2c-r8a7795";
729 reg = <0 0xe6500000 0 0x40>;
730 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
731 clocks = <&cpg CPG_MOD 931>;
732 power-domains = <&cpg>;
733 i2c-scl-internal-delay-ns = <110>;
734 status = "disabled";
735 };
736
737 i2c1: i2c@e6508000 {
738 #address-cells = <1>;
739 #size-cells = <0>;
740 compatible = "renesas,i2c-r8a7795";
741 reg = <0 0xe6508000 0 0x40>;
742 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
743 clocks = <&cpg CPG_MOD 930>;
744 power-domains = <&cpg>;
745 i2c-scl-internal-delay-ns = <6>;
746 status = "disabled";
747 };
748
749 i2c2: i2c@e6510000 {
750 #address-cells = <1>;
751 #size-cells = <0>;
752 compatible = "renesas,i2c-r8a7795";
753 reg = <0 0xe6510000 0 0x40>;
754 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
755 clocks = <&cpg CPG_MOD 929>;
756 power-domains = <&cpg>;
757 i2c-scl-internal-delay-ns = <6>;
758 status = "disabled";
759 };
760
761 i2c3: i2c@e66d0000 {
762 #address-cells = <1>;
763 #size-cells = <0>;
764 compatible = "renesas,i2c-r8a7795";
765 reg = <0 0xe66d0000 0 0x40>;
766 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
767 clocks = <&cpg CPG_MOD 928>;
768 power-domains = <&cpg>;
769 i2c-scl-internal-delay-ns = <110>;
770 status = "disabled";
771 };
772
773 i2c4: i2c@e66d8000 {
774 #address-cells = <1>;
775 #size-cells = <0>;
776 compatible = "renesas,i2c-r8a7795";
777 reg = <0 0xe66d8000 0 0x40>;
778 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
779 clocks = <&cpg CPG_MOD 927>;
780 power-domains = <&cpg>;
781 i2c-scl-internal-delay-ns = <110>;
782 status = "disabled";
783 };
784
785 i2c5: i2c@e66e0000 {
786 #address-cells = <1>;
787 #size-cells = <0>;
788 compatible = "renesas,i2c-r8a7795";
789 reg = <0 0xe66e0000 0 0x40>;
790 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
791 clocks = <&cpg CPG_MOD 919>;
792 power-domains = <&cpg>;
793 i2c-scl-internal-delay-ns = <110>;
794 status = "disabled";
795 };
796
797 i2c6: i2c@e66e8000 {
798 #address-cells = <1>;
799 #size-cells = <0>;
800 compatible = "renesas,i2c-r8a7795";
801 reg = <0 0xe66e8000 0 0x40>;
802 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
803 clocks = <&cpg CPG_MOD 918>;
804 power-domains = <&cpg>;
805 i2c-scl-internal-delay-ns = <6>;
806 status = "disabled";
807 };
808
809 rcar_sound: sound@ec500000 {
810 /*
811 * #sound-dai-cells is required
812 *
813 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
814 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
815 */
816 /*
817 * #clock-cells is required for audio_clkout0/1/2/3
818 *
819 * clkout : #clock-cells = <0>; <&rcar_sound>;
820 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
821 */
822 compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
823 reg = <0 0xec500000 0 0x1000>, /* SCU */
824 <0 0xec5a0000 0 0x100>, /* ADG */
825 <0 0xec540000 0 0x1000>, /* SSIU */
826 <0 0xec541000 0 0x280>, /* SSI */
827 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
828 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
829
830 clocks = <&cpg CPG_MOD 1005>,
831 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
832 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
833 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
834 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
835 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
836 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
837 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
838 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
839 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
840 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
841 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
842 <&audio_clk_a>, <&audio_clk_b>,
843 <&audio_clk_c>,
844 <&cpg CPG_CORE R8A7795_CLK_S0D4>;
845 clock-names = "ssi-all",
846 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
847 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
848 "ssi.1", "ssi.0",
849 "src.9", "src.8", "src.7", "src.6",
850 "src.5", "src.4", "src.3", "src.2",
851 "src.1", "src.0",
852 "dvc.0", "dvc.1",
853 "clk_a", "clk_b", "clk_c", "clk_i";
854 power-domains = <&cpg>;
855 status = "disabled";
856
857 rcar_sound,dvc {
858 dvc0: dvc@0 {
859 dmas = <&audma0 0xbc>;
860 dma-names = "tx";
861 };
862 dvc1: dvc@1 {
863 dmas = <&audma0 0xbe>;
864 dma-names = "tx";
865 };
866 };
867
868 rcar_sound,src {
869 src0: src@0 {
870 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
871 dmas = <&audma0 0x85>, <&audma1 0x9a>;
872 dma-names = "rx", "tx";
873 };
874 src1: src@1 {
875 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
876 dmas = <&audma0 0x87>, <&audma1 0x9c>;
877 dma-names = "rx", "tx";
878 };
879 src2: src@2 {
880 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
881 dmas = <&audma0 0x89>, <&audma1 0x9e>;
882 dma-names = "rx", "tx";
883 };
884 src3: src@3 {
885 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
886 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
887 dma-names = "rx", "tx";
888 };
889 src4: src@4 {
890 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
891 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
892 dma-names = "rx", "tx";
893 };
894 src5: src@5 {
895 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
896 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
897 dma-names = "rx", "tx";
898 };
899 src6: src@6 {
900 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
901 dmas = <&audma0 0x91>, <&audma1 0xb4>;
902 dma-names = "rx", "tx";
903 };
904 src7: src@7 {
905 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
906 dmas = <&audma0 0x93>, <&audma1 0xb6>;
907 dma-names = "rx", "tx";
908 };
909 src8: src@8 {
910 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
911 dmas = <&audma0 0x95>, <&audma1 0xb8>;
912 dma-names = "rx", "tx";
913 };
914 src9: src@9 {
915 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
916 dmas = <&audma0 0x97>, <&audma1 0xba>;
917 dma-names = "rx", "tx";
918 };
919 };
920
921 rcar_sound,ssi {
922 ssi0: ssi@0 {
923 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
924 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
925 dma-names = "rx", "tx", "rxu", "txu";
926 };
927 ssi1: ssi@1 {
928 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
929 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
930 dma-names = "rx", "tx", "rxu", "txu";
931 };
932 ssi2: ssi@2 {
933 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
934 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
935 dma-names = "rx", "tx", "rxu", "txu";
936 };
937 ssi3: ssi@3 {
938 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
939 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
940 dma-names = "rx", "tx", "rxu", "txu";
941 };
942 ssi4: ssi@4 {
943 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
944 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
945 dma-names = "rx", "tx", "rxu", "txu";
946 };
947 ssi5: ssi@5 {
948 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
949 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
950 dma-names = "rx", "tx", "rxu", "txu";
951 };
952 ssi6: ssi@6 {
953 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
954 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
955 dma-names = "rx", "tx", "rxu", "txu";
956 };
957 ssi7: ssi@7 {
958 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
959 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
960 dma-names = "rx", "tx", "rxu", "txu";
961 };
962 ssi8: ssi@8 {
963 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
964 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
965 dma-names = "rx", "tx", "rxu", "txu";
966 };
967 ssi9: ssi@9 {
968 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
969 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
970 dma-names = "rx", "tx", "rxu", "txu";
971 };
972 };
973 };
974
975 sata: sata@ee300000 {
976 compatible = "renesas,sata-r8a7795";
977 reg = <0 0xee300000 0 0x1fff>;
978 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
979 clocks = <&cpg CPG_MOD 815>;
980 status = "disabled";
981 };
982
983 xhci0: usb@ee000000 {
984 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
985 reg = <0 0xee000000 0 0xc00>;
986 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
987 clocks = <&cpg CPG_MOD 328>;
988 power-domains = <&cpg>;
989 status = "disabled";
990 };
991
992 xhci1: usb@ee0400000 {
993 compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
994 reg = <0 0xee040000 0 0xc00>;
995 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
996 clocks = <&cpg CPG_MOD 327>;
997 power-domains = <&cpg>;
998 status = "disabled";
999 };
1000
1001 usb_dmac0: dma-controller@e65a0000 {
1002 compatible = "renesas,r8a7795-usb-dmac",
1003 "renesas,usb-dmac";
1004 reg = <0 0xe65a0000 0 0x100>;
1005 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1006 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1007 interrupt-names = "ch0", "ch1";
1008 clocks = <&cpg CPG_MOD 330>;
1009 power-domains = <&cpg>;
1010 #dma-cells = <1>;
1011 dma-channels = <2>;
1012 };
1013
1014 usb_dmac1: dma-controller@e65b0000 {
1015 compatible = "renesas,r8a7795-usb-dmac",
1016 "renesas,usb-dmac";
1017 reg = <0 0xe65b0000 0 0x100>;
1018 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1019 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1020 interrupt-names = "ch0", "ch1";
1021 clocks = <&cpg CPG_MOD 331>;
1022 power-domains = <&cpg>;
1023 #dma-cells = <1>;
1024 dma-channels = <2>;
1025 };
1026
1027 sdhi0: sd@ee100000 {
1028 compatible = "renesas,sdhi-r8a7795";
1029 reg = <0 0xee100000 0 0x2000>;
1030 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MOD 314>;
1032 power-domains = <&cpg>;
1033 status = "disabled";
1034 };
1035
1036 sdhi1: sd@ee120000 {
1037 compatible = "renesas,sdhi-r8a7795";
1038 reg = <0 0xee120000 0 0x2000>;
1039 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1040 clocks = <&cpg CPG_MOD 313>;
1041 power-domains = <&cpg>;
1042 status = "disabled";
1043 };
1044
1045 sdhi2: sd@ee140000 {
1046 compatible = "renesas,sdhi-r8a7795";
1047 reg = <0 0xee140000 0 0x2000>;
1048 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&cpg CPG_MOD 312>;
1050 power-domains = <&cpg>;
1051 cap-mmc-highspeed;
1052 status = "disabled";
1053 };
1054
1055 sdhi3: sd@ee160000 {
1056 compatible = "renesas,sdhi-r8a7795";
1057 reg = <0 0xee160000 0 0x2000>;
1058 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1059 clocks = <&cpg CPG_MOD 311>;
1060 power-domains = <&cpg>;
1061 cap-mmc-highspeed;
1062 status = "disabled";
1063 };
1064
1065 usb2_phy0: usb-phy@ee080200 {
1066 compatible = "renesas,usb2-phy-r8a7795";
1067 reg = <0 0xee080200 0 0x700>;
1068 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1069 clocks = <&cpg CPG_MOD 703>;
1070 power-domains = <&cpg>;
1071 #phy-cells = <0>;
1072 status = "disabled";
1073 };
1074
1075 usb2_phy1: usb-phy@ee0a0200 {
1076 compatible = "renesas,usb2-phy-r8a7795";
1077 reg = <0 0xee0a0200 0 0x700>;
1078 clocks = <&cpg CPG_MOD 702>;
1079 power-domains = <&cpg>;
1080 #phy-cells = <0>;
1081 status = "disabled";
1082 };
1083
1084 usb2_phy2: usb-phy@ee0c0200 {
1085 compatible = "renesas,usb2-phy-r8a7795";
1086 reg = <0 0xee0c0200 0 0x700>;
1087 clocks = <&cpg CPG_MOD 701>;
1088 power-domains = <&cpg>;
1089 #phy-cells = <0>;
1090 status = "disabled";
1091 };
1092
1093 ehci0: usb@ee080100 {
1094 compatible = "generic-ehci";
1095 reg = <0 0xee080100 0 0x100>;
1096 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1097 clocks = <&cpg CPG_MOD 703>;
1098 phys = <&usb2_phy0>;
1099 phy-names = "usb";
1100 power-domains = <&cpg>;
1101 status = "disabled";
1102 };
1103
1104 ehci1: usb@ee0a0100 {
1105 compatible = "generic-ehci";
1106 reg = <0 0xee0a0100 0 0x100>;
1107 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1108 clocks = <&cpg CPG_MOD 702>;
1109 phys = <&usb2_phy1>;
1110 phy-names = "usb";
1111 power-domains = <&cpg>;
1112 status = "disabled";
1113 };
1114
1115 ehci2: usb@ee0c0100 {
1116 compatible = "generic-ehci";
1117 reg = <0 0xee0c0100 0 0x100>;
1118 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1119 clocks = <&cpg CPG_MOD 701>;
1120 phys = <&usb2_phy2>;
1121 phy-names = "usb";
1122 power-domains = <&cpg>;
1123 status = "disabled";
1124 };
1125
1126 ohci0: usb@ee080000 {
1127 compatible = "generic-ohci";
1128 reg = <0 0xee080000 0 0x100>;
1129 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1130 clocks = <&cpg CPG_MOD 703>;
1131 phys = <&usb2_phy0>;
1132 phy-names = "usb";
1133 power-domains = <&cpg>;
1134 status = "disabled";
1135 };
1136
1137 ohci1: usb@ee0a0000 {
1138 compatible = "generic-ohci";
1139 reg = <0 0xee0a0000 0 0x100>;
1140 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1141 clocks = <&cpg CPG_MOD 702>;
1142 phys = <&usb2_phy1>;
1143 phy-names = "usb";
1144 power-domains = <&cpg>;
1145 status = "disabled";
1146 };
1147
1148 ohci2: usb@ee0c0000 {
1149 compatible = "generic-ohci";
1150 reg = <0 0xee0c0000 0 0x100>;
1151 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1152 clocks = <&cpg CPG_MOD 701>;
1153 phys = <&usb2_phy2>;
1154 phy-names = "usb";
1155 power-domains = <&cpg>;
1156 status = "disabled";
1157 };
1158 };
1159 };
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