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arm64: dts: renesas: r8a7796: Enable DMA for SCIF2
[mirror_ubuntu-jammy-kernel.git] / arch / arm64 / boot / dts / renesas / r8a7796.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
4 *
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 */
7
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
11
12 #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4
13
14 / {
15 compatible = "renesas,r8a7796";
16 #address-cells = <2>;
17 #size-cells = <2>;
18
19 aliases {
20 i2c0 = &i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 i2c4 = &i2c4;
25 i2c5 = &i2c5;
26 i2c6 = &i2c6;
27 i2c7 = &i2c_dvfs;
28 };
29
30 /*
31 * The external audio clocks are configured as 0 Hz fixed frequency
32 * clocks by default.
33 * Boards that provide audio clocks should override them.
34 */
35 audio_clk_a: audio_clk_a {
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <0>;
39 };
40
41 audio_clk_b: audio_clk_b {
42 compatible = "fixed-clock";
43 #clock-cells = <0>;
44 clock-frequency = <0>;
45 };
46
47 audio_clk_c: audio_clk_c {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <0>;
51 };
52
53 /* External CAN clock - to be overridden by boards that provide it */
54 can_clk: can {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
59
60 cluster0_opp: opp_table0 {
61 compatible = "operating-points-v2";
62 opp-shared;
63
64 opp-500000000 {
65 opp-hz = /bits/ 64 <500000000>;
66 opp-microvolt = <820000>;
67 clock-latency-ns = <300000>;
68 };
69 opp-1000000000 {
70 opp-hz = /bits/ 64 <1000000000>;
71 opp-microvolt = <820000>;
72 clock-latency-ns = <300000>;
73 };
74 opp-1500000000 {
75 opp-hz = /bits/ 64 <1500000000>;
76 opp-microvolt = <820000>;
77 clock-latency-ns = <300000>;
78 };
79 opp-1600000000 {
80 opp-hz = /bits/ 64 <1600000000>;
81 opp-microvolt = <900000>;
82 clock-latency-ns = <300000>;
83 turbo-mode;
84 };
85 opp-1700000000 {
86 opp-hz = /bits/ 64 <1700000000>;
87 opp-microvolt = <900000>;
88 clock-latency-ns = <300000>;
89 turbo-mode;
90 };
91 opp-1800000000 {
92 opp-hz = /bits/ 64 <1800000000>;
93 opp-microvolt = <960000>;
94 clock-latency-ns = <300000>;
95 turbo-mode;
96 };
97 };
98
99 cluster1_opp: opp_table1 {
100 compatible = "operating-points-v2";
101 opp-shared;
102
103 opp-800000000 {
104 opp-hz = /bits/ 64 <800000000>;
105 opp-microvolt = <820000>;
106 clock-latency-ns = <300000>;
107 };
108 opp-1000000000 {
109 opp-hz = /bits/ 64 <1000000000>;
110 opp-microvolt = <820000>;
111 clock-latency-ns = <300000>;
112 };
113 opp-1200000000 {
114 opp-hz = /bits/ 64 <1200000000>;
115 opp-microvolt = <820000>;
116 clock-latency-ns = <300000>;
117 };
118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
120 opp-microvolt = <820000>;
121 clock-latency-ns = <300000>;
122 turbo-mode;
123 };
124 };
125
126 cpus {
127 #address-cells = <1>;
128 #size-cells = <0>;
129
130 cpu-map {
131 cluster0 {
132 core0 {
133 cpu = <&a57_0>;
134 };
135 core1 {
136 cpu = <&a57_1>;
137 };
138 };
139
140 cluster1 {
141 core0 {
142 cpu = <&a53_0>;
143 };
144 core1 {
145 cpu = <&a53_1>;
146 };
147 core2 {
148 cpu = <&a53_2>;
149 };
150 core3 {
151 cpu = <&a53_3>;
152 };
153 };
154 };
155
156 a57_0: cpu@0 {
157 compatible = "arm,cortex-a57", "arm,armv8";
158 reg = <0x0>;
159 device_type = "cpu";
160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
161 next-level-cache = <&L2_CA57>;
162 enable-method = "psci";
163 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
164 operating-points-v2 = <&cluster0_opp>;
165 capacity-dmips-mhz = <1024>;
166 #cooling-cells = <2>;
167 };
168
169 a57_1: cpu@1 {
170 compatible = "arm,cortex-a57", "arm,armv8";
171 reg = <0x1>;
172 device_type = "cpu";
173 power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
174 next-level-cache = <&L2_CA57>;
175 enable-method = "psci";
176 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
177 operating-points-v2 = <&cluster0_opp>;
178 capacity-dmips-mhz = <1024>;
179 #cooling-cells = <2>;
180 };
181
182 a53_0: cpu@100 {
183 compatible = "arm,cortex-a53", "arm,armv8";
184 reg = <0x100>;
185 device_type = "cpu";
186 power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
187 next-level-cache = <&L2_CA53>;
188 enable-method = "psci";
189 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
190 operating-points-v2 = <&cluster1_opp>;
191 capacity-dmips-mhz = <535>;
192 };
193
194 a53_1: cpu@101 {
195 compatible = "arm,cortex-a53", "arm,armv8";
196 reg = <0x101>;
197 device_type = "cpu";
198 power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
199 next-level-cache = <&L2_CA53>;
200 enable-method = "psci";
201 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
202 operating-points-v2 = <&cluster1_opp>;
203 capacity-dmips-mhz = <535>;
204 };
205
206 a53_2: cpu@102 {
207 compatible = "arm,cortex-a53", "arm,armv8";
208 reg = <0x102>;
209 device_type = "cpu";
210 power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
211 next-level-cache = <&L2_CA53>;
212 enable-method = "psci";
213 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
214 operating-points-v2 = <&cluster1_opp>;
215 capacity-dmips-mhz = <535>;
216 };
217
218 a53_3: cpu@103 {
219 compatible = "arm,cortex-a53", "arm,armv8";
220 reg = <0x103>;
221 device_type = "cpu";
222 power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
223 next-level-cache = <&L2_CA53>;
224 enable-method = "psci";
225 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
226 operating-points-v2 = <&cluster1_opp>;
227 capacity-dmips-mhz = <535>;
228 };
229
230 L2_CA57: cache-controller-0 {
231 compatible = "cache";
232 power-domains = <&sysc R8A7796_PD_CA57_SCU>;
233 cache-unified;
234 cache-level = <2>;
235 };
236
237 L2_CA53: cache-controller-1 {
238 compatible = "cache";
239 power-domains = <&sysc R8A7796_PD_CA53_SCU>;
240 cache-unified;
241 cache-level = <2>;
242 };
243 };
244
245 extal_clk: extal {
246 compatible = "fixed-clock";
247 #clock-cells = <0>;
248 /* This value must be overridden by the board */
249 clock-frequency = <0>;
250 };
251
252 extalr_clk: extalr {
253 compatible = "fixed-clock";
254 #clock-cells = <0>;
255 /* This value must be overridden by the board */
256 clock-frequency = <0>;
257 };
258
259 /* External PCIe clock - can be overridden by the board */
260 pcie_bus_clk: pcie_bus {
261 compatible = "fixed-clock";
262 #clock-cells = <0>;
263 clock-frequency = <0>;
264 };
265
266 pmu_a53 {
267 compatible = "arm,cortex-a53-pmu";
268 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
269 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
270 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
271 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
272 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
273 };
274
275 pmu_a57 {
276 compatible = "arm,cortex-a57-pmu";
277 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
278 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
279 interrupt-affinity = <&a57_0>, <&a57_1>;
280 };
281
282 psci {
283 compatible = "arm,psci-1.0", "arm,psci-0.2";
284 method = "smc";
285 };
286
287 /* External SCIF clock - to be overridden by boards that provide it */
288 scif_clk: scif {
289 compatible = "fixed-clock";
290 #clock-cells = <0>;
291 clock-frequency = <0>;
292 };
293
294 soc {
295 compatible = "simple-bus";
296 interrupt-parent = <&gic>;
297 #address-cells = <2>;
298 #size-cells = <2>;
299 ranges;
300
301 rwdt: watchdog@e6020000 {
302 compatible = "renesas,r8a7796-wdt",
303 "renesas,rcar-gen3-wdt";
304 reg = <0 0xe6020000 0 0x0c>;
305 clocks = <&cpg CPG_MOD 402>;
306 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
307 resets = <&cpg 402>;
308 status = "disabled";
309 };
310
311 gpio0: gpio@e6050000 {
312 compatible = "renesas,gpio-r8a7796",
313 "renesas,rcar-gen3-gpio";
314 reg = <0 0xe6050000 0 0x50>;
315 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
316 #gpio-cells = <2>;
317 gpio-controller;
318 gpio-ranges = <&pfc 0 0 16>;
319 #interrupt-cells = <2>;
320 interrupt-controller;
321 clocks = <&cpg CPG_MOD 912>;
322 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
323 resets = <&cpg 912>;
324 };
325
326 gpio1: gpio@e6051000 {
327 compatible = "renesas,gpio-r8a7796",
328 "renesas,rcar-gen3-gpio";
329 reg = <0 0xe6051000 0 0x50>;
330 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
331 #gpio-cells = <2>;
332 gpio-controller;
333 gpio-ranges = <&pfc 0 32 29>;
334 #interrupt-cells = <2>;
335 interrupt-controller;
336 clocks = <&cpg CPG_MOD 911>;
337 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
338 resets = <&cpg 911>;
339 };
340
341 gpio2: gpio@e6052000 {
342 compatible = "renesas,gpio-r8a7796",
343 "renesas,rcar-gen3-gpio";
344 reg = <0 0xe6052000 0 0x50>;
345 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
346 #gpio-cells = <2>;
347 gpio-controller;
348 gpio-ranges = <&pfc 0 64 15>;
349 #interrupt-cells = <2>;
350 interrupt-controller;
351 clocks = <&cpg CPG_MOD 910>;
352 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
353 resets = <&cpg 910>;
354 };
355
356 gpio3: gpio@e6053000 {
357 compatible = "renesas,gpio-r8a7796",
358 "renesas,rcar-gen3-gpio";
359 reg = <0 0xe6053000 0 0x50>;
360 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
361 #gpio-cells = <2>;
362 gpio-controller;
363 gpio-ranges = <&pfc 0 96 16>;
364 #interrupt-cells = <2>;
365 interrupt-controller;
366 clocks = <&cpg CPG_MOD 909>;
367 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
368 resets = <&cpg 909>;
369 };
370
371 gpio4: gpio@e6054000 {
372 compatible = "renesas,gpio-r8a7796",
373 "renesas,rcar-gen3-gpio";
374 reg = <0 0xe6054000 0 0x50>;
375 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
376 #gpio-cells = <2>;
377 gpio-controller;
378 gpio-ranges = <&pfc 0 128 18>;
379 #interrupt-cells = <2>;
380 interrupt-controller;
381 clocks = <&cpg CPG_MOD 908>;
382 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
383 resets = <&cpg 908>;
384 };
385
386 gpio5: gpio@e6055000 {
387 compatible = "renesas,gpio-r8a7796",
388 "renesas,rcar-gen3-gpio";
389 reg = <0 0xe6055000 0 0x50>;
390 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
391 #gpio-cells = <2>;
392 gpio-controller;
393 gpio-ranges = <&pfc 0 160 26>;
394 #interrupt-cells = <2>;
395 interrupt-controller;
396 clocks = <&cpg CPG_MOD 907>;
397 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
398 resets = <&cpg 907>;
399 };
400
401 gpio6: gpio@e6055400 {
402 compatible = "renesas,gpio-r8a7796",
403 "renesas,rcar-gen3-gpio";
404 reg = <0 0xe6055400 0 0x50>;
405 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
406 #gpio-cells = <2>;
407 gpio-controller;
408 gpio-ranges = <&pfc 0 192 32>;
409 #interrupt-cells = <2>;
410 interrupt-controller;
411 clocks = <&cpg CPG_MOD 906>;
412 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
413 resets = <&cpg 906>;
414 };
415
416 gpio7: gpio@e6055800 {
417 compatible = "renesas,gpio-r8a7796",
418 "renesas,rcar-gen3-gpio";
419 reg = <0 0xe6055800 0 0x50>;
420 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
421 #gpio-cells = <2>;
422 gpio-controller;
423 gpio-ranges = <&pfc 0 224 4>;
424 #interrupt-cells = <2>;
425 interrupt-controller;
426 clocks = <&cpg CPG_MOD 905>;
427 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
428 resets = <&cpg 905>;
429 };
430
431 pfc: pin-controller@e6060000 {
432 compatible = "renesas,pfc-r8a7796";
433 reg = <0 0xe6060000 0 0x50c>;
434 };
435
436 cmt0: timer@e60f0000 {
437 compatible = "renesas,r8a7796-cmt0",
438 "renesas,rcar-gen3-cmt0";
439 reg = <0 0xe60f0000 0 0x1004>;
440 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
441 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
442 clocks = <&cpg CPG_MOD 303>;
443 clock-names = "fck";
444 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
445 resets = <&cpg 303>;
446 status = "disabled";
447 };
448
449 cmt1: timer@e6130000 {
450 compatible = "renesas,r8a7796-cmt1",
451 "renesas,rcar-gen3-cmt1";
452 reg = <0 0xe6130000 0 0x1004>;
453 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
458 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
459 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
461 clocks = <&cpg CPG_MOD 302>;
462 clock-names = "fck";
463 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
464 resets = <&cpg 302>;
465 status = "disabled";
466 };
467
468 cmt2: timer@e6140000 {
469 compatible = "renesas,r8a7796-cmt1",
470 "renesas,rcar-gen3-cmt1";
471 reg = <0 0xe6140000 0 0x1004>;
472 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
480 clocks = <&cpg CPG_MOD 301>;
481 clock-names = "fck";
482 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
483 resets = <&cpg 301>;
484 status = "disabled";
485 };
486
487 cmt3: timer@e6148000 {
488 compatible = "renesas,r8a7796-cmt1",
489 "renesas,rcar-gen3-cmt1";
490 reg = <0 0xe6148000 0 0x1004>;
491 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
492 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
493 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
494 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
495 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
496 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
497 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
498 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 300>;
500 clock-names = "fck";
501 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
502 resets = <&cpg 300>;
503 status = "disabled";
504 };
505
506 cpg: clock-controller@e6150000 {
507 compatible = "renesas,r8a7796-cpg-mssr";
508 reg = <0 0xe6150000 0 0x1000>;
509 clocks = <&extal_clk>, <&extalr_clk>;
510 clock-names = "extal", "extalr";
511 #clock-cells = <2>;
512 #power-domain-cells = <0>;
513 #reset-cells = <1>;
514 };
515
516 rst: reset-controller@e6160000 {
517 compatible = "renesas,r8a7796-rst";
518 reg = <0 0xe6160000 0 0x0200>;
519 };
520
521 sysc: system-controller@e6180000 {
522 compatible = "renesas,r8a7796-sysc";
523 reg = <0 0xe6180000 0 0x0400>;
524 #power-domain-cells = <1>;
525 };
526
527 tsc: thermal@e6198000 {
528 compatible = "renesas,r8a7796-thermal";
529 reg = <0 0xe6198000 0 0x100>,
530 <0 0xe61a0000 0 0x100>,
531 <0 0xe61a8000 0 0x100>;
532 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
533 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
535 clocks = <&cpg CPG_MOD 522>;
536 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
537 resets = <&cpg 522>;
538 #thermal-sensor-cells = <1>;
539 };
540
541 intc_ex: interrupt-controller@e61c0000 {
542 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
543 #interrupt-cells = <2>;
544 interrupt-controller;
545 reg = <0 0xe61c0000 0 0x200>;
546 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
547 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
548 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
549 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
550 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
551 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
552 clocks = <&cpg CPG_MOD 407>;
553 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
554 resets = <&cpg 407>;
555 };
556
557 i2c0: i2c@e6500000 {
558 #address-cells = <1>;
559 #size-cells = <0>;
560 compatible = "renesas,i2c-r8a7796",
561 "renesas,rcar-gen3-i2c";
562 reg = <0 0xe6500000 0 0x40>;
563 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
564 clocks = <&cpg CPG_MOD 931>;
565 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
566 resets = <&cpg 931>;
567 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
568 <&dmac2 0x91>, <&dmac2 0x90>;
569 dma-names = "tx", "rx", "tx", "rx";
570 i2c-scl-internal-delay-ns = <110>;
571 status = "disabled";
572 };
573
574 i2c1: i2c@e6508000 {
575 #address-cells = <1>;
576 #size-cells = <0>;
577 compatible = "renesas,i2c-r8a7796",
578 "renesas,rcar-gen3-i2c";
579 reg = <0 0xe6508000 0 0x40>;
580 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&cpg CPG_MOD 930>;
582 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
583 resets = <&cpg 930>;
584 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
585 <&dmac2 0x93>, <&dmac2 0x92>;
586 dma-names = "tx", "rx", "tx", "rx";
587 i2c-scl-internal-delay-ns = <6>;
588 status = "disabled";
589 };
590
591 i2c2: i2c@e6510000 {
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "renesas,i2c-r8a7796",
595 "renesas,rcar-gen3-i2c";
596 reg = <0 0xe6510000 0 0x40>;
597 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
598 clocks = <&cpg CPG_MOD 929>;
599 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
600 resets = <&cpg 929>;
601 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
602 <&dmac2 0x95>, <&dmac2 0x94>;
603 dma-names = "tx", "rx", "tx", "rx";
604 i2c-scl-internal-delay-ns = <6>;
605 status = "disabled";
606 };
607
608 i2c3: i2c@e66d0000 {
609 #address-cells = <1>;
610 #size-cells = <0>;
611 compatible = "renesas,i2c-r8a7796",
612 "renesas,rcar-gen3-i2c";
613 reg = <0 0xe66d0000 0 0x40>;
614 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
615 clocks = <&cpg CPG_MOD 928>;
616 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
617 resets = <&cpg 928>;
618 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
619 dma-names = "tx", "rx";
620 i2c-scl-internal-delay-ns = <110>;
621 status = "disabled";
622 };
623
624 i2c4: i2c@e66d8000 {
625 #address-cells = <1>;
626 #size-cells = <0>;
627 compatible = "renesas,i2c-r8a7796",
628 "renesas,rcar-gen3-i2c";
629 reg = <0 0xe66d8000 0 0x40>;
630 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 927>;
632 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
633 resets = <&cpg 927>;
634 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
635 dma-names = "tx", "rx";
636 i2c-scl-internal-delay-ns = <110>;
637 status = "disabled";
638 };
639
640 i2c5: i2c@e66e0000 {
641 #address-cells = <1>;
642 #size-cells = <0>;
643 compatible = "renesas,i2c-r8a7796",
644 "renesas,rcar-gen3-i2c";
645 reg = <0 0xe66e0000 0 0x40>;
646 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
647 clocks = <&cpg CPG_MOD 919>;
648 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
649 resets = <&cpg 919>;
650 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
651 dma-names = "tx", "rx";
652 i2c-scl-internal-delay-ns = <110>;
653 status = "disabled";
654 };
655
656 i2c6: i2c@e66e8000 {
657 #address-cells = <1>;
658 #size-cells = <0>;
659 compatible = "renesas,i2c-r8a7796",
660 "renesas,rcar-gen3-i2c";
661 reg = <0 0xe66e8000 0 0x40>;
662 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
663 clocks = <&cpg CPG_MOD 918>;
664 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
665 resets = <&cpg 918>;
666 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
667 dma-names = "tx", "rx";
668 i2c-scl-internal-delay-ns = <6>;
669 status = "disabled";
670 };
671
672 i2c_dvfs: i2c@e60b0000 {
673 #address-cells = <1>;
674 #size-cells = <0>;
675 compatible = "renesas,iic-r8a7796",
676 "renesas,rcar-gen3-iic",
677 "renesas,rmobile-iic";
678 reg = <0 0xe60b0000 0 0x425>;
679 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&cpg CPG_MOD 926>;
681 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
682 resets = <&cpg 926>;
683 dmas = <&dmac0 0x11>, <&dmac0 0x10>;
684 dma-names = "tx", "rx";
685 status = "disabled";
686 };
687
688 hscif0: serial@e6540000 {
689 compatible = "renesas,hscif-r8a7796",
690 "renesas,rcar-gen3-hscif",
691 "renesas,hscif";
692 reg = <0 0xe6540000 0 0x60>;
693 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&cpg CPG_MOD 520>,
695 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
696 <&scif_clk>;
697 clock-names = "fck", "brg_int", "scif_clk";
698 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
699 <&dmac2 0x31>, <&dmac2 0x30>;
700 dma-names = "tx", "rx", "tx", "rx";
701 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
702 resets = <&cpg 520>;
703 status = "disabled";
704 };
705
706 hscif1: serial@e6550000 {
707 compatible = "renesas,hscif-r8a7796",
708 "renesas,rcar-gen3-hscif",
709 "renesas,hscif";
710 reg = <0 0xe6550000 0 0x60>;
711 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
712 clocks = <&cpg CPG_MOD 519>,
713 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
714 <&scif_clk>;
715 clock-names = "fck", "brg_int", "scif_clk";
716 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
717 <&dmac2 0x33>, <&dmac2 0x32>;
718 dma-names = "tx", "rx", "tx", "rx";
719 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
720 resets = <&cpg 519>;
721 status = "disabled";
722 };
723
724 hscif2: serial@e6560000 {
725 compatible = "renesas,hscif-r8a7796",
726 "renesas,rcar-gen3-hscif",
727 "renesas,hscif";
728 reg = <0 0xe6560000 0 0x60>;
729 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&cpg CPG_MOD 518>,
731 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
732 <&scif_clk>;
733 clock-names = "fck", "brg_int", "scif_clk";
734 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
735 <&dmac2 0x35>, <&dmac2 0x34>;
736 dma-names = "tx", "rx", "tx", "rx";
737 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
738 resets = <&cpg 518>;
739 status = "disabled";
740 };
741
742 hscif3: serial@e66a0000 {
743 compatible = "renesas,hscif-r8a7796",
744 "renesas,rcar-gen3-hscif",
745 "renesas,hscif";
746 reg = <0 0xe66a0000 0 0x60>;
747 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
748 clocks = <&cpg CPG_MOD 517>,
749 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
750 <&scif_clk>;
751 clock-names = "fck", "brg_int", "scif_clk";
752 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
753 dma-names = "tx", "rx";
754 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
755 resets = <&cpg 517>;
756 status = "disabled";
757 };
758
759 hscif4: serial@e66b0000 {
760 compatible = "renesas,hscif-r8a7796",
761 "renesas,rcar-gen3-hscif",
762 "renesas,hscif";
763 reg = <0 0xe66b0000 0 0x60>;
764 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
765 clocks = <&cpg CPG_MOD 516>,
766 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
767 <&scif_clk>;
768 clock-names = "fck", "brg_int", "scif_clk";
769 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
770 dma-names = "tx", "rx";
771 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
772 resets = <&cpg 516>;
773 status = "disabled";
774 };
775
776 hsusb: usb@e6590000 {
777 compatible = "renesas,usbhs-r8a7796",
778 "renesas,rcar-gen3-usbhs";
779 reg = <0 0xe6590000 0 0x200>;
780 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
781 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
782 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
783 <&usb_dmac1 0>, <&usb_dmac1 1>;
784 dma-names = "ch0", "ch1", "ch2", "ch3";
785 renesas,buswait = <11>;
786 phys = <&usb2_phy0>;
787 phy-names = "usb";
788 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
789 resets = <&cpg 704>, <&cpg 703>;
790 status = "disabled";
791 };
792
793 usb_dmac0: dma-controller@e65a0000 {
794 compatible = "renesas,r8a7796-usb-dmac",
795 "renesas,usb-dmac";
796 reg = <0 0xe65a0000 0 0x100>;
797 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
798 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
799 interrupt-names = "ch0", "ch1";
800 clocks = <&cpg CPG_MOD 330>;
801 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
802 resets = <&cpg 330>;
803 #dma-cells = <1>;
804 dma-channels = <2>;
805 };
806
807 usb_dmac1: dma-controller@e65b0000 {
808 compatible = "renesas,r8a7796-usb-dmac",
809 "renesas,usb-dmac";
810 reg = <0 0xe65b0000 0 0x100>;
811 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
812 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
813 interrupt-names = "ch0", "ch1";
814 clocks = <&cpg CPG_MOD 331>;
815 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
816 resets = <&cpg 331>;
817 #dma-cells = <1>;
818 dma-channels = <2>;
819 };
820
821 usb3_phy0: usb-phy@e65ee000 {
822 compatible = "renesas,r8a7796-usb3-phy",
823 "renesas,rcar-gen3-usb3-phy";
824 reg = <0 0xe65ee000 0 0x90>;
825 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
826 <&usb_extal_clk>;
827 clock-names = "usb3-if", "usb3s_clk", "usb_extal";
828 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
829 resets = <&cpg 328>;
830 #phy-cells = <0>;
831 status = "disabled";
832 };
833
834 dmac0: dma-controller@e6700000 {
835 compatible = "renesas,dmac-r8a7796",
836 "renesas,rcar-dmac";
837 reg = <0 0xe6700000 0 0x10000>;
838 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
839 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
840 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
841 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
842 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
843 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
844 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
845 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
846 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
847 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
848 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
849 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
850 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
851 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
852 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
853 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
854 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
855 interrupt-names = "error",
856 "ch0", "ch1", "ch2", "ch3",
857 "ch4", "ch5", "ch6", "ch7",
858 "ch8", "ch9", "ch10", "ch11",
859 "ch12", "ch13", "ch14", "ch15";
860 clocks = <&cpg CPG_MOD 219>;
861 clock-names = "fck";
862 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
863 resets = <&cpg 219>;
864 #dma-cells = <1>;
865 dma-channels = <16>;
866 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
867 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
868 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
869 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
870 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
871 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
872 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
873 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
874 };
875
876 dmac1: dma-controller@e7300000 {
877 compatible = "renesas,dmac-r8a7796",
878 "renesas,rcar-dmac";
879 reg = <0 0xe7300000 0 0x10000>;
880 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
881 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
882 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
883 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
884 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
885 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
886 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
887 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
888 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
889 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
890 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
891 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
892 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
893 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
894 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
895 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
896 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
897 interrupt-names = "error",
898 "ch0", "ch1", "ch2", "ch3",
899 "ch4", "ch5", "ch6", "ch7",
900 "ch8", "ch9", "ch10", "ch11",
901 "ch12", "ch13", "ch14", "ch15";
902 clocks = <&cpg CPG_MOD 218>;
903 clock-names = "fck";
904 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
905 resets = <&cpg 218>;
906 #dma-cells = <1>;
907 dma-channels = <16>;
908 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
909 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
910 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
911 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
912 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
913 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
914 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
915 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
916 };
917
918 dmac2: dma-controller@e7310000 {
919 compatible = "renesas,dmac-r8a7796",
920 "renesas,rcar-dmac";
921 reg = <0 0xe7310000 0 0x10000>;
922 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
923 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
924 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
925 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
926 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
927 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
928 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
929 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
930 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
931 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
932 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
933 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
934 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
935 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
936 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
937 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
938 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
939 interrupt-names = "error",
940 "ch0", "ch1", "ch2", "ch3",
941 "ch4", "ch5", "ch6", "ch7",
942 "ch8", "ch9", "ch10", "ch11",
943 "ch12", "ch13", "ch14", "ch15";
944 clocks = <&cpg CPG_MOD 217>;
945 clock-names = "fck";
946 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
947 resets = <&cpg 217>;
948 #dma-cells = <1>;
949 dma-channels = <16>;
950 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
951 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
952 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
953 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
954 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
955 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
956 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
957 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
958 };
959
960 ipmmu_ds0: mmu@e6740000 {
961 compatible = "renesas,ipmmu-r8a7796";
962 reg = <0 0xe6740000 0 0x1000>;
963 renesas,ipmmu-main = <&ipmmu_mm 0>;
964 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
965 #iommu-cells = <1>;
966 };
967
968 ipmmu_ds1: mmu@e7740000 {
969 compatible = "renesas,ipmmu-r8a7796";
970 reg = <0 0xe7740000 0 0x1000>;
971 renesas,ipmmu-main = <&ipmmu_mm 1>;
972 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
973 #iommu-cells = <1>;
974 };
975
976 ipmmu_hc: mmu@e6570000 {
977 compatible = "renesas,ipmmu-r8a7796";
978 reg = <0 0xe6570000 0 0x1000>;
979 renesas,ipmmu-main = <&ipmmu_mm 2>;
980 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
981 #iommu-cells = <1>;
982 };
983
984 ipmmu_ir: mmu@ff8b0000 {
985 compatible = "renesas,ipmmu-r8a7796";
986 reg = <0 0xff8b0000 0 0x1000>;
987 renesas,ipmmu-main = <&ipmmu_mm 3>;
988 power-domains = <&sysc R8A7796_PD_A3IR>;
989 #iommu-cells = <1>;
990 };
991
992 ipmmu_mm: mmu@e67b0000 {
993 compatible = "renesas,ipmmu-r8a7796";
994 reg = <0 0xe67b0000 0 0x1000>;
995 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
996 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
997 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
998 #iommu-cells = <1>;
999 };
1000
1001 ipmmu_mp: mmu@ec670000 {
1002 compatible = "renesas,ipmmu-r8a7796";
1003 reg = <0 0xec670000 0 0x1000>;
1004 renesas,ipmmu-main = <&ipmmu_mm 4>;
1005 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1006 #iommu-cells = <1>;
1007 };
1008
1009 ipmmu_pv0: mmu@fd800000 {
1010 compatible = "renesas,ipmmu-r8a7796";
1011 reg = <0 0xfd800000 0 0x1000>;
1012 renesas,ipmmu-main = <&ipmmu_mm 5>;
1013 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1014 #iommu-cells = <1>;
1015 };
1016
1017 ipmmu_pv1: mmu@fd950000 {
1018 compatible = "renesas,ipmmu-r8a7796";
1019 reg = <0 0xfd950000 0 0x1000>;
1020 renesas,ipmmu-main = <&ipmmu_mm 6>;
1021 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1022 #iommu-cells = <1>;
1023 };
1024
1025 ipmmu_rt: mmu@ffc80000 {
1026 compatible = "renesas,ipmmu-r8a7796";
1027 reg = <0 0xffc80000 0 0x1000>;
1028 renesas,ipmmu-main = <&ipmmu_mm 7>;
1029 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1030 #iommu-cells = <1>;
1031 };
1032
1033 ipmmu_vc0: mmu@fe6b0000 {
1034 compatible = "renesas,ipmmu-r8a7796";
1035 reg = <0 0xfe6b0000 0 0x1000>;
1036 renesas,ipmmu-main = <&ipmmu_mm 8>;
1037 power-domains = <&sysc R8A7796_PD_A3VC>;
1038 #iommu-cells = <1>;
1039 };
1040
1041 ipmmu_vi0: mmu@febd0000 {
1042 compatible = "renesas,ipmmu-r8a7796";
1043 reg = <0 0xfebd0000 0 0x1000>;
1044 renesas,ipmmu-main = <&ipmmu_mm 9>;
1045 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1046 #iommu-cells = <1>;
1047 };
1048
1049 avb: ethernet@e6800000 {
1050 compatible = "renesas,etheravb-r8a7796",
1051 "renesas,etheravb-rcar-gen3";
1052 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1053 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1054 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1055 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1056 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1057 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1058 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1059 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1060 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1061 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1062 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1063 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1064 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1065 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1066 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1067 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1068 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1069 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1070 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1071 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1072 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1073 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1074 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1075 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1076 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1077 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1078 interrupt-names = "ch0", "ch1", "ch2", "ch3",
1079 "ch4", "ch5", "ch6", "ch7",
1080 "ch8", "ch9", "ch10", "ch11",
1081 "ch12", "ch13", "ch14", "ch15",
1082 "ch16", "ch17", "ch18", "ch19",
1083 "ch20", "ch21", "ch22", "ch23",
1084 "ch24";
1085 clocks = <&cpg CPG_MOD 812>;
1086 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1087 resets = <&cpg 812>;
1088 phy-mode = "rgmii";
1089 iommus = <&ipmmu_ds0 16>;
1090 #address-cells = <1>;
1091 #size-cells = <0>;
1092 status = "disabled";
1093 };
1094
1095 can0: can@e6c30000 {
1096 compatible = "renesas,can-r8a7796",
1097 "renesas,rcar-gen3-can";
1098 reg = <0 0xe6c30000 0 0x1000>;
1099 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1100 clocks = <&cpg CPG_MOD 916>,
1101 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1102 <&can_clk>;
1103 clock-names = "clkp1", "clkp2", "can_clk";
1104 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1105 assigned-clock-rates = <40000000>;
1106 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1107 resets = <&cpg 916>;
1108 status = "disabled";
1109 };
1110
1111 can1: can@e6c38000 {
1112 compatible = "renesas,can-r8a7796",
1113 "renesas,rcar-gen3-can";
1114 reg = <0 0xe6c38000 0 0x1000>;
1115 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1116 clocks = <&cpg CPG_MOD 915>,
1117 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1118 <&can_clk>;
1119 clock-names = "clkp1", "clkp2", "can_clk";
1120 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1121 assigned-clock-rates = <40000000>;
1122 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1123 resets = <&cpg 915>;
1124 status = "disabled";
1125 };
1126
1127 canfd: can@e66c0000 {
1128 compatible = "renesas,r8a7796-canfd",
1129 "renesas,rcar-gen3-canfd";
1130 reg = <0 0xe66c0000 0 0x8000>;
1131 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1132 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1133 clocks = <&cpg CPG_MOD 914>,
1134 <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1135 <&can_clk>;
1136 clock-names = "fck", "canfd", "can_clk";
1137 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1138 assigned-clock-rates = <40000000>;
1139 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1140 resets = <&cpg 914>;
1141 status = "disabled";
1142
1143 channel0 {
1144 status = "disabled";
1145 };
1146
1147 channel1 {
1148 status = "disabled";
1149 };
1150 };
1151
1152 pwm0: pwm@e6e30000 {
1153 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1154 reg = <0 0xe6e30000 0 8>;
1155 #pwm-cells = <2>;
1156 clocks = <&cpg CPG_MOD 523>;
1157 resets = <&cpg 523>;
1158 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1159 status = "disabled";
1160 };
1161
1162 pwm1: pwm@e6e31000 {
1163 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1164 reg = <0 0xe6e31000 0 8>;
1165 #pwm-cells = <2>;
1166 clocks = <&cpg CPG_MOD 523>;
1167 resets = <&cpg 523>;
1168 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1169 status = "disabled";
1170 };
1171
1172 pwm2: pwm@e6e32000 {
1173 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1174 reg = <0 0xe6e32000 0 8>;
1175 #pwm-cells = <2>;
1176 clocks = <&cpg CPG_MOD 523>;
1177 resets = <&cpg 523>;
1178 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1179 status = "disabled";
1180 };
1181
1182 pwm3: pwm@e6e33000 {
1183 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1184 reg = <0 0xe6e33000 0 8>;
1185 #pwm-cells = <2>;
1186 clocks = <&cpg CPG_MOD 523>;
1187 resets = <&cpg 523>;
1188 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1189 status = "disabled";
1190 };
1191
1192 pwm4: pwm@e6e34000 {
1193 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1194 reg = <0 0xe6e34000 0 8>;
1195 #pwm-cells = <2>;
1196 clocks = <&cpg CPG_MOD 523>;
1197 resets = <&cpg 523>;
1198 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1199 status = "disabled";
1200 };
1201
1202 pwm5: pwm@e6e35000 {
1203 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1204 reg = <0 0xe6e35000 0 8>;
1205 #pwm-cells = <2>;
1206 clocks = <&cpg CPG_MOD 523>;
1207 resets = <&cpg 523>;
1208 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1209 status = "disabled";
1210 };
1211
1212 pwm6: pwm@e6e36000 {
1213 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1214 reg = <0 0xe6e36000 0 8>;
1215 #pwm-cells = <2>;
1216 clocks = <&cpg CPG_MOD 523>;
1217 resets = <&cpg 523>;
1218 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1219 status = "disabled";
1220 };
1221
1222 scif0: serial@e6e60000 {
1223 compatible = "renesas,scif-r8a7796",
1224 "renesas,rcar-gen3-scif", "renesas,scif";
1225 reg = <0 0xe6e60000 0 64>;
1226 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&cpg CPG_MOD 207>,
1228 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1229 <&scif_clk>;
1230 clock-names = "fck", "brg_int", "scif_clk";
1231 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1232 <&dmac2 0x51>, <&dmac2 0x50>;
1233 dma-names = "tx", "rx", "tx", "rx";
1234 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1235 resets = <&cpg 207>;
1236 status = "disabled";
1237 };
1238
1239 scif1: serial@e6e68000 {
1240 compatible = "renesas,scif-r8a7796",
1241 "renesas,rcar-gen3-scif", "renesas,scif";
1242 reg = <0 0xe6e68000 0 64>;
1243 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1244 clocks = <&cpg CPG_MOD 206>,
1245 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1246 <&scif_clk>;
1247 clock-names = "fck", "brg_int", "scif_clk";
1248 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1249 <&dmac2 0x53>, <&dmac2 0x52>;
1250 dma-names = "tx", "rx", "tx", "rx";
1251 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1252 resets = <&cpg 206>;
1253 status = "disabled";
1254 };
1255
1256 scif2: serial@e6e88000 {
1257 compatible = "renesas,scif-r8a7796",
1258 "renesas,rcar-gen3-scif", "renesas,scif";
1259 reg = <0 0xe6e88000 0 64>;
1260 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1261 clocks = <&cpg CPG_MOD 310>,
1262 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1263 <&scif_clk>;
1264 clock-names = "fck", "brg_int", "scif_clk";
1265 dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1266 <&dmac2 0x13>, <&dmac2 0x12>;
1267 dma-names = "tx", "rx", "tx", "rx";
1268 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1269 resets = <&cpg 310>;
1270 status = "disabled";
1271 };
1272
1273 scif3: serial@e6c50000 {
1274 compatible = "renesas,scif-r8a7796",
1275 "renesas,rcar-gen3-scif", "renesas,scif";
1276 reg = <0 0xe6c50000 0 64>;
1277 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1278 clocks = <&cpg CPG_MOD 204>,
1279 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1280 <&scif_clk>;
1281 clock-names = "fck", "brg_int", "scif_clk";
1282 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1283 dma-names = "tx", "rx";
1284 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1285 resets = <&cpg 204>;
1286 status = "disabled";
1287 };
1288
1289 scif4: serial@e6c40000 {
1290 compatible = "renesas,scif-r8a7796",
1291 "renesas,rcar-gen3-scif", "renesas,scif";
1292 reg = <0 0xe6c40000 0 64>;
1293 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1294 clocks = <&cpg CPG_MOD 203>,
1295 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1296 <&scif_clk>;
1297 clock-names = "fck", "brg_int", "scif_clk";
1298 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1299 dma-names = "tx", "rx";
1300 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1301 resets = <&cpg 203>;
1302 status = "disabled";
1303 };
1304
1305 scif5: serial@e6f30000 {
1306 compatible = "renesas,scif-r8a7796",
1307 "renesas,rcar-gen3-scif", "renesas,scif";
1308 reg = <0 0xe6f30000 0 64>;
1309 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1310 clocks = <&cpg CPG_MOD 202>,
1311 <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1312 <&scif_clk>;
1313 clock-names = "fck", "brg_int", "scif_clk";
1314 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1315 <&dmac2 0x5b>, <&dmac2 0x5a>;
1316 dma-names = "tx", "rx", "tx", "rx";
1317 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1318 resets = <&cpg 202>;
1319 status = "disabled";
1320 };
1321
1322 msiof0: spi@e6e90000 {
1323 compatible = "renesas,msiof-r8a7796",
1324 "renesas,rcar-gen3-msiof";
1325 reg = <0 0xe6e90000 0 0x0064>;
1326 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1327 clocks = <&cpg CPG_MOD 211>;
1328 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1329 <&dmac2 0x41>, <&dmac2 0x40>;
1330 dma-names = "tx", "rx", "tx", "rx";
1331 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1332 resets = <&cpg 211>;
1333 #address-cells = <1>;
1334 #size-cells = <0>;
1335 status = "disabled";
1336 };
1337
1338 msiof1: spi@e6ea0000 {
1339 compatible = "renesas,msiof-r8a7796",
1340 "renesas,rcar-gen3-msiof";
1341 reg = <0 0xe6ea0000 0 0x0064>;
1342 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1343 clocks = <&cpg CPG_MOD 210>;
1344 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1345 <&dmac2 0x43>, <&dmac2 0x42>;
1346 dma-names = "tx", "rx", "tx", "rx";
1347 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1348 resets = <&cpg 210>;
1349 #address-cells = <1>;
1350 #size-cells = <0>;
1351 status = "disabled";
1352 };
1353
1354 msiof2: spi@e6c00000 {
1355 compatible = "renesas,msiof-r8a7796",
1356 "renesas,rcar-gen3-msiof";
1357 reg = <0 0xe6c00000 0 0x0064>;
1358 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1359 clocks = <&cpg CPG_MOD 209>;
1360 dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1361 dma-names = "tx", "rx";
1362 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1363 resets = <&cpg 209>;
1364 #address-cells = <1>;
1365 #size-cells = <0>;
1366 status = "disabled";
1367 };
1368
1369 msiof3: spi@e6c10000 {
1370 compatible = "renesas,msiof-r8a7796",
1371 "renesas,rcar-gen3-msiof";
1372 reg = <0 0xe6c10000 0 0x0064>;
1373 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1374 clocks = <&cpg CPG_MOD 208>;
1375 dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1376 dma-names = "tx", "rx";
1377 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1378 resets = <&cpg 208>;
1379 #address-cells = <1>;
1380 #size-cells = <0>;
1381 status = "disabled";
1382 };
1383
1384 vin0: video@e6ef0000 {
1385 compatible = "renesas,vin-r8a7796";
1386 reg = <0 0xe6ef0000 0 0x1000>;
1387 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1388 clocks = <&cpg CPG_MOD 811>;
1389 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1390 resets = <&cpg 811>;
1391 renesas,id = <0>;
1392 status = "disabled";
1393
1394 ports {
1395 #address-cells = <1>;
1396 #size-cells = <0>;
1397
1398 port@1 {
1399 #address-cells = <1>;
1400 #size-cells = <0>;
1401
1402 reg = <1>;
1403
1404 vin0csi20: endpoint@0 {
1405 reg = <0>;
1406 remote-endpoint = <&csi20vin0>;
1407 };
1408 vin0csi40: endpoint@2 {
1409 reg = <2>;
1410 remote-endpoint = <&csi40vin0>;
1411 };
1412 };
1413 };
1414 };
1415
1416 vin1: video@e6ef1000 {
1417 compatible = "renesas,vin-r8a7796";
1418 reg = <0 0xe6ef1000 0 0x1000>;
1419 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1420 clocks = <&cpg CPG_MOD 810>;
1421 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1422 resets = <&cpg 810>;
1423 renesas,id = <1>;
1424 status = "disabled";
1425
1426 ports {
1427 #address-cells = <1>;
1428 #size-cells = <0>;
1429
1430 port@1 {
1431 #address-cells = <1>;
1432 #size-cells = <0>;
1433
1434 reg = <1>;
1435
1436 vin1csi20: endpoint@0 {
1437 reg = <0>;
1438 remote-endpoint = <&csi20vin1>;
1439 };
1440 vin1csi40: endpoint@2 {
1441 reg = <2>;
1442 remote-endpoint = <&csi40vin1>;
1443 };
1444 };
1445 };
1446 };
1447
1448 vin2: video@e6ef2000 {
1449 compatible = "renesas,vin-r8a7796";
1450 reg = <0 0xe6ef2000 0 0x1000>;
1451 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1452 clocks = <&cpg CPG_MOD 809>;
1453 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1454 resets = <&cpg 809>;
1455 renesas,id = <2>;
1456 status = "disabled";
1457
1458 ports {
1459 #address-cells = <1>;
1460 #size-cells = <0>;
1461
1462 port@1 {
1463 #address-cells = <1>;
1464 #size-cells = <0>;
1465
1466 reg = <1>;
1467
1468 vin2csi20: endpoint@0 {
1469 reg = <0>;
1470 remote-endpoint = <&csi20vin2>;
1471 };
1472 vin2csi40: endpoint@2 {
1473 reg = <2>;
1474 remote-endpoint = <&csi40vin2>;
1475 };
1476 };
1477 };
1478 };
1479
1480 vin3: video@e6ef3000 {
1481 compatible = "renesas,vin-r8a7796";
1482 reg = <0 0xe6ef3000 0 0x1000>;
1483 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1484 clocks = <&cpg CPG_MOD 808>;
1485 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1486 resets = <&cpg 808>;
1487 renesas,id = <3>;
1488 status = "disabled";
1489
1490 ports {
1491 #address-cells = <1>;
1492 #size-cells = <0>;
1493
1494 port@1 {
1495 #address-cells = <1>;
1496 #size-cells = <0>;
1497
1498 reg = <1>;
1499
1500 vin3csi20: endpoint@0 {
1501 reg = <0>;
1502 remote-endpoint = <&csi20vin3>;
1503 };
1504 vin3csi40: endpoint@2 {
1505 reg = <2>;
1506 remote-endpoint = <&csi40vin3>;
1507 };
1508 };
1509 };
1510 };
1511
1512 vin4: video@e6ef4000 {
1513 compatible = "renesas,vin-r8a7796";
1514 reg = <0 0xe6ef4000 0 0x1000>;
1515 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1516 clocks = <&cpg CPG_MOD 807>;
1517 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1518 resets = <&cpg 807>;
1519 renesas,id = <4>;
1520 status = "disabled";
1521
1522 ports {
1523 #address-cells = <1>;
1524 #size-cells = <0>;
1525
1526 port@1 {
1527 #address-cells = <1>;
1528 #size-cells = <0>;
1529
1530 reg = <1>;
1531
1532 vin4csi20: endpoint@0 {
1533 reg = <0>;
1534 remote-endpoint = <&csi20vin4>;
1535 };
1536 vin4csi40: endpoint@2 {
1537 reg = <2>;
1538 remote-endpoint = <&csi40vin4>;
1539 };
1540 };
1541 };
1542 };
1543
1544 vin5: video@e6ef5000 {
1545 compatible = "renesas,vin-r8a7796";
1546 reg = <0 0xe6ef5000 0 0x1000>;
1547 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1548 clocks = <&cpg CPG_MOD 806>;
1549 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1550 resets = <&cpg 806>;
1551 renesas,id = <5>;
1552 status = "disabled";
1553
1554 ports {
1555 #address-cells = <1>;
1556 #size-cells = <0>;
1557
1558 port@1 {
1559 #address-cells = <1>;
1560 #size-cells = <0>;
1561
1562 reg = <1>;
1563
1564 vin5csi20: endpoint@0 {
1565 reg = <0>;
1566 remote-endpoint = <&csi20vin5>;
1567 };
1568 vin5csi40: endpoint@2 {
1569 reg = <2>;
1570 remote-endpoint = <&csi40vin5>;
1571 };
1572 };
1573 };
1574 };
1575
1576 vin6: video@e6ef6000 {
1577 compatible = "renesas,vin-r8a7796";
1578 reg = <0 0xe6ef6000 0 0x1000>;
1579 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1580 clocks = <&cpg CPG_MOD 805>;
1581 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1582 resets = <&cpg 805>;
1583 renesas,id = <6>;
1584 status = "disabled";
1585
1586 ports {
1587 #address-cells = <1>;
1588 #size-cells = <0>;
1589
1590 port@1 {
1591 #address-cells = <1>;
1592 #size-cells = <0>;
1593
1594 reg = <1>;
1595
1596 vin6csi20: endpoint@0 {
1597 reg = <0>;
1598 remote-endpoint = <&csi20vin6>;
1599 };
1600 vin6csi40: endpoint@2 {
1601 reg = <2>;
1602 remote-endpoint = <&csi40vin6>;
1603 };
1604 };
1605 };
1606 };
1607
1608 vin7: video@e6ef7000 {
1609 compatible = "renesas,vin-r8a7796";
1610 reg = <0 0xe6ef7000 0 0x1000>;
1611 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1612 clocks = <&cpg CPG_MOD 804>;
1613 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1614 resets = <&cpg 804>;
1615 renesas,id = <7>;
1616 status = "disabled";
1617
1618 ports {
1619 #address-cells = <1>;
1620 #size-cells = <0>;
1621
1622 port@1 {
1623 #address-cells = <1>;
1624 #size-cells = <0>;
1625
1626 reg = <1>;
1627
1628 vin7csi20: endpoint@0 {
1629 reg = <0>;
1630 remote-endpoint = <&csi20vin7>;
1631 };
1632 vin7csi40: endpoint@2 {
1633 reg = <2>;
1634 remote-endpoint = <&csi40vin7>;
1635 };
1636 };
1637 };
1638 };
1639
1640 drif00: rif@e6f40000 {
1641 compatible = "renesas,r8a7796-drif",
1642 "renesas,rcar-gen3-drif";
1643 reg = <0 0xe6f40000 0 0x64>;
1644 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1645 clocks = <&cpg CPG_MOD 515>;
1646 clock-names = "fck";
1647 dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1648 dma-names = "rx", "rx";
1649 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1650 resets = <&cpg 515>;
1651 renesas,bonding = <&drif01>;
1652 status = "disabled";
1653 };
1654
1655 drif01: rif@e6f50000 {
1656 compatible = "renesas,r8a7796-drif",
1657 "renesas,rcar-gen3-drif";
1658 reg = <0 0xe6f50000 0 0x64>;
1659 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1660 clocks = <&cpg CPG_MOD 514>;
1661 clock-names = "fck";
1662 dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1663 dma-names = "rx", "rx";
1664 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1665 resets = <&cpg 514>;
1666 renesas,bonding = <&drif00>;
1667 status = "disabled";
1668 };
1669
1670 drif10: rif@e6f60000 {
1671 compatible = "renesas,r8a7796-drif",
1672 "renesas,rcar-gen3-drif";
1673 reg = <0 0xe6f60000 0 0x64>;
1674 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1675 clocks = <&cpg CPG_MOD 513>;
1676 clock-names = "fck";
1677 dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1678 dma-names = "rx", "rx";
1679 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1680 resets = <&cpg 513>;
1681 renesas,bonding = <&drif11>;
1682 status = "disabled";
1683 };
1684
1685 drif11: rif@e6f70000 {
1686 compatible = "renesas,r8a7796-drif",
1687 "renesas,rcar-gen3-drif";
1688 reg = <0 0xe6f70000 0 0x64>;
1689 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1690 clocks = <&cpg CPG_MOD 512>;
1691 clock-names = "fck";
1692 dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1693 dma-names = "rx", "rx";
1694 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1695 resets = <&cpg 512>;
1696 renesas,bonding = <&drif10>;
1697 status = "disabled";
1698 };
1699
1700 drif20: rif@e6f80000 {
1701 compatible = "renesas,r8a7796-drif",
1702 "renesas,rcar-gen3-drif";
1703 reg = <0 0xe6f80000 0 0x64>;
1704 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1705 clocks = <&cpg CPG_MOD 511>;
1706 clock-names = "fck";
1707 dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1708 dma-names = "rx", "rx";
1709 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1710 resets = <&cpg 511>;
1711 renesas,bonding = <&drif21>;
1712 status = "disabled";
1713 };
1714
1715 drif21: rif@e6f90000 {
1716 compatible = "renesas,r8a7796-drif",
1717 "renesas,rcar-gen3-drif";
1718 reg = <0 0xe6f90000 0 0x64>;
1719 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1720 clocks = <&cpg CPG_MOD 510>;
1721 clock-names = "fck";
1722 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1723 dma-names = "rx", "rx";
1724 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1725 resets = <&cpg 510>;
1726 renesas,bonding = <&drif20>;
1727 status = "disabled";
1728 };
1729
1730 drif30: rif@e6fa0000 {
1731 compatible = "renesas,r8a7796-drif",
1732 "renesas,rcar-gen3-drif";
1733 reg = <0 0xe6fa0000 0 0x64>;
1734 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1735 clocks = <&cpg CPG_MOD 509>;
1736 clock-names = "fck";
1737 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1738 dma-names = "rx", "rx";
1739 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1740 resets = <&cpg 509>;
1741 renesas,bonding = <&drif31>;
1742 status = "disabled";
1743 };
1744
1745 drif31: rif@e6fb0000 {
1746 compatible = "renesas,r8a7796-drif",
1747 "renesas,rcar-gen3-drif";
1748 reg = <0 0xe6fb0000 0 0x64>;
1749 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1750 clocks = <&cpg CPG_MOD 508>;
1751 clock-names = "fck";
1752 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1753 dma-names = "rx", "rx";
1754 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1755 resets = <&cpg 508>;
1756 renesas,bonding = <&drif30>;
1757 status = "disabled";
1758 };
1759
1760 rcar_sound: sound@ec500000 {
1761 /*
1762 * #sound-dai-cells is required
1763 *
1764 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1765 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1766 */
1767 /*
1768 * #clock-cells is required for audio_clkout0/1/2/3
1769 *
1770 * clkout : #clock-cells = <0>; <&rcar_sound>;
1771 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>;
1772 */
1773 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1774 reg = <0 0xec500000 0 0x1000>, /* SCU */
1775 <0 0xec5a0000 0 0x100>, /* ADG */
1776 <0 0xec540000 0 0x1000>, /* SSIU */
1777 <0 0xec541000 0 0x280>, /* SSI */
1778 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1779 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1780
1781 clocks = <&cpg CPG_MOD 1005>,
1782 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1783 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1784 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1785 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1786 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1787 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1788 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1789 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1790 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1791 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1792 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1793 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1794 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1795 <&audio_clk_a>, <&audio_clk_b>,
1796 <&audio_clk_c>,
1797 <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1798 clock-names = "ssi-all",
1799 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1800 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1801 "ssi.1", "ssi.0",
1802 "src.9", "src.8", "src.7", "src.6",
1803 "src.5", "src.4", "src.3", "src.2",
1804 "src.1", "src.0",
1805 "mix.1", "mix.0",
1806 "ctu.1", "ctu.0",
1807 "dvc.0", "dvc.1",
1808 "clk_a", "clk_b", "clk_c", "clk_i";
1809 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1810 resets = <&cpg 1005>,
1811 <&cpg 1006>, <&cpg 1007>,
1812 <&cpg 1008>, <&cpg 1009>,
1813 <&cpg 1010>, <&cpg 1011>,
1814 <&cpg 1012>, <&cpg 1013>,
1815 <&cpg 1014>, <&cpg 1015>;
1816 reset-names = "ssi-all",
1817 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1818 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1819 "ssi.1", "ssi.0";
1820 status = "disabled";
1821
1822 rcar_sound,dvc {
1823 dvc0: dvc-0 {
1824 dmas = <&audma1 0xbc>;
1825 dma-names = "tx";
1826 };
1827 dvc1: dvc-1 {
1828 dmas = <&audma1 0xbe>;
1829 dma-names = "tx";
1830 };
1831 };
1832
1833 rcar_sound,mix {
1834 mix0: mix-0 { };
1835 mix1: mix-1 { };
1836 };
1837
1838 rcar_sound,ctu {
1839 ctu00: ctu-0 { };
1840 ctu01: ctu-1 { };
1841 ctu02: ctu-2 { };
1842 ctu03: ctu-3 { };
1843 ctu10: ctu-4 { };
1844 ctu11: ctu-5 { };
1845 ctu12: ctu-6 { };
1846 ctu13: ctu-7 { };
1847 };
1848
1849 rcar_sound,src {
1850 src0: src-0 {
1851 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1852 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1853 dma-names = "rx", "tx";
1854 };
1855 src1: src-1 {
1856 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1857 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1858 dma-names = "rx", "tx";
1859 };
1860 src2: src-2 {
1861 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1862 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1863 dma-names = "rx", "tx";
1864 };
1865 src3: src-3 {
1866 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1867 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1868 dma-names = "rx", "tx";
1869 };
1870 src4: src-4 {
1871 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1872 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1873 dma-names = "rx", "tx";
1874 };
1875 src5: src-5 {
1876 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1877 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1878 dma-names = "rx", "tx";
1879 };
1880 src6: src-6 {
1881 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1882 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1883 dma-names = "rx", "tx";
1884 };
1885 src7: src-7 {
1886 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1887 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1888 dma-names = "rx", "tx";
1889 };
1890 src8: src-8 {
1891 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1892 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1893 dma-names = "rx", "tx";
1894 };
1895 src9: src-9 {
1896 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1897 dmas = <&audma0 0x97>, <&audma1 0xba>;
1898 dma-names = "rx", "tx";
1899 };
1900 };
1901
1902 rcar_sound,ssiu {
1903 ssiu00: ssiu-0 {
1904 dmas = <&audma0 0x15>, <&audma1 0x16>;
1905 dma-names = "rx", "tx";
1906 };
1907 ssiu01: ssiu-1 {
1908 dmas = <&audma0 0x35>, <&audma1 0x36>;
1909 dma-names = "rx", "tx";
1910 };
1911 ssiu02: ssiu-2 {
1912 dmas = <&audma0 0x37>, <&audma1 0x38>;
1913 dma-names = "rx", "tx";
1914 };
1915 ssiu03: ssiu-3 {
1916 dmas = <&audma0 0x47>, <&audma1 0x48>;
1917 dma-names = "rx", "tx";
1918 };
1919 ssiu04: ssiu-4 {
1920 dmas = <&audma0 0x3F>, <&audma1 0x40>;
1921 dma-names = "rx", "tx";
1922 };
1923 ssiu05: ssiu-5 {
1924 dmas = <&audma0 0x43>, <&audma1 0x44>;
1925 dma-names = "rx", "tx";
1926 };
1927 ssiu06: ssiu-6 {
1928 dmas = <&audma0 0x4F>, <&audma1 0x50>;
1929 dma-names = "rx", "tx";
1930 };
1931 ssiu07: ssiu-7 {
1932 dmas = <&audma0 0x53>, <&audma1 0x54>;
1933 dma-names = "rx", "tx";
1934 };
1935 ssiu10: ssiu-8 {
1936 dmas = <&audma0 0x49>, <&audma1 0x4a>;
1937 dma-names = "rx", "tx";
1938 };
1939 ssiu11: ssiu-9 {
1940 dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1941 dma-names = "rx", "tx";
1942 };
1943 ssiu12: ssiu-10 {
1944 dmas = <&audma0 0x57>, <&audma1 0x58>;
1945 dma-names = "rx", "tx";
1946 };
1947 ssiu13: ssiu-11 {
1948 dmas = <&audma0 0x59>, <&audma1 0x5A>;
1949 dma-names = "rx", "tx";
1950 };
1951 ssiu14: ssiu-12 {
1952 dmas = <&audma0 0x5F>, <&audma1 0x60>;
1953 dma-names = "rx", "tx";
1954 };
1955 ssiu15: ssiu-13 {
1956 dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1957 dma-names = "rx", "tx";
1958 };
1959 ssiu16: ssiu-14 {
1960 dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1961 dma-names = "rx", "tx";
1962 };
1963 ssiu17: ssiu-15 {
1964 dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1965 dma-names = "rx", "tx";
1966 };
1967 ssiu20: ssiu-16 {
1968 dmas = <&audma0 0x63>, <&audma1 0x64>;
1969 dma-names = "rx", "tx";
1970 };
1971 ssiu21: ssiu-17 {
1972 dmas = <&audma0 0x67>, <&audma1 0x68>;
1973 dma-names = "rx", "tx";
1974 };
1975 ssiu22: ssiu-18 {
1976 dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1977 dma-names = "rx", "tx";
1978 };
1979 ssiu23: ssiu-19 {
1980 dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1981 dma-names = "rx", "tx";
1982 };
1983 ssiu24: ssiu-20 {
1984 dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1985 dma-names = "rx", "tx";
1986 };
1987 ssiu25: ssiu-21 {
1988 dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1989 dma-names = "rx", "tx";
1990 };
1991 ssiu26: ssiu-22 {
1992 dmas = <&audma0 0xED>, <&audma1 0xEE>;
1993 dma-names = "rx", "tx";
1994 };
1995 ssiu27: ssiu-23 {
1996 dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1997 dma-names = "rx", "tx";
1998 };
1999 ssiu30: ssiu-24 {
2000 dmas = <&audma0 0x6f>, <&audma1 0x70>;
2001 dma-names = "rx", "tx";
2002 };
2003 ssiu31: ssiu-25 {
2004 dmas = <&audma0 0x21>, <&audma1 0x22>;
2005 dma-names = "rx", "tx";
2006 };
2007 ssiu32: ssiu-26 {
2008 dmas = <&audma0 0x23>, <&audma1 0x24>;
2009 dma-names = "rx", "tx";
2010 };
2011 ssiu33: ssiu-27 {
2012 dmas = <&audma0 0x25>, <&audma1 0x26>;
2013 dma-names = "rx", "tx";
2014 };
2015 ssiu34: ssiu-28 {
2016 dmas = <&audma0 0x27>, <&audma1 0x28>;
2017 dma-names = "rx", "tx";
2018 };
2019 ssiu35: ssiu-29 {
2020 dmas = <&audma0 0x29>, <&audma1 0x2A>;
2021 dma-names = "rx", "tx";
2022 };
2023 ssiu36: ssiu-30 {
2024 dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2025 dma-names = "rx", "tx";
2026 };
2027 ssiu37: ssiu-31 {
2028 dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2029 dma-names = "rx", "tx";
2030 };
2031 ssiu40: ssiu-32 {
2032 dmas = <&audma0 0x71>, <&audma1 0x72>;
2033 dma-names = "rx", "tx";
2034 };
2035 ssiu41: ssiu-33 {
2036 dmas = <&audma0 0x17>, <&audma1 0x18>;
2037 dma-names = "rx", "tx";
2038 };
2039 ssiu42: ssiu-34 {
2040 dmas = <&audma0 0x19>, <&audma1 0x1A>;
2041 dma-names = "rx", "tx";
2042 };
2043 ssiu43: ssiu-35 {
2044 dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2045 dma-names = "rx", "tx";
2046 };
2047 ssiu44: ssiu-36 {
2048 dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2049 dma-names = "rx", "tx";
2050 };
2051 ssiu45: ssiu-37 {
2052 dmas = <&audma0 0x1F>, <&audma1 0x20>;
2053 dma-names = "rx", "tx";
2054 };
2055 ssiu46: ssiu-38 {
2056 dmas = <&audma0 0x31>, <&audma1 0x32>;
2057 dma-names = "rx", "tx";
2058 };
2059 ssiu47: ssiu-39 {
2060 dmas = <&audma0 0x33>, <&audma1 0x34>;
2061 dma-names = "rx", "tx";
2062 };
2063 ssiu50: ssiu-40 {
2064 dmas = <&audma0 0x73>, <&audma1 0x74>;
2065 dma-names = "rx", "tx";
2066 };
2067 ssiu60: ssiu-41 {
2068 dmas = <&audma0 0x75>, <&audma1 0x76>;
2069 dma-names = "rx", "tx";
2070 };
2071 ssiu70: ssiu-42 {
2072 dmas = <&audma0 0x79>, <&audma1 0x7a>;
2073 dma-names = "rx", "tx";
2074 };
2075 ssiu80: ssiu-43 {
2076 dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2077 dma-names = "rx", "tx";
2078 };
2079 ssiu90: ssiu-44 {
2080 dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2081 dma-names = "rx", "tx";
2082 };
2083 ssiu91: ssiu-45 {
2084 dmas = <&audma0 0x7F>, <&audma1 0x80>;
2085 dma-names = "rx", "tx";
2086 };
2087 ssiu92: ssiu-46 {
2088 dmas = <&audma0 0x81>, <&audma1 0x82>;
2089 dma-names = "rx", "tx";
2090 };
2091 ssiu93: ssiu-47 {
2092 dmas = <&audma0 0x83>, <&audma1 0x84>;
2093 dma-names = "rx", "tx";
2094 };
2095 ssiu94: ssiu-48 {
2096 dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2097 dma-names = "rx", "tx";
2098 };
2099 ssiu95: ssiu-49 {
2100 dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2101 dma-names = "rx", "tx";
2102 };
2103 ssiu96: ssiu-50 {
2104 dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2105 dma-names = "rx", "tx";
2106 };
2107 ssiu97: ssiu-51 {
2108 dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2109 dma-names = "rx", "tx";
2110 };
2111 };
2112
2113 rcar_sound,ssi {
2114 ssi0: ssi-0 {
2115 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2116 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
2117 dma-names = "rx", "tx", "rxu", "txu";
2118 };
2119 ssi1: ssi-1 {
2120 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2121 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
2122 dma-names = "rx", "tx", "rxu", "txu";
2123 };
2124 ssi2: ssi-2 {
2125 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2126 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
2127 dma-names = "rx", "tx", "rxu", "txu";
2128 };
2129 ssi3: ssi-3 {
2130 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2131 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
2132 dma-names = "rx", "tx", "rxu", "txu";
2133 };
2134 ssi4: ssi-4 {
2135 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2136 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
2137 dma-names = "rx", "tx", "rxu", "txu";
2138 };
2139 ssi5: ssi-5 {
2140 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2141 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
2142 dma-names = "rx", "tx", "rxu", "txu";
2143 };
2144 ssi6: ssi-6 {
2145 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2146 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
2147 dma-names = "rx", "tx", "rxu", "txu";
2148 };
2149 ssi7: ssi-7 {
2150 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2151 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
2152 dma-names = "rx", "tx", "rxu", "txu";
2153 };
2154 ssi8: ssi-8 {
2155 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2156 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
2157 dma-names = "rx", "tx", "rxu", "txu";
2158 };
2159 ssi9: ssi-9 {
2160 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2161 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
2162 dma-names = "rx", "tx", "rxu", "txu";
2163 };
2164 };
2165
2166 ports {
2167 #address-cells = <1>;
2168 #size-cells = <0>;
2169 port@0 {
2170 reg = <0>;
2171 };
2172 port@1 {
2173 reg = <1>;
2174 };
2175 };
2176 };
2177
2178 audma0: dma-controller@ec700000 {
2179 compatible = "renesas,dmac-r8a7796",
2180 "renesas,rcar-dmac";
2181 reg = <0 0xec700000 0 0x10000>;
2182 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
2183 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
2184 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
2185 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
2186 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
2187 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
2188 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
2189 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
2190 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
2191 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
2192 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
2193 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
2194 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
2195 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
2196 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
2197 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
2198 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2199 interrupt-names = "error",
2200 "ch0", "ch1", "ch2", "ch3",
2201 "ch4", "ch5", "ch6", "ch7",
2202 "ch8", "ch9", "ch10", "ch11",
2203 "ch12", "ch13", "ch14", "ch15";
2204 clocks = <&cpg CPG_MOD 502>;
2205 clock-names = "fck";
2206 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2207 resets = <&cpg 502>;
2208 #dma-cells = <1>;
2209 dma-channels = <16>;
2210 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2211 <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2212 <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2213 <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2214 <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2215 <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2216 <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2217 <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2218 };
2219
2220 audma1: dma-controller@ec720000 {
2221 compatible = "renesas,dmac-r8a7796",
2222 "renesas,rcar-dmac";
2223 reg = <0 0xec720000 0 0x10000>;
2224 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
2225 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
2226 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
2227 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
2228 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
2229 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
2230 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
2231 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
2232 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
2233 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
2234 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
2235 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
2236 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
2237 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
2238 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
2239 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
2240 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2241 interrupt-names = "error",
2242 "ch0", "ch1", "ch2", "ch3",
2243 "ch4", "ch5", "ch6", "ch7",
2244 "ch8", "ch9", "ch10", "ch11",
2245 "ch12", "ch13", "ch14", "ch15";
2246 clocks = <&cpg CPG_MOD 501>;
2247 clock-names = "fck";
2248 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2249 resets = <&cpg 501>;
2250 #dma-cells = <1>;
2251 dma-channels = <16>;
2252 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2253 <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2254 <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2255 <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2256 <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2257 <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2258 <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2259 <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2260 };
2261
2262 xhci0: usb@ee000000 {
2263 compatible = "renesas,xhci-r8a7796",
2264 "renesas,rcar-gen3-xhci";
2265 reg = <0 0xee000000 0 0xc00>;
2266 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2267 clocks = <&cpg CPG_MOD 328>;
2268 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2269 resets = <&cpg 328>;
2270 status = "disabled";
2271 };
2272
2273 usb3_peri0: usb@ee020000 {
2274 compatible = "renesas,r8a7796-usb3-peri",
2275 "renesas,rcar-gen3-usb3-peri";
2276 reg = <0 0xee020000 0 0x400>;
2277 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2278 clocks = <&cpg CPG_MOD 328>;
2279 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2280 resets = <&cpg 328>;
2281 status = "disabled";
2282 };
2283
2284 ohci0: usb@ee080000 {
2285 compatible = "generic-ohci";
2286 reg = <0 0xee080000 0 0x100>;
2287 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2288 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2289 phys = <&usb2_phy0>;
2290 phy-names = "usb";
2291 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2292 resets = <&cpg 703>, <&cpg 704>;
2293 status = "disabled";
2294 };
2295
2296 ohci1: usb@ee0a0000 {
2297 compatible = "generic-ohci";
2298 reg = <0 0xee0a0000 0 0x100>;
2299 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2300 clocks = <&cpg CPG_MOD 702>;
2301 phys = <&usb2_phy1>;
2302 phy-names = "usb";
2303 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2304 resets = <&cpg 702>;
2305 status = "disabled";
2306 };
2307
2308 ehci0: usb@ee080100 {
2309 compatible = "generic-ehci";
2310 reg = <0 0xee080100 0 0x100>;
2311 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2312 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2313 phys = <&usb2_phy0>;
2314 phy-names = "usb";
2315 companion = <&ohci0>;
2316 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2317 resets = <&cpg 703>, <&cpg 704>;
2318 status = "disabled";
2319 };
2320
2321 ehci1: usb@ee0a0100 {
2322 compatible = "generic-ehci";
2323 reg = <0 0xee0a0100 0 0x100>;
2324 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2325 clocks = <&cpg CPG_MOD 702>;
2326 phys = <&usb2_phy1>;
2327 phy-names = "usb";
2328 companion = <&ohci1>;
2329 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2330 resets = <&cpg 702>;
2331 status = "disabled";
2332 };
2333
2334 usb2_phy0: usb-phy@ee080200 {
2335 compatible = "renesas,usb2-phy-r8a7796",
2336 "renesas,rcar-gen3-usb2-phy";
2337 reg = <0 0xee080200 0 0x700>;
2338 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2339 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2340 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2341 resets = <&cpg 703>, <&cpg 704>;
2342 #phy-cells = <0>;
2343 status = "disabled";
2344 };
2345
2346 usb2_phy1: usb-phy@ee0a0200 {
2347 compatible = "renesas,usb2-phy-r8a7796",
2348 "renesas,rcar-gen3-usb2-phy";
2349 reg = <0 0xee0a0200 0 0x700>;
2350 clocks = <&cpg CPG_MOD 702>;
2351 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2352 resets = <&cpg 702>;
2353 #phy-cells = <0>;
2354 status = "disabled";
2355 };
2356
2357 sdhi0: sd@ee100000 {
2358 compatible = "renesas,sdhi-r8a7796",
2359 "renesas,rcar-gen3-sdhi";
2360 reg = <0 0xee100000 0 0x2000>;
2361 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2362 clocks = <&cpg CPG_MOD 314>;
2363 max-frequency = <200000000>;
2364 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2365 resets = <&cpg 314>;
2366 status = "disabled";
2367 };
2368
2369 sdhi1: sd@ee120000 {
2370 compatible = "renesas,sdhi-r8a7796",
2371 "renesas,rcar-gen3-sdhi";
2372 reg = <0 0xee120000 0 0x2000>;
2373 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2374 clocks = <&cpg CPG_MOD 313>;
2375 max-frequency = <200000000>;
2376 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2377 resets = <&cpg 313>;
2378 status = "disabled";
2379 };
2380
2381 sdhi2: sd@ee140000 {
2382 compatible = "renesas,sdhi-r8a7796",
2383 "renesas,rcar-gen3-sdhi";
2384 reg = <0 0xee140000 0 0x2000>;
2385 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2386 clocks = <&cpg CPG_MOD 312>;
2387 max-frequency = <200000000>;
2388 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2389 resets = <&cpg 312>;
2390 status = "disabled";
2391 };
2392
2393 sdhi3: sd@ee160000 {
2394 compatible = "renesas,sdhi-r8a7796",
2395 "renesas,rcar-gen3-sdhi";
2396 reg = <0 0xee160000 0 0x2000>;
2397 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2398 clocks = <&cpg CPG_MOD 311>;
2399 max-frequency = <200000000>;
2400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2401 resets = <&cpg 311>;
2402 status = "disabled";
2403 };
2404
2405 gic: interrupt-controller@f1010000 {
2406 compatible = "arm,gic-400";
2407 #interrupt-cells = <3>;
2408 #address-cells = <0>;
2409 interrupt-controller;
2410 reg = <0x0 0xf1010000 0 0x1000>,
2411 <0x0 0xf1020000 0 0x20000>,
2412 <0x0 0xf1040000 0 0x20000>,
2413 <0x0 0xf1060000 0 0x20000>;
2414 interrupts = <GIC_PPI 9
2415 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2416 clocks = <&cpg CPG_MOD 408>;
2417 clock-names = "clk";
2418 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2419 resets = <&cpg 408>;
2420 };
2421
2422 pciec0: pcie@fe000000 {
2423 compatible = "renesas,pcie-r8a7796",
2424 "renesas,pcie-rcar-gen3";
2425 reg = <0 0xfe000000 0 0x80000>;
2426 #address-cells = <3>;
2427 #size-cells = <2>;
2428 bus-range = <0x00 0xff>;
2429 device_type = "pci";
2430 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
2431 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
2432 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
2433 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2434 /* Map all possible DDR as inbound ranges */
2435 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2436 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2437 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2438 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2439 #interrupt-cells = <1>;
2440 interrupt-map-mask = <0 0 0 0>;
2441 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2442 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2443 clock-names = "pcie", "pcie_bus";
2444 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2445 resets = <&cpg 319>;
2446 status = "disabled";
2447 };
2448
2449 pciec1: pcie@ee800000 {
2450 compatible = "renesas,pcie-r8a7796",
2451 "renesas,pcie-rcar-gen3";
2452 reg = <0 0xee800000 0 0x80000>;
2453 #address-cells = <3>;
2454 #size-cells = <2>;
2455 bus-range = <0x00 0xff>;
2456 device_type = "pci";
2457 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
2458 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
2459 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
2460 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2461 /* Map all possible DDR as inbound ranges */
2462 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2463 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2464 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2465 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2466 #interrupt-cells = <1>;
2467 interrupt-map-mask = <0 0 0 0>;
2468 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2469 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2470 clock-names = "pcie", "pcie_bus";
2471 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2472 resets = <&cpg 318>;
2473 status = "disabled";
2474 };
2475
2476 imr-lx4@fe860000 {
2477 compatible = "renesas,r8a7796-imr-lx4",
2478 "renesas,imr-lx4";
2479 reg = <0 0xfe860000 0 0x2000>;
2480 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2481 clocks = <&cpg CPG_MOD 823>;
2482 power-domains = <&sysc R8A7796_PD_A3VC>;
2483 resets = <&cpg 823>;
2484 };
2485
2486 imr-lx4@fe870000 {
2487 compatible = "renesas,r8a7796-imr-lx4",
2488 "renesas,imr-lx4";
2489 reg = <0 0xfe870000 0 0x2000>;
2490 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2491 clocks = <&cpg CPG_MOD 822>;
2492 power-domains = <&sysc R8A7796_PD_A3VC>;
2493 resets = <&cpg 822>;
2494 };
2495
2496 fdp1@fe940000 {
2497 compatible = "renesas,fdp1";
2498 reg = <0 0xfe940000 0 0x2400>;
2499 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2500 clocks = <&cpg CPG_MOD 119>;
2501 power-domains = <&sysc R8A7796_PD_A3VC>;
2502 resets = <&cpg 119>;
2503 renesas,fcp = <&fcpf0>;
2504 };
2505
2506 fcpf0: fcp@fe950000 {
2507 compatible = "renesas,fcpf";
2508 reg = <0 0xfe950000 0 0x200>;
2509 clocks = <&cpg CPG_MOD 615>;
2510 power-domains = <&sysc R8A7796_PD_A3VC>;
2511 resets = <&cpg 615>;
2512 };
2513
2514 fcpvb0: fcp@fe96f000 {
2515 compatible = "renesas,fcpv";
2516 reg = <0 0xfe96f000 0 0x200>;
2517 clocks = <&cpg CPG_MOD 607>;
2518 power-domains = <&sysc R8A7796_PD_A3VC>;
2519 resets = <&cpg 607>;
2520 };
2521
2522 fcpvi0: fcp@fe9af000 {
2523 compatible = "renesas,fcpv";
2524 reg = <0 0xfe9af000 0 0x200>;
2525 clocks = <&cpg CPG_MOD 611>;
2526 power-domains = <&sysc R8A7796_PD_A3VC>;
2527 resets = <&cpg 611>;
2528 iommus = <&ipmmu_vc0 19>;
2529 };
2530
2531 fcpvd0: fcp@fea27000 {
2532 compatible = "renesas,fcpv";
2533 reg = <0 0xfea27000 0 0x200>;
2534 clocks = <&cpg CPG_MOD 603>;
2535 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2536 resets = <&cpg 603>;
2537 iommus = <&ipmmu_vi0 8>;
2538 };
2539
2540 fcpvd1: fcp@fea2f000 {
2541 compatible = "renesas,fcpv";
2542 reg = <0 0xfea2f000 0 0x200>;
2543 clocks = <&cpg CPG_MOD 602>;
2544 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2545 resets = <&cpg 602>;
2546 iommus = <&ipmmu_vi0 9>;
2547 };
2548
2549 fcpvd2: fcp@fea37000 {
2550 compatible = "renesas,fcpv";
2551 reg = <0 0xfea37000 0 0x200>;
2552 clocks = <&cpg CPG_MOD 601>;
2553 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2554 resets = <&cpg 601>;
2555 iommus = <&ipmmu_vi0 10>;
2556 };
2557
2558 vspb: vsp@fe960000 {
2559 compatible = "renesas,vsp2";
2560 reg = <0 0xfe960000 0 0x8000>;
2561 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2562 clocks = <&cpg CPG_MOD 626>;
2563 power-domains = <&sysc R8A7796_PD_A3VC>;
2564 resets = <&cpg 626>;
2565
2566 renesas,fcp = <&fcpvb0>;
2567 };
2568
2569 vspd0: vsp@fea20000 {
2570 compatible = "renesas,vsp2";
2571 reg = <0 0xfea20000 0 0x5000>;
2572 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2573 clocks = <&cpg CPG_MOD 623>;
2574 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2575 resets = <&cpg 623>;
2576
2577 renesas,fcp = <&fcpvd0>;
2578 };
2579
2580 vspd1: vsp@fea28000 {
2581 compatible = "renesas,vsp2";
2582 reg = <0 0xfea28000 0 0x5000>;
2583 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2584 clocks = <&cpg CPG_MOD 622>;
2585 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2586 resets = <&cpg 622>;
2587
2588 renesas,fcp = <&fcpvd1>;
2589 };
2590
2591 vspd2: vsp@fea30000 {
2592 compatible = "renesas,vsp2";
2593 reg = <0 0xfea30000 0 0x5000>;
2594 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2595 clocks = <&cpg CPG_MOD 621>;
2596 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2597 resets = <&cpg 621>;
2598
2599 renesas,fcp = <&fcpvd2>;
2600 };
2601
2602 vspi0: vsp@fe9a0000 {
2603 compatible = "renesas,vsp2";
2604 reg = <0 0xfe9a0000 0 0x8000>;
2605 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2606 clocks = <&cpg CPG_MOD 631>;
2607 power-domains = <&sysc R8A7796_PD_A3VC>;
2608 resets = <&cpg 631>;
2609
2610 renesas,fcp = <&fcpvi0>;
2611 };
2612
2613 csi20: csi2@fea80000 {
2614 compatible = "renesas,r8a7796-csi2";
2615 reg = <0 0xfea80000 0 0x10000>;
2616 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2617 clocks = <&cpg CPG_MOD 714>;
2618 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2619 resets = <&cpg 714>;
2620 status = "disabled";
2621
2622 ports {
2623 #address-cells = <1>;
2624 #size-cells = <0>;
2625
2626 port@1 {
2627 #address-cells = <1>;
2628 #size-cells = <0>;
2629
2630 reg = <1>;
2631
2632 csi20vin0: endpoint@0 {
2633 reg = <0>;
2634 remote-endpoint = <&vin0csi20>;
2635 };
2636 csi20vin1: endpoint@1 {
2637 reg = <1>;
2638 remote-endpoint = <&vin1csi20>;
2639 };
2640 csi20vin2: endpoint@2 {
2641 reg = <2>;
2642 remote-endpoint = <&vin2csi20>;
2643 };
2644 csi20vin3: endpoint@3 {
2645 reg = <3>;
2646 remote-endpoint = <&vin3csi20>;
2647 };
2648 csi20vin4: endpoint@4 {
2649 reg = <4>;
2650 remote-endpoint = <&vin4csi20>;
2651 };
2652 csi20vin5: endpoint@5 {
2653 reg = <5>;
2654 remote-endpoint = <&vin5csi20>;
2655 };
2656 csi20vin6: endpoint@6 {
2657 reg = <6>;
2658 remote-endpoint = <&vin6csi20>;
2659 };
2660 csi20vin7: endpoint@7 {
2661 reg = <7>;
2662 remote-endpoint = <&vin7csi20>;
2663 };
2664 };
2665 };
2666 };
2667
2668 csi40: csi2@feaa0000 {
2669 compatible = "renesas,r8a7796-csi2";
2670 reg = <0 0xfeaa0000 0 0x10000>;
2671 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2672 clocks = <&cpg CPG_MOD 716>;
2673 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2674 resets = <&cpg 716>;
2675 status = "disabled";
2676
2677 ports {
2678 #address-cells = <1>;
2679 #size-cells = <0>;
2680
2681 port@1 {
2682 #address-cells = <1>;
2683 #size-cells = <0>;
2684
2685 reg = <1>;
2686
2687 csi40vin0: endpoint@0 {
2688 reg = <0>;
2689 remote-endpoint = <&vin0csi40>;
2690 };
2691 csi40vin1: endpoint@1 {
2692 reg = <1>;
2693 remote-endpoint = <&vin1csi40>;
2694 };
2695 csi40vin2: endpoint@2 {
2696 reg = <2>;
2697 remote-endpoint = <&vin2csi40>;
2698 };
2699 csi40vin3: endpoint@3 {
2700 reg = <3>;
2701 remote-endpoint = <&vin3csi40>;
2702 };
2703 csi40vin4: endpoint@4 {
2704 reg = <4>;
2705 remote-endpoint = <&vin4csi40>;
2706 };
2707 csi40vin5: endpoint@5 {
2708 reg = <5>;
2709 remote-endpoint = <&vin5csi40>;
2710 };
2711 csi40vin6: endpoint@6 {
2712 reg = <6>;
2713 remote-endpoint = <&vin6csi40>;
2714 };
2715 csi40vin7: endpoint@7 {
2716 reg = <7>;
2717 remote-endpoint = <&vin7csi40>;
2718 };
2719 };
2720
2721 };
2722 };
2723
2724 hdmi0: hdmi@fead0000 {
2725 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2726 reg = <0 0xfead0000 0 0x10000>;
2727 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2728 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2729 clock-names = "iahb", "isfr";
2730 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2731 resets = <&cpg 729>;
2732 status = "disabled";
2733
2734 ports {
2735 #address-cells = <1>;
2736 #size-cells = <0>;
2737 port@0 {
2738 reg = <0>;
2739 dw_hdmi0_in: endpoint {
2740 remote-endpoint = <&du_out_hdmi0>;
2741 };
2742 };
2743 port@1 {
2744 reg = <1>;
2745 };
2746 port@2 {
2747 /* HDMI sound */
2748 reg = <2>;
2749 };
2750 };
2751 };
2752
2753 du: display@feb00000 {
2754 compatible = "renesas,du-r8a7796";
2755 reg = <0 0xfeb00000 0 0x70000>;
2756 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2757 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2758 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2759 clocks = <&cpg CPG_MOD 724>,
2760 <&cpg CPG_MOD 723>,
2761 <&cpg CPG_MOD 722>;
2762 clock-names = "du.0", "du.1", "du.2";
2763 status = "disabled";
2764
2765 vsps = <&vspd0 &vspd1 &vspd2>;
2766
2767 ports {
2768 #address-cells = <1>;
2769 #size-cells = <0>;
2770
2771 port@0 {
2772 reg = <0>;
2773 du_out_rgb: endpoint {
2774 };
2775 };
2776 port@1 {
2777 reg = <1>;
2778 du_out_hdmi0: endpoint {
2779 remote-endpoint = <&dw_hdmi0_in>;
2780 };
2781 };
2782 port@2 {
2783 reg = <2>;
2784 du_out_lvds0: endpoint {
2785 remote-endpoint = <&lvds0_in>;
2786 };
2787 };
2788 };
2789 };
2790
2791 lvds0: lvds@feb90000 {
2792 compatible = "renesas,r8a7796-lvds";
2793 reg = <0 0xfeb90000 0 0x14>;
2794 clocks = <&cpg CPG_MOD 727>;
2795 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2796 resets = <&cpg 727>;
2797 status = "disabled";
2798
2799 ports {
2800 #address-cells = <1>;
2801 #size-cells = <0>;
2802
2803 port@0 {
2804 reg = <0>;
2805 lvds0_in: endpoint {
2806 remote-endpoint = <&du_out_lvds0>;
2807 };
2808 };
2809 port@1 {
2810 reg = <1>;
2811 lvds0_out: endpoint {
2812 };
2813 };
2814 };
2815 };
2816
2817 prr: chipid@fff00044 {
2818 compatible = "renesas,prr";
2819 reg = <0 0xfff00044 0 4>;
2820 };
2821 };
2822
2823 thermal-zones {
2824 sensor_thermal1: sensor-thermal1 {
2825 polling-delay-passive = <250>;
2826 polling-delay = <1000>;
2827 thermal-sensors = <&tsc 0>;
2828
2829 trips {
2830 sensor1_passive: sensor1-passive {
2831 temperature = <95000>;
2832 hysteresis = <1000>;
2833 type = "passive";
2834 };
2835 sensor1_crit: sensor1-crit {
2836 temperature = <120000>;
2837 hysteresis = <1000>;
2838 type = "critical";
2839 };
2840 };
2841
2842 cooling-maps {
2843 map0 {
2844 trip = <&sensor1_passive>;
2845 cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
2846 };
2847 };
2848 };
2849
2850 sensor_thermal2: sensor-thermal2 {
2851 polling-delay-passive = <250>;
2852 polling-delay = <1000>;
2853 thermal-sensors = <&tsc 1>;
2854
2855 trips {
2856 sensor2_passive: sensor2-passive {
2857 temperature = <95000>;
2858 hysteresis = <1000>;
2859 type = "passive";
2860 };
2861 sensor2_crit: sensor2-crit {
2862 temperature = <120000>;
2863 hysteresis = <1000>;
2864 type = "critical";
2865 };
2866 };
2867
2868 cooling-maps {
2869 map0 {
2870 trip = <&sensor2_passive>;
2871 cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
2872 };
2873 };
2874 };
2875
2876 sensor_thermal3: sensor-thermal3 {
2877 polling-delay-passive = <250>;
2878 polling-delay = <1000>;
2879 thermal-sensors = <&tsc 2>;
2880
2881 trips {
2882 sensor3_passive: sensor3-passive {
2883 temperature = <95000>;
2884 hysteresis = <1000>;
2885 type = "passive";
2886 };
2887 sensor3_crit: sensor3-crit {
2888 temperature = <120000>;
2889 hysteresis = <1000>;
2890 type = "critical";
2891 };
2892 };
2893
2894 cooling-maps {
2895 map0 {
2896 trip = <&sensor3_passive>;
2897 cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
2898 };
2899 };
2900 };
2901 };
2902
2903 timer {
2904 compatible = "arm,armv8-timer";
2905 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2906 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2907 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2908 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2909 };
2910
2911 /* External USB clocks - can be overridden by the board */
2912 usb3s0_clk: usb3s0 {
2913 compatible = "fixed-clock";
2914 #clock-cells = <0>;
2915 clock-frequency = <0>;
2916 };
2917
2918 usb_extal_clk: usb_extal {
2919 compatible = "fixed-clock";
2920 #clock-cells = <0>;
2921 clock-frequency = <0>;
2922 };
2923 };
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