2 * Device Tree Source for the R-Car Gen3 ULCB board
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
16 model = "Renesas R-Car Gen3 ULCB board";
24 stdout-path = "serial0:115200n8";
27 audio_clkout: audio-clkout {
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
32 compatible = "fixed-clock";
34 clock-frequency = <11289600>;
38 compatible = "hdmi-connector";
48 compatible = "gpio-keys";
54 debounce-interval = <20>;
55 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
60 compatible = "gpio-leds";
63 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
66 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
70 reg_1p8v: regulator0 {
71 compatible = "regulator-fixed";
72 regulator-name = "fixed-1.8V";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <1800000>;
79 reg_3p3v: regulator1 {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-3.3V";
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
89 compatible = "simple-audio-card";
91 simple-audio-card,format = "left_j";
92 simple-audio-card,bitclock-master = <&sndcpu>;
93 simple-audio-card,frame-master = <&sndcpu>;
95 sndcpu: simple-audio-card,cpu {
96 sound-dai = <&rcar_sound>;
99 sndcodec: simple-audio-card,codec {
100 sound-dai = <&ak4613>;
104 vcc_sdhi0: regulator-vcc-sdhi0 {
105 compatible = "regulator-fixed";
107 regulator-name = "SDHI0 Vcc";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
111 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
115 vccq_sdhi0: regulator-vccq-sdhi0 {
116 compatible = "regulator-gpio";
118 regulator-name = "SDHI0 VccQ";
119 regulator-min-microvolt = <1800000>;
120 regulator-max-microvolt = <3300000>;
122 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
129 compatible = "fixed-clock";
131 clock-frequency = <24576000>;
135 compatible = "fixed-clock";
137 clock-frequency = <25000000>;
142 clock-frequency = <22579200>;
146 pinctrl-0 = <&avb_pins>;
147 pinctrl-names = "default";
148 renesas,no-ether-link;
149 phy-handle = <&phy0>;
152 phy0: ethernet-phy@0 {
153 rxc-skew-ps = <1500>;
155 interrupt-parent = <&gpio2>;
156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
165 clock-frequency = <16666666>;
169 clock-frequency = <32768>;
178 rcar_dw_hdmi0_out: endpoint {
179 remote-endpoint = <&hdmi0_con>;
186 remote-endpoint = <&rcar_dw_hdmi0_out>;
190 pinctrl-0 = <&i2c2_pins>;
191 pinctrl-names = "default";
195 clock-frequency = <100000>;
198 compatible = "asahi-kasei,ak4613";
199 #sound-dai-cells = <0>;
201 clocks = <&rcar_sound 3>;
203 asahi-kasei,in1-single-end;
204 asahi-kasei,in2-single-end;
205 asahi-kasei,out1-single-end;
206 asahi-kasei,out2-single-end;
207 asahi-kasei,out3-single-end;
208 asahi-kasei,out4-single-end;
209 asahi-kasei,out5-single-end;
210 asahi-kasei,out6-single-end;
213 cs2000: clk-multiplier@4f {
215 compatible = "cirrus,cs2000-cp";
217 clocks = <&audio_clkout>, <&x12_clk>;
218 clock-names = "clk_in", "ref_clk";
220 assigned-clocks = <&cs2000>;
221 assigned-clock-rates = <24576000>; /* 1/1 divide */
228 clock-frequency = <400000>;
230 versaclock5: clock-generator@6a {
231 compatible = "idt,5p49v5925";
248 pinctrl-0 = <&scif_clk_pins>;
249 pinctrl-names = "default";
253 groups = "avb_link", "avb_phy_int", "avb_mdc",
260 drive-strength = <24>;
264 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
265 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
266 drive-strength = <12>;
276 groups = "scif2_data_a";
280 scif_clk_pins: scif_clk {
281 groups = "scif_clk_a";
282 function = "scif_clk";
286 groups = "sdhi0_data4", "sdhi0_ctrl";
288 power-source = <3300>;
291 sdhi0_pins_uhs: sd0_uhs {
292 groups = "sdhi0_data4", "sdhi0_ctrl";
294 power-source = <1800>;
298 groups = "sdhi2_data8", "sdhi2_ctrl";
300 power-source = <3300>;
303 sdhi2_pins_uhs: sd2_uhs {
304 groups = "sdhi2_data8", "sdhi2_ctrl";
306 power-source = <1800>;
310 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
314 sound_clk_pins: sound-clk {
315 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
316 "audio_clkout_a", "audio_clkout3_a";
317 function = "audio_clk";
327 pinctrl-0 = <&sound_pins &sound_clk_pins>;
328 pinctrl-names = "default";
331 #sound-dai-cells = <0>;
333 /* audio_clkout0/1/2/3 */
335 clock-frequency = <12288000 11289600>;
339 /* update <audio_clk_b> to <cs2000> */
340 clocks = <&cpg CPG_MOD 1005>,
341 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
342 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
343 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
344 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
345 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
346 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
347 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
348 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
349 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
350 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
351 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
352 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
353 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
354 <&audio_clk_a>, <&cs2000>,
356 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
360 playback = <&ssi0 &src0 &dvc0>;
361 capture = <&ssi1 &src1 &dvc1>;
367 pinctrl-0 = <&scif2_pins>;
368 pinctrl-names = "default";
374 clock-frequency = <14745600>;
378 pinctrl-0 = <&sdhi0_pins>;
379 pinctrl-1 = <&sdhi0_pins_uhs>;
380 pinctrl-names = "default", "state_uhs";
382 vmmc-supply = <&vcc_sdhi0>;
383 vqmmc-supply = <&vccq_sdhi0>;
384 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
391 /* used for on-board 8bit eMMC */
392 pinctrl-0 = <&sdhi2_pins>;
393 pinctrl-1 = <&sdhi2_pins_uhs>;
394 pinctrl-names = "default", "state_uhs";
396 vmmc-supply = <®_3p3v>;
397 vqmmc-supply = <®_1p8v>;
409 pinctrl-0 = <&usb1_pins>;
410 pinctrl-names = "default";