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1 /*
2 * Device Tree Source for the R-Car Gen3 ULCB board
3 *
4 * Copyright (C) 2016 Renesas Electronics Corp.
5 * Copyright (C) 2016 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14
15 / {
16 model = "Renesas R-Car Gen3 ULCB board";
17
18 aliases {
19 serial0 = &scif2;
20 ethernet0 = &avb;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 };
26
27 audio_clkout: audio-clkout {
28 /*
29 * This is same as <&rcar_sound 0>
30 * but needed to avoid cs2000/rcar_sound probe dead-lock
31 */
32 compatible = "fixed-clock";
33 #clock-cells = <0>;
34 clock-frequency = <11289600>;
35 };
36
37 hdmi0-out {
38 compatible = "hdmi-connector";
39 type = "a";
40
41 port {
42 hdmi0_con: endpoint {
43 };
44 };
45 };
46
47 keyboard {
48 compatible = "gpio-keys";
49
50 key-1 {
51 linux,code = <KEY_1>;
52 label = "SW3";
53 wakeup-source;
54 debounce-interval = <20>;
55 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
56 };
57 };
58
59 leds {
60 compatible = "gpio-leds";
61
62 led5 {
63 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
64 };
65 led6 {
66 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
67 };
68 };
69
70 reg_1p8v: regulator0 {
71 compatible = "regulator-fixed";
72 regulator-name = "fixed-1.8V";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <1800000>;
75 regulator-boot-on;
76 regulator-always-on;
77 };
78
79 reg_3p3v: regulator1 {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-3.3V";
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
84 regulator-boot-on;
85 regulator-always-on;
86 };
87
88 rsnd_ak4613: sound {
89 compatible = "simple-audio-card";
90
91 simple-audio-card,format = "left_j";
92 simple-audio-card,bitclock-master = <&sndcpu>;
93 simple-audio-card,frame-master = <&sndcpu>;
94
95 sndcpu: simple-audio-card,cpu {
96 sound-dai = <&rcar_sound>;
97 };
98
99 sndcodec: simple-audio-card,codec {
100 sound-dai = <&ak4613>;
101 };
102 };
103
104 vcc_sdhi0: regulator-vcc-sdhi0 {
105 compatible = "regulator-fixed";
106
107 regulator-name = "SDHI0 Vcc";
108 regulator-min-microvolt = <3300000>;
109 regulator-max-microvolt = <3300000>;
110
111 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
112 enable-active-high;
113 };
114
115 vccq_sdhi0: regulator-vccq-sdhi0 {
116 compatible = "regulator-gpio";
117
118 regulator-name = "SDHI0 VccQ";
119 regulator-min-microvolt = <1800000>;
120 regulator-max-microvolt = <3300000>;
121
122 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
123 gpios-states = <1>;
124 states = <3300000 1
125 1800000 0>;
126 };
127
128 x12_clk: x12 {
129 compatible = "fixed-clock";
130 #clock-cells = <0>;
131 clock-frequency = <24576000>;
132 };
133
134 x23_clk: x23-clock {
135 compatible = "fixed-clock";
136 #clock-cells = <0>;
137 clock-frequency = <25000000>;
138 };
139 };
140
141 &audio_clk_a {
142 clock-frequency = <22579200>;
143 };
144
145 &avb {
146 pinctrl-0 = <&avb_pins>;
147 pinctrl-names = "default";
148 renesas,no-ether-link;
149 phy-handle = <&phy0>;
150 status = "okay";
151
152 phy0: ethernet-phy@0 {
153 rxc-skew-ps = <1500>;
154 reg = <0>;
155 interrupt-parent = <&gpio2>;
156 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
157 };
158 };
159
160 &ehci1 {
161 status = "okay";
162 };
163
164 &extal_clk {
165 clock-frequency = <16666666>;
166 };
167
168 &extalr_clk {
169 clock-frequency = <32768>;
170 };
171
172 &hdmi0 {
173 status = "okay";
174
175 ports {
176 port@1 {
177 reg = <1>;
178 rcar_dw_hdmi0_out: endpoint {
179 remote-endpoint = <&hdmi0_con>;
180 };
181 };
182 };
183 };
184
185 &hdmi0_con {
186 remote-endpoint = <&rcar_dw_hdmi0_out>;
187 };
188
189 &i2c2 {
190 pinctrl-0 = <&i2c2_pins>;
191 pinctrl-names = "default";
192
193 status = "okay";
194
195 clock-frequency = <100000>;
196
197 ak4613: codec@10 {
198 compatible = "asahi-kasei,ak4613";
199 #sound-dai-cells = <0>;
200 reg = <0x10>;
201 clocks = <&rcar_sound 3>;
202
203 asahi-kasei,in1-single-end;
204 asahi-kasei,in2-single-end;
205 asahi-kasei,out1-single-end;
206 asahi-kasei,out2-single-end;
207 asahi-kasei,out3-single-end;
208 asahi-kasei,out4-single-end;
209 asahi-kasei,out5-single-end;
210 asahi-kasei,out6-single-end;
211 };
212
213 cs2000: clk-multiplier@4f {
214 #clock-cells = <0>;
215 compatible = "cirrus,cs2000-cp";
216 reg = <0x4f>;
217 clocks = <&audio_clkout>, <&x12_clk>;
218 clock-names = "clk_in", "ref_clk";
219
220 assigned-clocks = <&cs2000>;
221 assigned-clock-rates = <24576000>; /* 1/1 divide */
222 };
223 };
224
225 &i2c4 {
226 status = "okay";
227
228 clock-frequency = <400000>;
229
230 versaclock5: clock-generator@6a {
231 compatible = "idt,5p49v5925";
232 reg = <0x6a>;
233 #clock-cells = <1>;
234 clocks = <&x23_clk>;
235 clock-names = "xin";
236 };
237 };
238
239 &i2c_dvfs {
240 status = "okay";
241 };
242
243 &ohci1 {
244 status = "okay";
245 };
246
247 &pfc {
248 pinctrl-0 = <&scif_clk_pins>;
249 pinctrl-names = "default";
250
251 avb_pins: avb {
252 mux {
253 groups = "avb_link", "avb_phy_int", "avb_mdc",
254 "avb_mii";
255 function = "avb";
256 };
257
258 pins_mdc {
259 groups = "avb_mdc";
260 drive-strength = <24>;
261 };
262
263 pins_mii_tx {
264 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
265 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
266 drive-strength = <12>;
267 };
268 };
269
270 i2c2_pins: i2c2 {
271 groups = "i2c2_a";
272 function = "i2c2";
273 };
274
275 scif2_pins: scif2 {
276 groups = "scif2_data_a";
277 function = "scif2";
278 };
279
280 scif_clk_pins: scif_clk {
281 groups = "scif_clk_a";
282 function = "scif_clk";
283 };
284
285 sdhi0_pins: sd0 {
286 groups = "sdhi0_data4", "sdhi0_ctrl";
287 function = "sdhi0";
288 power-source = <3300>;
289 };
290
291 sdhi0_pins_uhs: sd0_uhs {
292 groups = "sdhi0_data4", "sdhi0_ctrl";
293 function = "sdhi0";
294 power-source = <1800>;
295 };
296
297 sdhi2_pins: sd2 {
298 groups = "sdhi2_data8", "sdhi2_ctrl";
299 function = "sdhi2";
300 power-source = <3300>;
301 };
302
303 sdhi2_pins_uhs: sd2_uhs {
304 groups = "sdhi2_data8", "sdhi2_ctrl";
305 function = "sdhi2";
306 power-source = <1800>;
307 };
308
309 sound_pins: sound {
310 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
311 function = "ssi";
312 };
313
314 sound_clk_pins: sound-clk {
315 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
316 "audio_clkout_a", "audio_clkout3_a";
317 function = "audio_clk";
318 };
319
320 usb1_pins: usb1 {
321 groups = "usb1";
322 function = "usb1";
323 };
324 };
325
326 &rcar_sound {
327 pinctrl-0 = <&sound_pins &sound_clk_pins>;
328 pinctrl-names = "default";
329
330 /* Single DAI */
331 #sound-dai-cells = <0>;
332
333 /* audio_clkout0/1/2/3 */
334 #clock-cells = <1>;
335 clock-frequency = <12288000 11289600>;
336
337 status = "okay";
338
339 /* update <audio_clk_b> to <cs2000> */
340 clocks = <&cpg CPG_MOD 1005>,
341 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
342 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
343 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
344 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
345 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
346 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
347 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
348 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
349 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
350 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
351 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
352 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
353 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
354 <&audio_clk_a>, <&cs2000>,
355 <&audio_clk_c>,
356 <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
357
358 rcar_sound,dai {
359 dai0 {
360 playback = <&ssi0 &src0 &dvc0>;
361 capture = <&ssi1 &src1 &dvc1>;
362 };
363 };
364 };
365
366 &scif2 {
367 pinctrl-0 = <&scif2_pins>;
368 pinctrl-names = "default";
369
370 status = "okay";
371 };
372
373 &scif_clk {
374 clock-frequency = <14745600>;
375 };
376
377 &sdhi0 {
378 pinctrl-0 = <&sdhi0_pins>;
379 pinctrl-1 = <&sdhi0_pins_uhs>;
380 pinctrl-names = "default", "state_uhs";
381
382 vmmc-supply = <&vcc_sdhi0>;
383 vqmmc-supply = <&vccq_sdhi0>;
384 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
385 bus-width = <4>;
386 sd-uhs-sdr50;
387 status = "okay";
388 };
389
390 &sdhi2 {
391 /* used for on-board 8bit eMMC */
392 pinctrl-0 = <&sdhi2_pins>;
393 pinctrl-1 = <&sdhi2_pins_uhs>;
394 pinctrl-names = "default", "state_uhs";
395
396 vmmc-supply = <&reg_3p3v>;
397 vqmmc-supply = <&reg_1p8v>;
398 bus-width = <8>;
399 mmc-hs200-1_8v;
400 non-removable;
401 status = "okay";
402 };
403
404 &ssi1 {
405 shared-pin;
406 };
407
408 &usb2_phy1 {
409 pinctrl-0 = <&usb1_pins>;
410 pinctrl-names = "default";
411
412 status = "okay";
413 };
414
415 &wdt0 {
416 timeout-sec = <60>;
417 status = "okay";
418 };