]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire
[mirror_ubuntu-bionic-kernel.git] / arch / arm64 / boot / dts / rockchip / rk3399-sapphire.dtsi
1 /*
2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43 #include "dt-bindings/pwm/pwm.h"
44 #include "rk3399.dtsi"
45 #include "rk3399-opp.dtsi"
46
47 / {
48 compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
49
50 backlight: backlight {
51 compatible = "pwm-backlight";
52 brightness-levels = <
53 0 1 2 3 4 5 6 7
54 8 9 10 11 12 13 14 15
55 16 17 18 19 20 21 22 23
56 24 25 26 27 28 29 30 31
57 32 33 34 35 36 37 38 39
58 40 41 42 43 44 45 46 47
59 48 49 50 51 52 53 54 55
60 56 57 58 59 60 61 62 63
61 64 65 66 67 68 69 70 71
62 72 73 74 75 76 77 78 79
63 80 81 82 83 84 85 86 87
64 88 89 90 91 92 93 94 95
65 96 97 98 99 100 101 102 103
66 104 105 106 107 108 109 110 111
67 112 113 114 115 116 117 118 119
68 120 121 122 123 124 125 126 127
69 128 129 130 131 132 133 134 135
70 136 137 138 139 140 141 142 143
71 144 145 146 147 148 149 150 151
72 152 153 154 155 156 157 158 159
73 160 161 162 163 164 165 166 167
74 168 169 170 171 172 173 174 175
75 176 177 178 179 180 181 182 183
76 184 185 186 187 188 189 190 191
77 192 193 194 195 196 197 198 199
78 200 201 202 203 204 205 206 207
79 208 209 210 211 212 213 214 215
80 216 217 218 219 220 221 222 223
81 224 225 226 227 228 229 230 231
82 232 233 234 235 236 237 238 239
83 240 241 242 243 244 245 246 247
84 248 249 250 251 252 253 254 255>;
85 default-brightness-level = <200>;
86 pwms = <&pwm0 0 25000 0>;
87 };
88
89 clkin_gmac: external-gmac-clock {
90 compatible = "fixed-clock";
91 clock-frequency = <125000000>;
92 clock-output-names = "clkin_gmac";
93 #clock-cells = <0>;
94 };
95
96 dc_12v: dc-12v {
97 compatible = "regulator-fixed";
98 regulator-name = "dc_12v";
99 regulator-always-on;
100 regulator-boot-on;
101 regulator-min-microvolt = <12000000>;
102 regulator-max-microvolt = <12000000>;
103 };
104
105 /* switched by pmic_sleep */
106 vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
107 compatible = "regulator-fixed";
108 regulator-name = "vcc1v8_s3";
109 regulator-always-on;
110 regulator-boot-on;
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 vin-supply = <&vcc_1v8>;
114 };
115
116 vcc3v3_sys: vcc3v3-sys {
117 compatible = "regulator-fixed";
118 regulator-name = "vcc3v3_sys";
119 regulator-always-on;
120 regulator-boot-on;
121 regulator-min-microvolt = <3300000>;
122 regulator-max-microvolt = <3300000>;
123 vin-supply = <&vcc_sys>;
124 };
125
126 vcc_sys: vcc-sys {
127 compatible = "regulator-fixed";
128 regulator-name = "vcc_sys";
129 regulator-always-on;
130 regulator-boot-on;
131 regulator-min-microvolt = <5000000>;
132 regulator-max-microvolt = <5000000>;
133 vin-supply = <&dc_12v>;
134 };
135
136 vcc5v0_host: vcc5v0-host-regulator {
137 compatible = "regulator-fixed";
138 enable-active-high;
139 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
140 pinctrl-names = "default";
141 pinctrl-0 = <&vcc5v0_host_en>;
142 regulator-name = "vcc5v0_host";
143 regulator-always-on;
144 vin-supply = <&vcc_sys>;
145 };
146 };
147
148 &cpu_l0 {
149 cpu-supply = <&vdd_cpu_l>;
150 };
151
152 &cpu_l1 {
153 cpu-supply = <&vdd_cpu_l>;
154 };
155
156 &cpu_l2 {
157 cpu-supply = <&vdd_cpu_l>;
158 };
159
160 &cpu_l3 {
161 cpu-supply = <&vdd_cpu_l>;
162 };
163
164 &cpu_b0 {
165 cpu-supply = <&vdd_cpu_b>;
166 };
167
168 &cpu_b1 {
169 cpu-supply = <&vdd_cpu_b>;
170 };
171
172 &emmc_phy {
173 status = "okay";
174 };
175
176 &gmac {
177 assigned-clocks = <&cru SCLK_RMII_SRC>;
178 assigned-clock-parents = <&clkin_gmac>;
179 clock_in_out = "input";
180 phy-supply = <&vcc_lan>;
181 phy-mode = "rgmii";
182 pinctrl-names = "default";
183 pinctrl-0 = <&rgmii_pins>;
184 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
185 snps,reset-active-low;
186 snps,reset-delays-us = <0 10000 50000>;
187 tx_delay = <0x28>;
188 rx_delay = <0x11>;
189 status = "okay";
190 };
191
192 &gpu {
193 mali-supply = <&vdd_gpu>;
194 status = "okay";
195 };
196
197 &hdmi {
198 ddc-i2c-bus = <&i2c3>;
199 status = "okay";
200 };
201
202 &i2c0 {
203 clock-frequency = <400000>;
204 i2c-scl-rising-time-ns = <168>;
205 i2c-scl-falling-time-ns = <4>;
206 status = "okay";
207
208 rk808: pmic@1b {
209 compatible = "rockchip,rk808";
210 reg = <0x1b>;
211 interrupt-parent = <&gpio1>;
212 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
213 #clock-cells = <1>;
214 clock-output-names = "xin32k", "rk808-clkout2";
215 pinctrl-names = "default";
216 pinctrl-0 = <&pmic_int_l &pmic_dvs2>;
217 rockchip,system-power-controller;
218 wakeup-source;
219
220 vcc1-supply = <&vcc_sys>;
221 vcc2-supply = <&vcc_sys>;
222 vcc3-supply = <&vcc_sys>;
223 vcc4-supply = <&vcc_sys>;
224 vcc6-supply = <&vcc_sys>;
225 vcc7-supply = <&vcc_sys>;
226 vcc8-supply = <&vcc3v3_sys>;
227 vcc9-supply = <&vcc_sys>;
228 vcc10-supply = <&vcc_sys>;
229 vcc11-supply = <&vcc_sys>;
230 vcc12-supply = <&vcc3v3_sys>;
231 vddio-supply = <&vcc1v8_pmu>;
232
233 regulators {
234 vdd_center: DCDC_REG1 {
235 regulator-name = "vdd_center";
236 regulator-always-on;
237 regulator-boot-on;
238 regulator-min-microvolt = <750000>;
239 regulator-max-microvolt = <1350000>;
240 regulator-ramp-delay = <6001>;
241 regulator-state-mem {
242 regulator-off-in-suspend;
243 };
244 };
245
246 vdd_cpu_l: DCDC_REG2 {
247 regulator-name = "vdd_cpu_l";
248 regulator-always-on;
249 regulator-boot-on;
250 regulator-min-microvolt = <750000>;
251 regulator-max-microvolt = <1350000>;
252 regulator-ramp-delay = <6001>;
253 regulator-state-mem {
254 regulator-off-in-suspend;
255 };
256 };
257
258 vcc_ddr: DCDC_REG3 {
259 regulator-name = "vcc_ddr";
260 regulator-always-on;
261 regulator-boot-on;
262 regulator-state-mem {
263 regulator-on-in-suspend;
264 };
265 };
266
267 vcc_1v8: DCDC_REG4 {
268 regulator-name = "vcc_1v8";
269 regulator-always-on;
270 regulator-boot-on;
271 regulator-min-microvolt = <1800000>;
272 regulator-max-microvolt = <1800000>;
273 regulator-state-mem {
274 regulator-on-in-suspend;
275 regulator-suspend-microvolt = <1800000>;
276 };
277 };
278
279 vcc1v8_dvp: LDO_REG1 {
280 regulator-name = "vcc1v8_dvp";
281 regulator-always-on;
282 regulator-boot-on;
283 regulator-min-microvolt = <1800000>;
284 regulator-max-microvolt = <1800000>;
285 regulator-state-mem {
286 regulator-off-in-suspend;
287 };
288 };
289
290 vcc3v0_tp: LDO_REG2 {
291 regulator-name = "vcc3v0_tp";
292 regulator-always-on;
293 regulator-boot-on;
294 regulator-min-microvolt = <3000000>;
295 regulator-max-microvolt = <3000000>;
296 regulator-state-mem {
297 regulator-off-in-suspend;
298 };
299 };
300
301 vcc1v8_pmu: LDO_REG3 {
302 regulator-name = "vcc1v8_pmu";
303 regulator-always-on;
304 regulator-boot-on;
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-state-mem {
308 regulator-on-in-suspend;
309 regulator-suspend-microvolt = <1800000>;
310 };
311 };
312
313 vcc_sdio: LDO_REG4 {
314 regulator-name = "vcc_sdio";
315 regulator-always-on;
316 regulator-boot-on;
317 regulator-min-microvolt = <1800000>;
318 regulator-max-microvolt = <3000000>;
319 regulator-state-mem {
320 regulator-on-in-suspend;
321 regulator-suspend-microvolt = <3000000>;
322 };
323 };
324
325 vcca3v0_codec: LDO_REG5 {
326 regulator-name = "vcca3v0_codec";
327 regulator-always-on;
328 regulator-boot-on;
329 regulator-min-microvolt = <3000000>;
330 regulator-max-microvolt = <3000000>;
331 regulator-state-mem {
332 regulator-off-in-suspend;
333 };
334 };
335
336 vcc_1v5: LDO_REG6 {
337 regulator-name = "vcc_1v5";
338 regulator-always-on;
339 regulator-boot-on;
340 regulator-min-microvolt = <1500000>;
341 regulator-max-microvolt = <1500000>;
342 regulator-state-mem {
343 regulator-on-in-suspend;
344 regulator-suspend-microvolt = <1500000>;
345 };
346 };
347
348 vcca1v8_codec: LDO_REG7 {
349 regulator-name = "vcca1v8_codec";
350 regulator-always-on;
351 regulator-boot-on;
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
354 regulator-state-mem {
355 regulator-off-in-suspend;
356 };
357 };
358
359 vcc_3v0: LDO_REG8 {
360 regulator-name = "vcc_3v0";
361 regulator-always-on;
362 regulator-boot-on;
363 regulator-min-microvolt = <3000000>;
364 regulator-max-microvolt = <3000000>;
365 regulator-state-mem {
366 regulator-on-in-suspend;
367 regulator-suspend-microvolt = <3000000>;
368 };
369 };
370
371 vcc3v3_s3: vcc_lan: SWITCH_REG1 {
372 regulator-name = "vcc3v3_s3";
373 regulator-always-on;
374 regulator-boot-on;
375 regulator-state-mem {
376 regulator-off-in-suspend;
377 };
378 };
379
380 vcc3v3_s0: SWITCH_REG2 {
381 regulator-name = "vcc3v3_s0";
382 regulator-always-on;
383 regulator-boot-on;
384 regulator-state-mem {
385 regulator-off-in-suspend;
386 };
387 };
388 };
389 };
390
391 vdd_cpu_b: regulator@40 {
392 compatible = "silergy,syr827";
393 reg = <0x40>;
394 fcs,suspend-voltage-selector = <1>;
395 regulator-name = "vdd_cpu_b";
396 regulator-min-microvolt = <712500>;
397 regulator-max-microvolt = <1500000>;
398 regulator-ramp-delay = <1000>;
399 regulator-always-on;
400 regulator-boot-on;
401 vin-supply = <&vcc_sys>;
402
403 regulator-state-mem {
404 regulator-off-in-suspend;
405 };
406 };
407
408 vdd_gpu: regulator@41 {
409 compatible = "silergy,syr828";
410 reg = <0x41>;
411 fcs,suspend-voltage-selector = <1>;
412 regulator-name = "vdd_gpu";
413 regulator-min-microvolt = <712500>;
414 regulator-max-microvolt = <1500000>;
415 regulator-ramp-delay = <1000>;
416 regulator-always-on;
417 regulator-boot-on;
418 vin-supply = <&vcc_sys>;
419
420 regulator-state-mem {
421 regulator-off-in-suspend;
422 };
423 };
424
425 vdd_log: vdd-log {
426 compatible = "pwm-regulator";
427 pwms = <&pwm2 0 25000 1>;
428 regulator-name = "vdd_log";
429 regulator-always-on;
430 regulator-boot-on;
431 regulator-min-microvolt = <800000>;
432 regulator-max-microvolt = <1400000>;
433 vin-supply = <&vcc_sys>;
434 };
435 };
436
437 &i2c3 {
438 i2c-scl-rising-time-ns = <450>;
439 i2c-scl-falling-time-ns = <15>;
440 status = "okay";
441 };
442
443 &io_domains {
444 status = "okay";
445
446 bt656-supply = <&vcc_3v0>;
447 audio-supply = <&vcca1v8_codec>;
448 sdmmc-supply = <&vcc_sdio>;
449 gpio1830-supply = <&vcc_3v0>;
450 };
451
452 &pcie_phy {
453 status = "okay";
454 };
455
456 &pcie0 {
457 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
458 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
459 assigned-clock-rates = <100000000>;
460 ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
461 num-lanes = <4>;
462 pinctrl-names = "default";
463 pinctrl-0 = <&pcie_clkreqn_cpm>;
464 status = "okay";
465 };
466
467 &pmu_io_domains {
468 pmu1830-supply = <&vcc_3v0>;
469 status = "okay";
470 };
471
472 &pinctrl {
473 pmic {
474 pmic_int_l: pmic-int-l {
475 rockchip,pins =
476 <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
477 };
478
479 pmic_dvs2: pmic-dvs2 {
480 rockchip,pins =
481 <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
482 };
483
484 vsel1_gpio: vsel1-gpio {
485 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
486 };
487
488 vsel2_gpio: vsel2-gpio {
489 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
490 };
491 };
492
493 usb2 {
494 vcc5v0_host_en: vcc5v0-host-en {
495 rockchip,pins =
496 <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
497 };
498 };
499 };
500
501 &pwm0 {
502 status = "okay";
503 };
504
505 &pwm2 {
506 status = "okay";
507 };
508
509 &saradc {
510 vref-supply = <&vcca1v8_s3>;
511 status = "okay";
512 };
513
514 &sdhci {
515 bus-width = <8>;
516 keep-power-in-suspend;
517 mmc-hs400-1_8v;
518 mmc-hs400-enhanced-strobe;
519 non-removable;
520 status = "okay";
521 };
522
523 &sdio0 {
524 bus-width = <4>;
525 cap-sd-highspeed;
526 cap-sdio-irq;
527 clock-frequency = <50000000>;
528 disable-wp;
529 keep-power-in-suspend;
530 max-frequency = <50000000>;
531 mmc-pwrseq = <&sdio_pwrseq>;
532 non-removable;
533 pinctrl-names = "default";
534 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
535 sd-uhs-sdr104;
536 status = "okay";
537 };
538
539 &sdmmc {
540 bus-width = <4>;
541 cap-mmc-highspeed;
542 cap-sd-highspeed;
543 clock-frequency = <150000000>;
544 disable-wp;
545 max-frequency = <150000000>;
546 pinctrl-names = "default";
547 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
548 vqmmc-supply = <&vcc_sdio>;
549 status = "okay";
550 };
551
552 &tsadc {
553 /* tshut mode 0:CRU 1:GPIO */
554 rockchip,hw-tshut-mode = <1>;
555 /* tshut polarity 0:LOW 1:HIGH */
556 rockchip,hw-tshut-polarity = <1>;
557 status = "okay";
558 };
559
560 &u2phy0 {
561 status = "okay";
562
563 u2phy0_otg: otg-port {
564 status = "okay";
565 };
566
567 u2phy0_host: host-port {
568 phy-supply = <&vcc5v0_host>;
569 status = "okay";
570 };
571 };
572
573 &u2phy1 {
574 status = "okay";
575
576 u2phy1_otg: otg-port {
577 status = "okay";
578 };
579
580 u2phy1_host: host-port {
581 phy-supply = <&vcc5v0_host>;
582 status = "okay";
583 };
584 };
585
586 &uart0 {
587 pinctrl-names = "default";
588 pinctrl-0 = <&uart0_xfer &uart0_cts>;
589 status = "okay";
590 };
591
592 &uart2 {
593 status = "okay";
594 };
595
596 &usb_host0_ehci {
597 status = "okay";
598 };
599
600 &usb_host0_ohci {
601 status = "okay";
602 };
603
604 &usb_host1_ehci {
605 status = "okay";
606 };
607
608 &usb_host1_ohci {
609 status = "okay";
610 };
611
612 &usbdrd3_0 {
613 status = "okay";
614 };
615
616 &usbdrd_dwc3_0 {
617 status = "okay";
618 dr_mode = "otg";
619 };
620
621 &usbdrd3_1 {
622 status = "okay";
623 };
624
625 &usbdrd_dwc3_1 {
626 status = "okay";
627 dr_mode = "host";
628 };
629
630 &vopb {
631 status = "okay";
632 };
633
634 &vopb_mmu {
635 status = "okay";
636 };
637
638 &vopl {
639 status = "okay";
640 };
641
642 &vopl_mmu {
643 status = "okay";
644 };