arch/arm64/include/asm/pgtable.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_PGTABLE_H
  17 #define __ASM_PGTABLE_H
  18
  19 #include <asm/bug.h>
  20 #include <asm/proc-fns.h>
  21
  22 #include <asm/memory.h>
  23 #include <asm/pgtable-hwdef.h>
  24
  25 /*
  26  * Software defined PTE bits definition.
  27  */
  28 #define PTE_VALID               (_AT(pteval_t, 1) << 0)
  29 #define PTE_WRITE               (PTE_DBM)                /* same as DBM (51) */
  30 #define PTE_DIRTY               (_AT(pteval_t, 1) << 55)
  31 #define PTE_SPECIAL             (_AT(pteval_t, 1) << 56)
  32 #define PTE_PROT_NONE           (_AT(pteval_t, 1) << 58) /* only when !PTE_VALID */
  33
  34 /*
  35  * VMALLOC and SPARSEMEM_VMEMMAP ranges.
  36  *
  37  * VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array
  38  *      (rounded up to PUD_SIZE).
  39  * VMALLOC_START: beginning of the kernel VA space
  40  * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
  41  *      fixed mappings and modules
  42  */
  43 #define VMEMMAP_SIZE            ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE)
  44
  45 #ifndef CONFIG_KASAN
  46 #define VMALLOC_START           (VA_START)
  47 #else
  48 #include <asm/kasan.h>
  49 #define VMALLOC_START           (KASAN_SHADOW_END + SZ_64K)
  50 #endif
  51
  52 #define VMALLOC_END             (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
  53
  54 #define vmemmap                 ((struct page *)(VMALLOC_END + SZ_64K))
  55
  56 #define FIRST_USER_ADDRESS      0UL
  57
  58 #ifndef __ASSEMBLY__
  59
  60 #include <linux/mmdebug.h>
  61
  62 extern void __pte_error(const char *file, int line, unsigned long val);
  63 extern void __pmd_error(const char *file, int line, unsigned long val);
  64 extern void __pud_error(const char *file, int line, unsigned long val);
  65 extern void __pgd_error(const char *file, int line, unsigned long val);
  66
  67 #define PROT_DEFAULT            (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
  68 #define PROT_SECT_DEFAULT       (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
  69
  70 #define PROT_DEVICE_nGnRnE      (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
  71 #define PROT_DEVICE_nGnRE       (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
  72 #define PROT_NORMAL_NC          (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_NC))
  73 #define PROT_NORMAL_WT          (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL_WT))
  74 #define PROT_NORMAL             (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_ATTRINDX(MT_NORMAL))
  75
  76 #define PROT_SECT_DEVICE_nGnRE  (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
  77 #define PROT_SECT_NORMAL        (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
  78 #define PROT_SECT_NORMAL_EXEC   (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
  79
  80 #define _PAGE_DEFAULT           (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
  81
  82 #define PAGE_KERNEL             __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
  83 #define PAGE_KERNEL_RO          __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
  84 #define PAGE_KERNEL_ROX __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
  85 #define PAGE_KERNEL_EXEC        __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
  86 #define PAGE_KERNEL_EXEC_CONT   __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
  87
  88 #define PAGE_HYP                __pgprot(_PAGE_DEFAULT | PTE_HYP)
  89 #define PAGE_HYP_DEVICE         __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
  90
  91 #define PAGE_S2                 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
  92 #define PAGE_S2_DEVICE          __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
  93
  94 #define PAGE_NONE               __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
  95 #define PAGE_SHARED             __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
  96 #define PAGE_SHARED_EXEC        __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
  97 #define PAGE_COPY               __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
  98 #define PAGE_COPY_EXEC          __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
  99 #define PAGE_READONLY           __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
 100 #define PAGE_READONLY_EXEC      __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN)
 101
 102 #define __P000  PAGE_NONE
 103 #define __P001  PAGE_READONLY
 104 #define __P010  PAGE_COPY
 105 #define __P011  PAGE_COPY
 106 #define __P100  PAGE_READONLY_EXEC
 107 #define __P101  PAGE_READONLY_EXEC
 108 #define __P110  PAGE_COPY_EXEC
 109 #define __P111  PAGE_COPY_EXEC
 110
 111 #define __S000  PAGE_NONE
 112 #define __S001  PAGE_READONLY
 113 #define __S010  PAGE_SHARED
 114 #define __S011  PAGE_SHARED
 115 #define __S100  PAGE_READONLY_EXEC
 116 #define __S101  PAGE_READONLY_EXEC
 117 #define __S110  PAGE_SHARED_EXEC
 118 #define __S111  PAGE_SHARED_EXEC
 119
 120 /*
 121  * ZERO_PAGE is a global shared page that is always zero: used
 122  * for zero-mapped memory areas etc..
 123  */
 124 extern struct page *empty_zero_page;
 125 #define ZERO_PAGE(vaddr)        (empty_zero_page)
 126
 127 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
 128
 129 #define pte_pfn(pte)            ((pte_val(pte) & PHYS_MASK) >> PAGE_SHIFT)
 130
 131 #define pfn_pte(pfn,prot)       (__pte(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 132
 133 #define pte_none(pte)           (!pte_val(pte))
 134 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
 135 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
 136
 137 /* Find an entry in the third-level page table. */
 138 #define pte_index(addr)         (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 139
 140 #define pte_offset_kernel(dir,addr)     (pmd_page_vaddr(*(dir)) + pte_index(addr))
 141
 142 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 143 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 144 #define pte_unmap(pte)                  do { } while (0)
 145 #define pte_unmap_nested(pte)           do { } while (0)
 146
 147 /*
 148  * The following only work if pte_present(). Undefined behaviour otherwise.
 149  */
 150 #define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
 151 #define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
 152 #define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
 153 #define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
 154 #define pte_exec(pte)           (!(pte_val(pte) & PTE_UXN))
 155 #define pte_cont(pte)           (!!(pte_val(pte) & PTE_CONT))
 156
 157 #ifdef CONFIG_ARM64_HW_AFDBM
 158 #define pte_hw_dirty(pte)       (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
 159 #else
 160 #define pte_hw_dirty(pte)       (0)
 161 #endif
 162 #define pte_sw_dirty(pte)       (!!(pte_val(pte) & PTE_DIRTY))
 163 #define pte_dirty(pte)          (pte_sw_dirty(pte) || pte_hw_dirty(pte))
 164
 165 #define pte_valid(pte)          (!!(pte_val(pte) & PTE_VALID))
 166 #define pte_valid_user(pte) \
 167         ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
 168 #define pte_valid_not_user(pte) \
 169         ((pte_val(pte) & (PTE_VALID | PTE_USER)) == PTE_VALID)
 170
 171 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
 172 {
 173         pte_val(pte) &= ~pgprot_val(prot);
 174         return pte;
 175 }
 176
 177 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
 178 {
 179         pte_val(pte) |= pgprot_val(prot);
 180         return pte;
 181 }
 182
 183 static inline pte_t pte_wrprotect(pte_t pte)
 184 {
 185         return clear_pte_bit(pte, __pgprot(PTE_WRITE));
 186 }
 187
 188 static inline pte_t pte_mkwrite(pte_t pte)
 189 {
 190         return set_pte_bit(pte, __pgprot(PTE_WRITE));
 191 }
 192
 193 static inline pte_t pte_mkclean(pte_t pte)
 194 {
 195         return clear_pte_bit(pte, __pgprot(PTE_DIRTY));
 196 }
 197
 198 static inline pte_t pte_mkdirty(pte_t pte)
 199 {
 200         return set_pte_bit(pte, __pgprot(PTE_DIRTY));
 201 }
 202
 203 static inline pte_t pte_mkold(pte_t pte)
 204 {
 205         return clear_pte_bit(pte, __pgprot(PTE_AF));
 206 }
 207
 208 static inline pte_t pte_mkyoung(pte_t pte)
 209 {
 210         return set_pte_bit(pte, __pgprot(PTE_AF));
 211 }
 212
 213 static inline pte_t pte_mkspecial(pte_t pte)
 214 {
 215         return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
 216 }
 217
 218 static inline pte_t pte_mkcont(pte_t pte)
 219 {
 220         return set_pte_bit(pte, __pgprot(PTE_CONT));
 221 }
 222
 223 static inline pte_t pte_mknoncont(pte_t pte)
 224 {
 225         return clear_pte_bit(pte, __pgprot(PTE_CONT));
 226 }
 227
 228 static inline void set_pte(pte_t *ptep, pte_t pte)
 229 {
 230         *ptep = pte;
 231
 232         /*
 233          * Only if the new pte is valid and kernel, otherwise TLB maintenance
 234          * or update_mmu_cache() have the necessary barriers.
 235          */
 236         if (pte_valid_not_user(pte)) {
 237                 dsb(ishst);
 238                 isb();
 239         }
 240 }
 241
 242 struct mm_struct;
 243 struct vm_area_struct;
 244
 245 extern void __sync_icache_dcache(pte_t pteval, unsigned long addr);
 246
 247 /*
 248  * PTE bits configuration in the presence of hardware Dirty Bit Management
 249  * (PTE_WRITE == PTE_DBM):
 250  *
 251  * Dirty  Writable | PTE_RDONLY  PTE_WRITE  PTE_DIRTY (sw)
 252  *   0      0      |   1           0          0
 253  *   0      1      |   1           1          0
 254  *   1      0      |   1           0          1
 255  *   1      1      |   0           1          x
 256  *
 257  * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
 258  * the page fault mechanism. Checking the dirty status of a pte becomes:
 259  *
 260  *   PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
 261  */
 262 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 263                               pte_t *ptep, pte_t pte)
 264 {
 265         if (pte_valid_user(pte)) {
 266                 if (!pte_special(pte) && pte_exec(pte))
 267                         __sync_icache_dcache(pte, addr);
 268                 if (pte_sw_dirty(pte) && pte_write(pte))
 269                         pte_val(pte) &= ~PTE_RDONLY;
 270                 else
 271                         pte_val(pte) |= PTE_RDONLY;
 272         }
 273
 274         /*
 275          * If the existing pte is valid, check for potential race with
 276          * hardware updates of the pte (ptep_set_access_flags safely changes
 277          * valid ptes without going through an invalid entry).
 278          */
 279         if (IS_ENABLED(CONFIG_DEBUG_VM) && IS_ENABLED(CONFIG_ARM64_HW_AFDBM) &&
 280             pte_valid(*ptep)) {
 281                 BUG_ON(!pte_young(pte));
 282                 BUG_ON(pte_write(*ptep) && !pte_dirty(pte));
 283         }
 284
 285         set_pte(ptep, pte);
 286 }
 287
 288 /*
 289  * Huge pte definitions.
 290  */
 291 #define pte_huge(pte)           (!(pte_val(pte) & PTE_TABLE_BIT))
 292 #define pte_mkhuge(pte)         (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
 293
 294 /*
 295  * Hugetlb definitions.
 296  */
 297 #define HUGE_MAX_HSTATE         2
 298 #define HPAGE_SHIFT             PMD_SHIFT
 299 #define HPAGE_SIZE              (_AC(1, UL) << HPAGE_SHIFT)
 300 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 301 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 302
 303 #define __HAVE_ARCH_PTE_SPECIAL
 304
 305 static inline pte_t pud_pte(pud_t pud)
 306 {
 307         return __pte(pud_val(pud));
 308 }
 309
 310 static inline pmd_t pud_pmd(pud_t pud)
 311 {
 312         return __pmd(pud_val(pud));
 313 }
 314
 315 static inline pte_t pmd_pte(pmd_t pmd)
 316 {
 317         return __pte(pmd_val(pmd));
 318 }
 319
 320 static inline pmd_t pte_pmd(pte_t pte)
 321 {
 322         return __pmd(pte_val(pte));
 323 }
 324
 325 static inline pgprot_t mk_sect_prot(pgprot_t prot)
 326 {
 327         return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
 328 }
 329
 330 /*
 331  * THP definitions.
 332  */
 333
 334 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 335 #define pmd_trans_huge(pmd)     (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
 336 #define pmd_trans_splitting(pmd)        pte_special(pmd_pte(pmd))
 337 #ifdef CONFIG_HAVE_RCU_TABLE_FREE
 338 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
 339 struct vm_area_struct;
 340 void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
 341                           pmd_t *pmdp);
 342 #endif /* CONFIG_HAVE_RCU_TABLE_FREE */
 343 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 344
 345 #define pmd_dirty(pmd)          pte_dirty(pmd_pte(pmd))
 346 #define pmd_young(pmd)          pte_young(pmd_pte(pmd))
 347 #define pmd_wrprotect(pmd)      pte_pmd(pte_wrprotect(pmd_pte(pmd)))
 348 #define pmd_mksplitting(pmd)    pte_pmd(pte_mkspecial(pmd_pte(pmd)))
 349 #define pmd_mkold(pmd)          pte_pmd(pte_mkold(pmd_pte(pmd)))
 350 #define pmd_mkwrite(pmd)        pte_pmd(pte_mkwrite(pmd_pte(pmd)))
 351 #define pmd_mkdirty(pmd)        pte_pmd(pte_mkdirty(pmd_pte(pmd)))
 352 #define pmd_mkyoung(pmd)        pte_pmd(pte_mkyoung(pmd_pte(pmd)))
 353 #define pmd_mknotpresent(pmd)   (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
 354
 355 #define __HAVE_ARCH_PMD_WRITE
 356 #define pmd_write(pmd)          pte_write(pmd_pte(pmd))
 357
 358 #define pmd_mkhuge(pmd)         (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
 359
 360 #define pmd_pfn(pmd)            (((pmd_val(pmd) & PMD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 361 #define pfn_pmd(pfn,prot)       (__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 362 #define mk_pmd(page,prot)       pfn_pmd(page_to_pfn(page),prot)
 363
 364 #define pud_write(pud)          pte_write(pud_pte(pud))
 365 #define pud_pfn(pud)            (((pud_val(pud) & PUD_MASK) & PHYS_MASK) >> PAGE_SHIFT)
 366
 367 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 368
 369 static inline int has_transparent_hugepage(void)
 370 {
 371         return 1;
 372 }
 373
 374 #define __pgprot_modify(prot,mask,bits) \
 375         __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
 376
 377 /*
 378  * Mark the prot value as uncacheable and unbufferable.
 379  */
 380 #define pgprot_noncached(prot) \
 381         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 382 #define pgprot_writecombine(prot) \
 383         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
 384 #define pgprot_device(prot) \
 385         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 386 #define __HAVE_PHYS_MEM_ACCESS_PROT
 387 struct file;
 388 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 389                                      unsigned long size, pgprot_t vma_prot);
 390
 391 #define pmd_none(pmd)           (!pmd_val(pmd))
 392 #define pmd_present(pmd)        (pmd_val(pmd))
 393
 394 #define pmd_bad(pmd)            (!(pmd_val(pmd) & 2))
 395
 396 #define pmd_table(pmd)          ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 397                                  PMD_TYPE_TABLE)
 398 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 399                                  PMD_TYPE_SECT)
 400
 401 #ifdef CONFIG_ARM64_64K_PAGES
 402 #define pud_sect(pud)           (0)
 403 #define pud_table(pud)          (1)
 404 #else
 405 #define pud_sect(pud)           ((pud_val(pud) & PUD_TYPE_MASK) == \
 406                                  PUD_TYPE_SECT)
 407 #define pud_table(pud)          ((pud_val(pud) & PUD_TYPE_MASK) == \
 408                                  PUD_TYPE_TABLE)
 409 #endif
 410
 411 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 412 {
 413         *pmdp = pmd;
 414         dsb(ishst);
 415         isb();
 416 }
 417
 418 static inline void pmd_clear(pmd_t *pmdp)
 419 {
 420         set_pmd(pmdp, __pmd(0));
 421 }
 422
 423 static inline pte_t *pmd_page_vaddr(pmd_t pmd)
 424 {
 425         return __va(pmd_val(pmd) & PHYS_MASK & (s32)PAGE_MASK);
 426 }
 427
 428 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK))
 429
 430 /*
 431  * Conversion functions: convert a page and protection to a page entry,
 432  * and a page entry and page directory to the page they refer to.
 433  */
 434 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
 435
 436 #if CONFIG_PGTABLE_LEVELS > 2
 437
 438 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 439
 440 #define pud_none(pud)           (!pud_val(pud))
 441 #define pud_bad(pud)            (!(pud_val(pud) & 2))
 442 #define pud_present(pud)        (pud_val(pud))
 443
 444 static inline void set_pud(pud_t *pudp, pud_t pud)
 445 {
 446         *pudp = pud;
 447         dsb(ishst);
 448         isb();
 449 }
 450
 451 static inline void pud_clear(pud_t *pudp)
 452 {
 453         set_pud(pudp, __pud(0));
 454 }
 455
 456 static inline pmd_t *pud_page_vaddr(pud_t pud)
 457 {
 458         return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
 459 }
 460
 461 /* Find an entry in the second-level page table. */
 462 #define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 463
 464 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
 465 {
 466         return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(addr);
 467 }
 468
 469 #define pud_page(pud)           pfn_to_page(__phys_to_pfn(pud_val(pud) & PHYS_MASK))
 470
 471 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 472
 473 #if CONFIG_PGTABLE_LEVELS > 3
 474
 475 #define pud_ERROR(pud)          __pud_error(__FILE__, __LINE__, pud_val(pud))
 476
 477 #define pgd_none(pgd)           (!pgd_val(pgd))
 478 #define pgd_bad(pgd)            (!(pgd_val(pgd) & 2))
 479 #define pgd_present(pgd)        (pgd_val(pgd))
 480
 481 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 482 {
 483         *pgdp = pgd;
 484         dsb(ishst);
 485 }
 486
 487 static inline void pgd_clear(pgd_t *pgdp)
 488 {
 489         set_pgd(pgdp, __pgd(0));
 490 }
 491
 492 static inline pud_t *pgd_page_vaddr(pgd_t pgd)
 493 {
 494         return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
 495 }
 496
 497 /* Find an entry in the frst-level page table. */
 498 #define pud_index(addr)         (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
 499
 500 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
 501 {
 502         return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(addr);
 503 }
 504
 505 #define pgd_page(pgd)           pfn_to_page(__phys_to_pfn(pgd_val(pgd) & PHYS_MASK))
 506
 507 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 508
 509 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
 510
 511 /* to find an entry in a page-table-directory */
 512 #define pgd_index(addr)         (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 513
 514 #define pgd_offset(mm, addr)    ((mm)->pgd+pgd_index(addr))
 515
 516 /* to find an entry in a kernel page-table-directory */
 517 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 518
 519 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 520 {
 521         const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
 522                               PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
 523         /* preserve the hardware dirty information */
 524         if (pte_hw_dirty(pte))
 525                 pte = pte_mkdirty(pte);
 526         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
 527         return pte;
 528 }
 529
 530 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 531 {
 532         return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
 533 }
 534
 535 #ifdef CONFIG_ARM64_HW_AFDBM
 536 /*
 537  * Atomic pte/pmd modifications.
 538  */
 539 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 540 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 541                                             unsigned long address,
 542                                             pte_t *ptep)
 543 {
 544         pteval_t pteval;
 545         unsigned int tmp, res;
 546
 547         asm volatile("//        ptep_test_and_clear_young\n"
 548         "       prfm    pstl1strm, %2\n"
 549         "1:     ldxr    %0, %2\n"
 550         "       ubfx    %w3, %w0, %5, #1        // extract PTE_AF (young)\n"
 551         "       and     %0, %0, %4              // clear PTE_AF\n"
 552         "       stxr    %w1, %0, %2\n"
 553         "       cbnz    %w1, 1b\n"
 554         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)), "=&r" (res)
 555         : "L" (~PTE_AF), "I" (ilog2(PTE_AF)));
 556
 557         return res;
 558 }
 559
 560 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 561 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 562 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 563                                             unsigned long address,
 564                                             pmd_t *pmdp)
 565 {
 566         return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
 567 }
 568 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 569
 570 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 571 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 572                                        unsigned long address, pte_t *ptep)
 573 {
 574         pteval_t old_pteval;
 575         unsigned int tmp;
 576
 577         asm volatile("//        ptep_get_and_clear\n"
 578         "       prfm    pstl1strm, %2\n"
 579         "1:     ldxr    %0, %2\n"
 580         "       stxr    %w1, xzr, %2\n"
 581         "       cbnz    %w1, 1b\n"
 582         : "=&r" (old_pteval), "=&r" (tmp), "+Q" (pte_val(*ptep)));
 583
 584         return __pte(old_pteval);
 585 }
 586
 587 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 588 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
 589 static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
 590                                        unsigned long address, pmd_t *pmdp)
 591 {
 592         return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
 593 }
 594 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 595
 596 /*
 597  * ptep_set_wrprotect - mark read-only while trasferring potential hardware
 598  * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
 599  */
 600 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 601 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 602 {
 603         pteval_t pteval;
 604         unsigned long tmp;
 605
 606         asm volatile("//        ptep_set_wrprotect\n"
 607         "       prfm    pstl1strm, %2\n"
 608         "1:     ldxr    %0, %2\n"
 609         "       tst     %0, %4                  // check for hw dirty (!PTE_RDONLY)\n"
 610         "       csel    %1, %3, xzr, eq         // set PTE_DIRTY|PTE_RDONLY if dirty\n"
 611         "       orr     %0, %0, %1              // if !dirty, PTE_RDONLY is already set\n"
 612         "       and     %0, %0, %5              // clear PTE_WRITE/PTE_DBM\n"
 613         "       stxr    %w1, %0, %2\n"
 614         "       cbnz    %w1, 1b\n"
 615         : "=&r" (pteval), "=&r" (tmp), "+Q" (pte_val(*ptep))
 616         : "r" (PTE_DIRTY|PTE_RDONLY), "L" (PTE_RDONLY), "L" (~PTE_WRITE)
 617         : "cc");
 618 }
 619
 620 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 621 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 622 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 623                                       unsigned long address, pmd_t *pmdp)
 624 {
 625         ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
 626 }
 627 #endif
 628 #endif  /* CONFIG_ARM64_HW_AFDBM */
 629
 630 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 631 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
 632
 633 /*
 634  * Encode and decode a swap entry:
 635  *      bits 0-1:       present (must be zero)
 636  *      bits 2-7:       swap type
 637  *      bits 8-57:      swap offset
 638  */
 639 #define __SWP_TYPE_SHIFT        2
 640 #define __SWP_TYPE_BITS         6
 641 #define __SWP_OFFSET_BITS       50
 642 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 643 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 644 #define __SWP_OFFSET_MASK       ((1UL << __SWP_OFFSET_BITS) - 1)
 645
 646 #define __swp_type(x)           (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 647 #define __swp_offset(x)         (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
 648 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
 649
 650 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 651 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
 652
 653 /*
 654  * Ensure that there are not more swap files than can be encoded in the kernel
 655  * PTEs.
 656  */
 657 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
 658
 659 extern int kern_addr_valid(unsigned long addr);
 660
 661 #include <asm-generic/pgtable.h>
 662
 663 #define pgtable_cache_init() do { } while (0)
 664
 665 /*
 666  * On AArch64, the cache coherency is handled via the set_pte_at() function.
 667  */
 668 static inline void update_mmu_cache(struct vm_area_struct *vma,
 669                                     unsigned long addr, pte_t *ptep)
 670 {
 671         /*
 672          * We don't do anything here, so there's a very small chance of
 673          * us retaking a user fault which we just fixed up. The alternative
 674          * is doing a dsb(ishst), but that penalises the fastpath.
 675          */
 676 }
 677
 678 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 679
 680 #define kc_vaddr_to_offset(v)   ((v) & ~VA_START)
 681 #define kc_offset_to_vaddr(o)   ((o) | VA_START)
 682
 683 #endif /* !__ASSEMBLY__ */
 684
 685 #endif /* __ASM_PGTABLE_H */