arch/arm64/include/asm/pgtable.h

   1 /*
   2  * Copyright (C) 2012 ARM Ltd.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #ifndef __ASM_PGTABLE_H
  17 #define __ASM_PGTABLE_H
  18
  19 #include <asm/bug.h>
  20 #include <asm/proc-fns.h>
  21
  22 #include <asm/memory.h>
  23 #include <asm/pgtable-hwdef.h>
  24 #include <asm/pgtable-prot.h>
  25 #include <asm/tlbflush.h>
  26
  27 /*
  28  * VMALLOC range.
  29  *
  30  * VMALLOC_START: beginning of the kernel vmalloc space
  31  * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space
  32  *      and fixed mappings
  33  */
  34 #define VMALLOC_START           (MODULES_END)
  35 #define VMALLOC_END             (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
  36
  37 #define vmemmap                 ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
  38
  39 #define FIRST_USER_ADDRESS      0UL
  40
  41 #ifndef __ASSEMBLY__
  42
  43 #include <asm/cmpxchg.h>
  44 #include <asm/fixmap.h>
  45 #include <linux/mmdebug.h>
  46 #include <linux/mm_types.h>
  47 #include <linux/sched.h>
  48
  49 extern void __pte_error(const char *file, int line, unsigned long val);
  50 extern void __pmd_error(const char *file, int line, unsigned long val);
  51 extern void __pud_error(const char *file, int line, unsigned long val);
  52 extern void __pgd_error(const char *file, int line, unsigned long val);
  53
  54 /*
  55  * ZERO_PAGE is a global shared page that is always zero: used
  56  * for zero-mapped memory areas etc..
  57  */
  58 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
  59 #define ZERO_PAGE(vaddr)        phys_to_page(__pa_symbol(empty_zero_page))
  60
  61 #define pte_ERROR(pte)          __pte_error(__FILE__, __LINE__, pte_val(pte))
  62
  63 /*
  64  * Macros to convert between a physical address and its placement in a
  65  * page table entry, taking care of 52-bit addresses.
  66  */
  67 #ifdef CONFIG_ARM64_PA_BITS_52
  68 #define __pte_to_phys(pte)      \
  69         ((pte_val(pte) & PTE_ADDR_LOW) | ((pte_val(pte) & PTE_ADDR_HIGH) << 36))
  70 #define __phys_to_pte_val(phys) (((phys) | ((phys) >> 36)) & PTE_ADDR_MASK)
  71 #else
  72 #define __pte_to_phys(pte)      (pte_val(pte) & PTE_ADDR_MASK)
  73 #define __phys_to_pte_val(phys) (phys)
  74 #endif
  75
  76 #define pte_pfn(pte)            (__pte_to_phys(pte) >> PAGE_SHIFT)
  77 #define pfn_pte(pfn,prot)       \
  78         __pte(__phys_to_pte_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
  79
  80 #define pte_none(pte)           (!pte_val(pte))
  81 #define pte_clear(mm,addr,ptep) set_pte(ptep, __pte(0))
  82 #define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
  83
  84 /*
  85  * The following only work if pte_present(). Undefined behaviour otherwise.
  86  */
  87 #define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
  88 #define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
  89 #define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
  90 #define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
  91 #define pte_user_exec(pte)      (!(pte_val(pte) & PTE_UXN))
  92 #define pte_cont(pte)           (!!(pte_val(pte) & PTE_CONT))
  93
  94 #define pte_cont_addr_end(addr, end)                                            \
  95 ({      unsigned long __boundary = ((addr) + CONT_PTE_SIZE) & CONT_PTE_MASK;    \
  96         (__boundary - 1 < (end) - 1) ? __boundary : (end);                      \
  97 })
  98
  99 #define pmd_cont_addr_end(addr, end)                                            \
 100 ({      unsigned long __boundary = ((addr) + CONT_PMD_SIZE) & CONT_PMD_MASK;    \
 101         (__boundary - 1 < (end) - 1) ? __boundary : (end);                      \
 102 })
 103
 104 #define pte_hw_dirty(pte)       (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY))
 105 #define pte_sw_dirty(pte)       (!!(pte_val(pte) & PTE_DIRTY))
 106 #define pte_dirty(pte)          (pte_sw_dirty(pte) || pte_hw_dirty(pte))
 107
 108 #define pte_valid(pte)          (!!(pte_val(pte) & PTE_VALID))
 109 /*
 110  * Execute-only user mappings do not have the PTE_USER bit set. All valid
 111  * kernel mappings have the PTE_UXN bit set.
 112  */
 113 #define pte_valid_not_user(pte) \
 114         ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))
 115 #define pte_valid_young(pte) \
 116         ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
 117 #define pte_valid_user(pte) \
 118         ((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
 119
 120 /*
 121  * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
 122  * so that we don't erroneously return false for pages that have been
 123  * remapped as PROT_NONE but are yet to be flushed from the TLB.
 124  */
 125 #define pte_accessible(mm, pte) \
 126         (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
 127
 128 /*
 129  * p??_access_permitted() is true for valid user mappings (subject to the
 130  * write permission check) other than user execute-only which do not have the
 131  * PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.
 132  */
 133 #define pte_access_permitted(pte, write) \
 134         (pte_valid_user(pte) && (!(write) || pte_write(pte)))
 135 #define pmd_access_permitted(pmd, write) \
 136         (pte_access_permitted(pmd_pte(pmd), (write)))
 137 #define pud_access_permitted(pud, write) \
 138         (pte_access_permitted(pud_pte(pud), (write)))
 139
 140 static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
 141 {
 142         pte_val(pte) &= ~pgprot_val(prot);
 143         return pte;
 144 }
 145
 146 static inline pte_t set_pte_bit(pte_t pte, pgprot_t prot)
 147 {
 148         pte_val(pte) |= pgprot_val(prot);
 149         return pte;
 150 }
 151
 152 static inline pte_t pte_wrprotect(pte_t pte)
 153 {
 154         pte = clear_pte_bit(pte, __pgprot(PTE_WRITE));
 155         pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
 156         return pte;
 157 }
 158
 159 static inline pte_t pte_mkwrite(pte_t pte)
 160 {
 161         pte = set_pte_bit(pte, __pgprot(PTE_WRITE));
 162         pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
 163         return pte;
 164 }
 165
 166 static inline pte_t pte_mkclean(pte_t pte)
 167 {
 168         pte = clear_pte_bit(pte, __pgprot(PTE_DIRTY));
 169         pte = set_pte_bit(pte, __pgprot(PTE_RDONLY));
 170
 171         return pte;
 172 }
 173
 174 static inline pte_t pte_mkdirty(pte_t pte)
 175 {
 176         pte = set_pte_bit(pte, __pgprot(PTE_DIRTY));
 177
 178         if (pte_write(pte))
 179                 pte = clear_pte_bit(pte, __pgprot(PTE_RDONLY));
 180
 181         return pte;
 182 }
 183
 184 static inline pte_t pte_mkold(pte_t pte)
 185 {
 186         return clear_pte_bit(pte, __pgprot(PTE_AF));
 187 }
 188
 189 static inline pte_t pte_mkyoung(pte_t pte)
 190 {
 191         return set_pte_bit(pte, __pgprot(PTE_AF));
 192 }
 193
 194 static inline pte_t pte_mkspecial(pte_t pte)
 195 {
 196         return set_pte_bit(pte, __pgprot(PTE_SPECIAL));
 197 }
 198
 199 static inline pte_t pte_mkcont(pte_t pte)
 200 {
 201         pte = set_pte_bit(pte, __pgprot(PTE_CONT));
 202         return set_pte_bit(pte, __pgprot(PTE_TYPE_PAGE));
 203 }
 204
 205 static inline pte_t pte_mknoncont(pte_t pte)
 206 {
 207         return clear_pte_bit(pte, __pgprot(PTE_CONT));
 208 }
 209
 210 static inline pte_t pte_mkpresent(pte_t pte)
 211 {
 212         return set_pte_bit(pte, __pgprot(PTE_VALID));
 213 }
 214
 215 static inline pmd_t pmd_mkcont(pmd_t pmd)
 216 {
 217         return __pmd(pmd_val(pmd) | PMD_SECT_CONT);
 218 }
 219
 220 static inline void set_pte(pte_t *ptep, pte_t pte)
 221 {
 222         WRITE_ONCE(*ptep, pte);
 223
 224         /*
 225          * Only if the new pte is valid and kernel, otherwise TLB maintenance
 226          * or update_mmu_cache() have the necessary barriers.
 227          */
 228         if (pte_valid_not_user(pte))
 229                 dsb(ishst);
 230 }
 231
 232 extern void __sync_icache_dcache(pte_t pteval);
 233
 234 /*
 235  * PTE bits configuration in the presence of hardware Dirty Bit Management
 236  * (PTE_WRITE == PTE_DBM):
 237  *
 238  * Dirty  Writable | PTE_RDONLY  PTE_WRITE  PTE_DIRTY (sw)
 239  *   0      0      |   1           0          0
 240  *   0      1      |   1           1          0
 241  *   1      0      |   1           0          1
 242  *   1      1      |   0           1          x
 243  *
 244  * When hardware DBM is not present, the sofware PTE_DIRTY bit is updated via
 245  * the page fault mechanism. Checking the dirty status of a pte becomes:
 246  *
 247  *   PTE_DIRTY || (PTE_WRITE && !PTE_RDONLY)
 248  */
 249 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 250                               pte_t *ptep, pte_t pte)
 251 {
 252         pte_t old_pte;
 253
 254         if (pte_present(pte) && pte_user_exec(pte) && !pte_special(pte))
 255                 __sync_icache_dcache(pte);
 256
 257         /*
 258          * If the existing pte is valid, check for potential race with
 259          * hardware updates of the pte (ptep_set_access_flags safely changes
 260          * valid ptes without going through an invalid entry).
 261          */
 262         old_pte = READ_ONCE(*ptep);
 263         if (IS_ENABLED(CONFIG_DEBUG_VM) && pte_valid(old_pte) && pte_valid(pte) &&
 264            (mm == current->active_mm || atomic_read(&mm->mm_users) > 1)) {
 265                 VM_WARN_ONCE(!pte_young(pte),
 266                              "%s: racy access flag clearing: 0x%016llx -> 0x%016llx",
 267                              __func__, pte_val(old_pte), pte_val(pte));
 268                 VM_WARN_ONCE(pte_write(old_pte) && !pte_dirty(pte),
 269                              "%s: racy dirty state clearing: 0x%016llx -> 0x%016llx",
 270                              __func__, pte_val(old_pte), pte_val(pte));
 271         }
 272
 273         set_pte(ptep, pte);
 274 }
 275
 276 #define __HAVE_ARCH_PTE_SAME
 277 static inline int pte_same(pte_t pte_a, pte_t pte_b)
 278 {
 279         pteval_t lhs, rhs;
 280
 281         lhs = pte_val(pte_a);
 282         rhs = pte_val(pte_b);
 283
 284         if (pte_present(pte_a))
 285                 lhs &= ~PTE_RDONLY;
 286
 287         if (pte_present(pte_b))
 288                 rhs &= ~PTE_RDONLY;
 289
 290         return (lhs == rhs);
 291 }
 292
 293 /*
 294  * Huge pte definitions.
 295  */
 296 #define pte_huge(pte)           (!(pte_val(pte) & PTE_TABLE_BIT))
 297 #define pte_mkhuge(pte)         (__pte(pte_val(pte) & ~PTE_TABLE_BIT))
 298
 299 /*
 300  * Hugetlb definitions.
 301  */
 302 #define HUGE_MAX_HSTATE         4
 303 #define HPAGE_SHIFT             PMD_SHIFT
 304 #define HPAGE_SIZE              (_AC(1, UL) << HPAGE_SHIFT)
 305 #define HPAGE_MASK              (~(HPAGE_SIZE - 1))
 306 #define HUGETLB_PAGE_ORDER      (HPAGE_SHIFT - PAGE_SHIFT)
 307
 308 static inline pte_t pgd_pte(pgd_t pgd)
 309 {
 310         return __pte(pgd_val(pgd));
 311 }
 312
 313 static inline pte_t pud_pte(pud_t pud)
 314 {
 315         return __pte(pud_val(pud));
 316 }
 317
 318 static inline pud_t pte_pud(pte_t pte)
 319 {
 320         return __pud(pte_val(pte));
 321 }
 322
 323 static inline pmd_t pud_pmd(pud_t pud)
 324 {
 325         return __pmd(pud_val(pud));
 326 }
 327
 328 static inline pte_t pmd_pte(pmd_t pmd)
 329 {
 330         return __pte(pmd_val(pmd));
 331 }
 332
 333 static inline pmd_t pte_pmd(pte_t pte)
 334 {
 335         return __pmd(pte_val(pte));
 336 }
 337
 338 static inline pgprot_t mk_sect_prot(pgprot_t prot)
 339 {
 340         return __pgprot(pgprot_val(prot) & ~PTE_TABLE_BIT);
 341 }
 342
 343 #ifdef CONFIG_NUMA_BALANCING
 344 /*
 345  * See the comment in include/asm-generic/pgtable.h
 346  */
 347 static inline int pte_protnone(pte_t pte)
 348 {
 349         return (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)) == PTE_PROT_NONE;
 350 }
 351
 352 static inline int pmd_protnone(pmd_t pmd)
 353 {
 354         return pte_protnone(pmd_pte(pmd));
 355 }
 356 #endif
 357
 358 /*
 359  * THP definitions.
 360  */
 361
 362 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 363 #define pmd_trans_huge(pmd)     (pmd_val(pmd) && !(pmd_val(pmd) & PMD_TABLE_BIT))
 364 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 365
 366 #define pmd_present(pmd)        pte_present(pmd_pte(pmd))
 367 #define pmd_dirty(pmd)          pte_dirty(pmd_pte(pmd))
 368 #define pmd_young(pmd)          pte_young(pmd_pte(pmd))
 369 #define pmd_valid(pmd)          pte_valid(pmd_pte(pmd))
 370 #define pmd_wrprotect(pmd)      pte_pmd(pte_wrprotect(pmd_pte(pmd)))
 371 #define pmd_mkold(pmd)          pte_pmd(pte_mkold(pmd_pte(pmd)))
 372 #define pmd_mkwrite(pmd)        pte_pmd(pte_mkwrite(pmd_pte(pmd)))
 373 #define pmd_mkclean(pmd)        pte_pmd(pte_mkclean(pmd_pte(pmd)))
 374 #define pmd_mkdirty(pmd)        pte_pmd(pte_mkdirty(pmd_pte(pmd)))
 375 #define pmd_mkyoung(pmd)        pte_pmd(pte_mkyoung(pmd_pte(pmd)))
 376 #define pmd_mknotpresent(pmd)   (__pmd(pmd_val(pmd) & ~PMD_SECT_VALID))
 377
 378 #define pmd_thp_or_huge(pmd)    (pmd_huge(pmd) || pmd_trans_huge(pmd))
 379
 380 #define pmd_write(pmd)          pte_write(pmd_pte(pmd))
 381
 382 #define pmd_mkhuge(pmd)         (__pmd(pmd_val(pmd) & ~PMD_TABLE_BIT))
 383
 384 #define __pmd_to_phys(pmd)      __pte_to_phys(pmd_pte(pmd))
 385 #define __phys_to_pmd_val(phys) __phys_to_pte_val(phys)
 386 #define pmd_pfn(pmd)            ((__pmd_to_phys(pmd) & PMD_MASK) >> PAGE_SHIFT)
 387 #define pfn_pmd(pfn,prot)       __pmd(__phys_to_pmd_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
 388 #define mk_pmd(page,prot)       pfn_pmd(page_to_pfn(page),prot)
 389
 390 #define pud_young(pud)          pte_young(pud_pte(pud))
 391 #define pud_mkyoung(pud)        pte_pud(pte_mkyoung(pud_pte(pud)))
 392 #define pud_write(pud)          pte_write(pud_pte(pud))
 393
 394 #define pud_mkhuge(pud)         (__pud(pud_val(pud) & ~PUD_TABLE_BIT))
 395
 396 #define __pud_to_phys(pud)      __pte_to_phys(pud_pte(pud))
 397 #define __phys_to_pud_val(phys) __phys_to_pte_val(phys)
 398 #define pud_pfn(pud)            ((__pud_to_phys(pud) & PUD_MASK) >> PAGE_SHIFT)
 399 #define pfn_pud(pfn,prot)       __pud(__phys_to_pud_val((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
 400
 401 #define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd))
 402
 403 #define __pgd_to_phys(pgd)      __pte_to_phys(pgd_pte(pgd))
 404 #define __phys_to_pgd_val(phys) __phys_to_pte_val(phys)
 405
 406 #define __pgprot_modify(prot,mask,bits) \
 407         __pgprot((pgprot_val(prot) & ~(mask)) | (bits))
 408
 409 /*
 410  * Mark the prot value as uncacheable and unbufferable.
 411  */
 412 #define pgprot_noncached(prot) \
 413         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRnE) | PTE_PXN | PTE_UXN)
 414 #define pgprot_writecombine(prot) \
 415         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)
 416 #define pgprot_device(prot) \
 417         __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN)
 418 #define __HAVE_PHYS_MEM_ACCESS_PROT
 419 struct file;
 420 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 421                                      unsigned long size, pgprot_t vma_prot);
 422
 423 #define pmd_none(pmd)           (!pmd_val(pmd))
 424
 425 #define pmd_bad(pmd)            (!(pmd_val(pmd) & PMD_TABLE_BIT))
 426
 427 #define pmd_table(pmd)          ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 428                                  PMD_TYPE_TABLE)
 429 #define pmd_sect(pmd)           ((pmd_val(pmd) & PMD_TYPE_MASK) == \
 430                                  PMD_TYPE_SECT)
 431
 432 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
 433 #define pud_sect(pud)           (0)
 434 #define pud_table(pud)          (1)
 435 #else
 436 #define pud_sect(pud)           ((pud_val(pud) & PUD_TYPE_MASK) == \
 437                                  PUD_TYPE_SECT)
 438 #define pud_table(pud)          ((pud_val(pud) & PUD_TYPE_MASK) == \
 439                                  PUD_TYPE_TABLE)
 440 #endif
 441
 442 extern pgd_t init_pg_dir[PTRS_PER_PGD];
 443 extern pgd_t init_pg_end[];
 444 extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 445 extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
 446 extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
 447
 448 extern void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd);
 449
 450 static inline bool in_swapper_pgdir(void *addr)
 451 {
 452         return ((unsigned long)addr & PAGE_MASK) ==
 453                 ((unsigned long)swapper_pg_dir & PAGE_MASK);
 454 }
 455
 456 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 457 {
 458 #ifdef __PAGETABLE_PMD_FOLDED
 459         if (in_swapper_pgdir(pmdp)) {
 460                 set_swapper_pgd((pgd_t *)pmdp, __pgd(pmd_val(pmd)));
 461                 return;
 462         }
 463 #endif /* __PAGETABLE_PMD_FOLDED */
 464
 465         WRITE_ONCE(*pmdp, pmd);
 466
 467         if (pmd_valid(pmd))
 468                 dsb(ishst);
 469 }
 470
 471 static inline void pmd_clear(pmd_t *pmdp)
 472 {
 473         set_pmd(pmdp, __pmd(0));
 474 }
 475
 476 static inline phys_addr_t pmd_page_paddr(pmd_t pmd)
 477 {
 478         return __pmd_to_phys(pmd);
 479 }
 480
 481 /* Find an entry in the third-level page table. */
 482 #define pte_index(addr)         (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 483
 484 #define pte_offset_phys(dir,addr)       (pmd_page_paddr(READ_ONCE(*(dir))) + pte_index(addr) * sizeof(pte_t))
 485 #define pte_offset_kernel(dir,addr)     ((pte_t *)__va(pte_offset_phys((dir), (addr))))
 486
 487 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 488 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 489 #define pte_unmap(pte)                  do { } while (0)
 490 #define pte_unmap_nested(pte)           do { } while (0)
 491
 492 #define pte_set_fixmap(addr)            ((pte_t *)set_fixmap_offset(FIX_PTE, addr))
 493 #define pte_set_fixmap_offset(pmd, addr)        pte_set_fixmap(pte_offset_phys(pmd, addr))
 494 #define pte_clear_fixmap()              clear_fixmap(FIX_PTE)
 495
 496 #define pmd_page(pmd)           pfn_to_page(__phys_to_pfn(__pmd_to_phys(pmd)))
 497
 498 /* use ONLY for statically allocated translation tables */
 499 #define pte_offset_kimg(dir,addr)       ((pte_t *)__phys_to_kimg(pte_offset_phys((dir), (addr))))
 500
 501 /*
 502  * Conversion functions: convert a page and protection to a page entry,
 503  * and a page entry and page directory to the page they refer to.
 504  */
 505 #define mk_pte(page,prot)       pfn_pte(page_to_pfn(page),prot)
 506
 507 #if CONFIG_PGTABLE_LEVELS > 2
 508
 509 #define pmd_ERROR(pmd)          __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
 510
 511 #define pud_none(pud)           (!pud_val(pud))
 512 #define pud_bad(pud)            (!(pud_val(pud) & PUD_TABLE_BIT))
 513 #define pud_present(pud)        pte_present(pud_pte(pud))
 514 #define pud_valid(pud)          pte_valid(pud_pte(pud))
 515
 516 static inline void set_pud(pud_t *pudp, pud_t pud)
 517 {
 518 #ifdef __PAGETABLE_PUD_FOLDED
 519         if (in_swapper_pgdir(pudp)) {
 520                 set_swapper_pgd((pgd_t *)pudp, __pgd(pud_val(pud)));
 521                 return;
 522         }
 523 #endif /* __PAGETABLE_PUD_FOLDED */
 524
 525         WRITE_ONCE(*pudp, pud);
 526
 527         if (pud_valid(pud))
 528                 dsb(ishst);
 529 }
 530
 531 static inline void pud_clear(pud_t *pudp)
 532 {
 533         set_pud(pudp, __pud(0));
 534 }
 535
 536 static inline phys_addr_t pud_page_paddr(pud_t pud)
 537 {
 538         return __pud_to_phys(pud);
 539 }
 540
 541 /* Find an entry in the second-level page table. */
 542 #define pmd_index(addr)         (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
 543
 544 #define pmd_offset_phys(dir, addr)      (pud_page_paddr(READ_ONCE(*(dir))) + pmd_index(addr) * sizeof(pmd_t))
 545 #define pmd_offset(dir, addr)           ((pmd_t *)__va(pmd_offset_phys((dir), (addr))))
 546
 547 #define pmd_set_fixmap(addr)            ((pmd_t *)set_fixmap_offset(FIX_PMD, addr))
 548 #define pmd_set_fixmap_offset(pud, addr)        pmd_set_fixmap(pmd_offset_phys(pud, addr))
 549 #define pmd_clear_fixmap()              clear_fixmap(FIX_PMD)
 550
 551 #define pud_page(pud)           pfn_to_page(__phys_to_pfn(__pud_to_phys(pud)))
 552
 553 /* use ONLY for statically allocated translation tables */
 554 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)__phys_to_kimg(pmd_offset_phys((dir), (addr))))
 555
 556 #else
 557
 558 #define pud_page_paddr(pud)     ({ BUILD_BUG(); 0; })
 559
 560 /* Match pmd_offset folding in <asm/generic/pgtable-nopmd.h> */
 561 #define pmd_set_fixmap(addr)            NULL
 562 #define pmd_set_fixmap_offset(pudp, addr)       ((pmd_t *)pudp)
 563 #define pmd_clear_fixmap()
 564
 565 #define pmd_offset_kimg(dir,addr)       ((pmd_t *)dir)
 566
 567 #endif  /* CONFIG_PGTABLE_LEVELS > 2 */
 568
 569 #if CONFIG_PGTABLE_LEVELS > 3
 570
 571 #define pud_ERROR(pud)          __pud_error(__FILE__, __LINE__, pud_val(pud))
 572
 573 #define pgd_none(pgd)           (!pgd_val(pgd))
 574 #define pgd_bad(pgd)            (!(pgd_val(pgd) & 2))
 575 #define pgd_present(pgd)        (pgd_val(pgd))
 576
 577 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 578 {
 579         if (in_swapper_pgdir(pgdp)) {
 580                 set_swapper_pgd(pgdp, pgd);
 581                 return;
 582         }
 583
 584         WRITE_ONCE(*pgdp, pgd);
 585         dsb(ishst);
 586 }
 587
 588 static inline void pgd_clear(pgd_t *pgdp)
 589 {
 590         set_pgd(pgdp, __pgd(0));
 591 }
 592
 593 static inline phys_addr_t pgd_page_paddr(pgd_t pgd)
 594 {
 595         return __pgd_to_phys(pgd);
 596 }
 597
 598 /* Find an entry in the frst-level page table. */
 599 #define pud_index(addr)         (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
 600
 601 #define pud_offset_phys(dir, addr)      (pgd_page_paddr(READ_ONCE(*(dir))) + pud_index(addr) * sizeof(pud_t))
 602 #define pud_offset(dir, addr)           ((pud_t *)__va(pud_offset_phys((dir), (addr))))
 603
 604 #define pud_set_fixmap(addr)            ((pud_t *)set_fixmap_offset(FIX_PUD, addr))
 605 #define pud_set_fixmap_offset(pgd, addr)        pud_set_fixmap(pud_offset_phys(pgd, addr))
 606 #define pud_clear_fixmap()              clear_fixmap(FIX_PUD)
 607
 608 #define pgd_page(pgd)           pfn_to_page(__phys_to_pfn(__pgd_to_phys(pgd)))
 609
 610 /* use ONLY for statically allocated translation tables */
 611 #define pud_offset_kimg(dir,addr)       ((pud_t *)__phys_to_kimg(pud_offset_phys((dir), (addr))))
 612
 613 #else
 614
 615 #define pgd_page_paddr(pgd)     ({ BUILD_BUG(); 0;})
 616
 617 /* Match pud_offset folding in <asm/generic/pgtable-nopud.h> */
 618 #define pud_set_fixmap(addr)            NULL
 619 #define pud_set_fixmap_offset(pgdp, addr)       ((pud_t *)pgdp)
 620 #define pud_clear_fixmap()
 621
 622 #define pud_offset_kimg(dir,addr)       ((pud_t *)dir)
 623
 624 #endif  /* CONFIG_PGTABLE_LEVELS > 3 */
 625
 626 #define pgd_ERROR(pgd)          __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
 627
 628 /* to find an entry in a page-table-directory */
 629 #define pgd_index(addr)         (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
 630
 631 #define pgd_offset_raw(pgd, addr)       ((pgd) + pgd_index(addr))
 632
 633 #define pgd_offset(mm, addr)    (pgd_offset_raw((mm)->pgd, (addr)))
 634
 635 /* to find an entry in a kernel page-table-directory */
 636 #define pgd_offset_k(addr)      pgd_offset(&init_mm, addr)
 637
 638 #define pgd_set_fixmap(addr)    ((pgd_t *)set_fixmap_offset(FIX_PGD, addr))
 639 #define pgd_clear_fixmap()      clear_fixmap(FIX_PGD)
 640
 641 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 642 {
 643         const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
 644                               PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
 645         /* preserve the hardware dirty information */
 646         if (pte_hw_dirty(pte))
 647                 pte = pte_mkdirty(pte);
 648         pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
 649         return pte;
 650 }
 651
 652 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
 653 {
 654         return pte_pmd(pte_modify(pmd_pte(pmd), newprot));
 655 }
 656
 657 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 658 extern int ptep_set_access_flags(struct vm_area_struct *vma,
 659                                  unsigned long address, pte_t *ptep,
 660                                  pte_t entry, int dirty);
 661
 662 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 663 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
 664 static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
 665                                         unsigned long address, pmd_t *pmdp,
 666                                         pmd_t entry, int dirty)
 667 {
 668         return ptep_set_access_flags(vma, address, (pte_t *)pmdp, pmd_pte(entry), dirty);
 669 }
 670 #endif
 671
 672 /*
 673  * Atomic pte/pmd modifications.
 674  */
 675 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 676 static inline int __ptep_test_and_clear_young(pte_t *ptep)
 677 {
 678         pte_t old_pte, pte;
 679
 680         pte = READ_ONCE(*ptep);
 681         do {
 682                 old_pte = pte;
 683                 pte = pte_mkold(pte);
 684                 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
 685                                                pte_val(old_pte), pte_val(pte));
 686         } while (pte_val(pte) != pte_val(old_pte));
 687
 688         return pte_young(pte);
 689 }
 690
 691 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 692                                             unsigned long address,
 693                                             pte_t *ptep)
 694 {
 695         return __ptep_test_and_clear_young(ptep);
 696 }
 697
 698 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 699 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
 700                                          unsigned long address, pte_t *ptep)
 701 {
 702         int young = ptep_test_and_clear_young(vma, address, ptep);
 703
 704         if (young) {
 705                 /*
 706                  * We can elide the trailing DSB here since the worst that can
 707                  * happen is that a CPU continues to use the young entry in its
 708                  * TLB and we mistakenly reclaim the associated page. The
 709                  * window for such an event is bounded by the next
 710                  * context-switch, which provides a DSB to complete the TLB
 711                  * invalidation.
 712                  */
 713                 flush_tlb_page_nosync(vma, address);
 714         }
 715
 716         return young;
 717 }
 718
 719 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 720 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 721 static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 722                                             unsigned long address,
 723                                             pmd_t *pmdp)
 724 {
 725         return ptep_test_and_clear_young(vma, address, (pte_t *)pmdp);
 726 }
 727 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 728
 729 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 730 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 731                                        unsigned long address, pte_t *ptep)
 732 {
 733         return __pte(xchg_relaxed(&pte_val(*ptep), 0));
 734 }
 735
 736 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 737 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
 738 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
 739                                             unsigned long address, pmd_t *pmdp)
 740 {
 741         return pte_pmd(ptep_get_and_clear(mm, address, (pte_t *)pmdp));
 742 }
 743 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 744
 745 /*
 746  * ptep_set_wrprotect - mark read-only while trasferring potential hardware
 747  * dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
 748  */
 749 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
 750 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
 751 {
 752         pte_t old_pte, pte;
 753
 754         pte = READ_ONCE(*ptep);
 755         do {
 756                 old_pte = pte;
 757                 /*
 758                  * If hardware-dirty (PTE_WRITE/DBM bit set and PTE_RDONLY
 759                  * clear), set the PTE_DIRTY bit.
 760                  */
 761                 if (pte_hw_dirty(pte))
 762                         pte = pte_mkdirty(pte);
 763                 pte = pte_wrprotect(pte);
 764                 pte_val(pte) = cmpxchg_relaxed(&pte_val(*ptep),
 765                                                pte_val(old_pte), pte_val(pte));
 766         } while (pte_val(pte) != pte_val(old_pte));
 767 }
 768
 769 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 770 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
 771 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
 772                                       unsigned long address, pmd_t *pmdp)
 773 {
 774         ptep_set_wrprotect(mm, address, (pte_t *)pmdp);
 775 }
 776
 777 #define pmdp_establish pmdp_establish
 778 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
 779                 unsigned long address, pmd_t *pmdp, pmd_t pmd)
 780 {
 781         return __pmd(xchg_relaxed(&pmd_val(*pmdp), pmd_val(pmd)));
 782 }
 783 #endif
 784
 785 /*
 786  * Encode and decode a swap entry:
 787  *      bits 0-1:       present (must be zero)
 788  *      bits 2-7:       swap type
 789  *      bits 8-57:      swap offset
 790  *      bit  58:        PTE_PROT_NONE (must be zero)
 791  */
 792 #define __SWP_TYPE_SHIFT        2
 793 #define __SWP_TYPE_BITS         6
 794 #define __SWP_OFFSET_BITS       50
 795 #define __SWP_TYPE_MASK         ((1 << __SWP_TYPE_BITS) - 1)
 796 #define __SWP_OFFSET_SHIFT      (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
 797 #define __SWP_OFFSET_MASK       ((1UL << __SWP_OFFSET_BITS) - 1)
 798
 799 #define __swp_type(x)           (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 800 #define __swp_offset(x)         (((x).val >> __SWP_OFFSET_SHIFT) & __SWP_OFFSET_MASK)
 801 #define __swp_entry(type,offset) ((swp_entry_t) { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
 802
 803 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 804 #define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
 805
 806 /*
 807  * Ensure that there are not more swap files than can be encoded in the kernel
 808  * PTEs.
 809  */
 810 #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > __SWP_TYPE_BITS)
 811
 812 extern int kern_addr_valid(unsigned long addr);
 813
 814 #include <asm-generic/pgtable.h>
 815
 816 void pgd_cache_init(void);
 817 #define pgtable_cache_init      pgd_cache_init
 818
 819 /*
 820  * On AArch64, the cache coherency is handled via the set_pte_at() function.
 821  */
 822 static inline void update_mmu_cache(struct vm_area_struct *vma,
 823                                     unsigned long addr, pte_t *ptep)
 824 {
 825         /*
 826          * We don't do anything here, so there's a very small chance of
 827          * us retaking a user fault which we just fixed up. The alternative
 828          * is doing a dsb(ishst), but that penalises the fastpath.
 829          */
 830 }
 831
 832 #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0)
 833
 834 #define kc_vaddr_to_offset(v)   ((v) & ~VA_START)
 835 #define kc_offset_to_vaddr(o)   ((o) | VA_START)
 836
 837 #ifdef CONFIG_ARM64_PA_BITS_52
 838 #define phys_to_ttbr(addr)      (((addr) | ((addr) >> 46)) & TTBR_BADDR_MASK_52)
 839 #else
 840 #define phys_to_ttbr(addr)      (addr)
 841 #endif
 842
 843 #endif /* !__ASSEMBLY__ */
 844
 845 #endif /* __ASM_PGTABLE_H */