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arm64: kernel: cpu_{suspend/resume} implementation
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1 /*
2 * Based on arch/arm/kernel/asm-offsets.c
3 *
4 * Copyright (C) 1995-2003 Russell King
5 * 2001-2002 Keith Owens
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21 #include <linux/sched.h>
22 #include <linux/mm.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/kvm_host.h>
25 #include <asm/thread_info.h>
26 #include <asm/memory.h>
27 #include <asm/cputable.h>
28 #include <asm/smp_plat.h>
29 #include <asm/suspend.h>
30 #include <asm/vdso_datapage.h>
31 #include <linux/kbuild.h>
32
33 int main(void)
34 {
35 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
36 BLANK();
37 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
38 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
39 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
40 DEFINE(TI_TASK, offsetof(struct thread_info, task));
41 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
42 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
43 BLANK();
44 DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
45 BLANK();
46 DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
47 DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
48 DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
49 DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
50 DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
51 DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
52 DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
53 DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
54 DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
55 DEFINE(S_SP, offsetof(struct pt_regs, sp));
56 #ifdef CONFIG_COMPAT
57 DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
58 #endif
59 DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
60 DEFINE(S_PC, offsetof(struct pt_regs, pc));
61 DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
62 DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
63 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
64 BLANK();
65 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
66 BLANK();
67 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
68 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
69 BLANK();
70 DEFINE(VM_EXEC, VM_EXEC);
71 BLANK();
72 DEFINE(PAGE_SZ, PAGE_SIZE);
73 BLANK();
74 DEFINE(CPU_INFO_SZ, sizeof(struct cpu_info));
75 DEFINE(CPU_INFO_SETUP, offsetof(struct cpu_info, cpu_setup));
76 BLANK();
77 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
78 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
79 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
80 BLANK();
81 DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
82 DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
83 DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
84 DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
85 DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
86 DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
87 DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
88 BLANK();
89 DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
90 DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
91 DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
92 DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
93 DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
94 DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
95 DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
96 DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
97 DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
98 DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
99 DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
100 DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
101 DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
102 BLANK();
103 DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
104 DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
105 DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
106 DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
107 BLANK();
108 DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
109 DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
110 BLANK();
111 #ifdef CONFIG_KVM_ARM_HOST
112 DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
113 DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
114 DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
115 DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
116 DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
117 DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
118 DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
119 DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
120 DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
121 DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
122 DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
123 DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
124 DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
125 DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
126 DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
127 DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
128 DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
129 DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
130 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
131 DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
132 DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
133 DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr));
134 DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr));
135 DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr));
136 DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr));
137 DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr));
138 DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr));
139 DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
140 DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
141 DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
142 #endif
143 #ifdef CONFIG_ARM64_CPU_SUSPEND
144 DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
145 DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
146 DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
147 DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
148 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
149 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
150 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
151 #endif
152 return 0;
153 }