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1 /*
2 * Based on arch/arm/kernel/ptrace.c
3 *
4 * By Ross Biro 1/23/92
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
26 #include <linux/mm.h>
27 #include <linux/smp.h>
28 #include <linux/ptrace.h>
29 #include <linux/user.h>
30 #include <linux/seccomp.h>
31 #include <linux/security.h>
32 #include <linux/init.h>
33 #include <linux/signal.h>
34 #include <linux/uaccess.h>
35 #include <linux/perf_event.h>
36 #include <linux/hw_breakpoint.h>
37 #include <linux/regset.h>
38 #include <linux/tracehook.h>
39 #include <linux/elf.h>
40
41 #include <asm/compat.h>
42 #include <asm/debug-monitors.h>
43 #include <asm/pgtable.h>
44 #include <asm/syscall.h>
45 #include <asm/traps.h>
46 #include <asm/system_misc.h>
47
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
50
51 struct pt_regs_offset {
52 const char *name;
53 int offset;
54 };
55
56 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
57 #define REG_OFFSET_END {.name = NULL, .offset = 0}
58 #define GPR_OFFSET_NAME(r) \
59 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
60
61 static const struct pt_regs_offset regoffset_table[] = {
62 GPR_OFFSET_NAME(0),
63 GPR_OFFSET_NAME(1),
64 GPR_OFFSET_NAME(2),
65 GPR_OFFSET_NAME(3),
66 GPR_OFFSET_NAME(4),
67 GPR_OFFSET_NAME(5),
68 GPR_OFFSET_NAME(6),
69 GPR_OFFSET_NAME(7),
70 GPR_OFFSET_NAME(8),
71 GPR_OFFSET_NAME(9),
72 GPR_OFFSET_NAME(10),
73 GPR_OFFSET_NAME(11),
74 GPR_OFFSET_NAME(12),
75 GPR_OFFSET_NAME(13),
76 GPR_OFFSET_NAME(14),
77 GPR_OFFSET_NAME(15),
78 GPR_OFFSET_NAME(16),
79 GPR_OFFSET_NAME(17),
80 GPR_OFFSET_NAME(18),
81 GPR_OFFSET_NAME(19),
82 GPR_OFFSET_NAME(20),
83 GPR_OFFSET_NAME(21),
84 GPR_OFFSET_NAME(22),
85 GPR_OFFSET_NAME(23),
86 GPR_OFFSET_NAME(24),
87 GPR_OFFSET_NAME(25),
88 GPR_OFFSET_NAME(26),
89 GPR_OFFSET_NAME(27),
90 GPR_OFFSET_NAME(28),
91 GPR_OFFSET_NAME(29),
92 GPR_OFFSET_NAME(30),
93 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
94 REG_OFFSET_NAME(sp),
95 REG_OFFSET_NAME(pc),
96 REG_OFFSET_NAME(pstate),
97 REG_OFFSET_END,
98 };
99
100 /**
101 * regs_query_register_offset() - query register offset from its name
102 * @name: the name of a register
103 *
104 * regs_query_register_offset() returns the offset of a register in struct
105 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
106 */
107 int regs_query_register_offset(const char *name)
108 {
109 const struct pt_regs_offset *roff;
110
111 for (roff = regoffset_table; roff->name != NULL; roff++)
112 if (!strcmp(roff->name, name))
113 return roff->offset;
114 return -EINVAL;
115 }
116
117 /**
118 * regs_within_kernel_stack() - check the address in the stack
119 * @regs: pt_regs which contains kernel stack pointer.
120 * @addr: address which is checked.
121 *
122 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
123 * If @addr is within the kernel stack, it returns true. If not, returns false.
124 */
125 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
126 {
127 return ((addr & ~(THREAD_SIZE - 1)) ==
128 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
129 on_irq_stack(addr, raw_smp_processor_id());
130 }
131
132 /**
133 * regs_get_kernel_stack_nth() - get Nth entry of the stack
134 * @regs: pt_regs which contains kernel stack pointer.
135 * @n: stack entry number.
136 *
137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
138 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
139 * this returns 0.
140 */
141 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
142 {
143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
144
145 addr += n;
146 if (regs_within_kernel_stack(regs, (unsigned long)addr))
147 return *addr;
148 else
149 return 0;
150 }
151
152 /*
153 * TODO: does not yet catch signals sent when the child dies.
154 * in exit.c or in signal.c.
155 */
156
157 /*
158 * Called by kernel/ptrace.c when detaching..
159 */
160 void ptrace_disable(struct task_struct *child)
161 {
162 /*
163 * This would be better off in core code, but PTRACE_DETACH has
164 * grown its fair share of arch-specific worts and changing it
165 * is likely to cause regressions on obscure architectures.
166 */
167 user_disable_single_step(child);
168 }
169
170 #ifdef CONFIG_HAVE_HW_BREAKPOINT
171 /*
172 * Handle hitting a HW-breakpoint.
173 */
174 static void ptrace_hbptriggered(struct perf_event *bp,
175 struct perf_sample_data *data,
176 struct pt_regs *regs)
177 {
178 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
179 siginfo_t info = {
180 .si_signo = SIGTRAP,
181 .si_errno = 0,
182 .si_code = TRAP_HWBKPT,
183 .si_addr = (void __user *)(bkpt->trigger),
184 };
185
186 #ifdef CONFIG_COMPAT
187 int i;
188
189 if (!is_compat_task())
190 goto send_sig;
191
192 for (i = 0; i < ARM_MAX_BRP; ++i) {
193 if (current->thread.debug.hbp_break[i] == bp) {
194 info.si_errno = (i << 1) + 1;
195 break;
196 }
197 }
198
199 for (i = 0; i < ARM_MAX_WRP; ++i) {
200 if (current->thread.debug.hbp_watch[i] == bp) {
201 info.si_errno = -((i << 1) + 1);
202 break;
203 }
204 }
205
206 send_sig:
207 #endif
208 force_sig_info(SIGTRAP, &info, current);
209 }
210
211 /*
212 * Unregister breakpoints from this task and reset the pointers in
213 * the thread_struct.
214 */
215 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
216 {
217 int i;
218 struct thread_struct *t = &tsk->thread;
219
220 for (i = 0; i < ARM_MAX_BRP; i++) {
221 if (t->debug.hbp_break[i]) {
222 unregister_hw_breakpoint(t->debug.hbp_break[i]);
223 t->debug.hbp_break[i] = NULL;
224 }
225 }
226
227 for (i = 0; i < ARM_MAX_WRP; i++) {
228 if (t->debug.hbp_watch[i]) {
229 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
230 t->debug.hbp_watch[i] = NULL;
231 }
232 }
233 }
234
235 void ptrace_hw_copy_thread(struct task_struct *tsk)
236 {
237 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
238 }
239
240 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
241 struct task_struct *tsk,
242 unsigned long idx)
243 {
244 struct perf_event *bp = ERR_PTR(-EINVAL);
245
246 switch (note_type) {
247 case NT_ARM_HW_BREAK:
248 if (idx < ARM_MAX_BRP)
249 bp = tsk->thread.debug.hbp_break[idx];
250 break;
251 case NT_ARM_HW_WATCH:
252 if (idx < ARM_MAX_WRP)
253 bp = tsk->thread.debug.hbp_watch[idx];
254 break;
255 }
256
257 return bp;
258 }
259
260 static int ptrace_hbp_set_event(unsigned int note_type,
261 struct task_struct *tsk,
262 unsigned long idx,
263 struct perf_event *bp)
264 {
265 int err = -EINVAL;
266
267 switch (note_type) {
268 case NT_ARM_HW_BREAK:
269 if (idx < ARM_MAX_BRP) {
270 tsk->thread.debug.hbp_break[idx] = bp;
271 err = 0;
272 }
273 break;
274 case NT_ARM_HW_WATCH:
275 if (idx < ARM_MAX_WRP) {
276 tsk->thread.debug.hbp_watch[idx] = bp;
277 err = 0;
278 }
279 break;
280 }
281
282 return err;
283 }
284
285 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
286 struct task_struct *tsk,
287 unsigned long idx)
288 {
289 struct perf_event *bp;
290 struct perf_event_attr attr;
291 int err, type;
292
293 switch (note_type) {
294 case NT_ARM_HW_BREAK:
295 type = HW_BREAKPOINT_X;
296 break;
297 case NT_ARM_HW_WATCH:
298 type = HW_BREAKPOINT_RW;
299 break;
300 default:
301 return ERR_PTR(-EINVAL);
302 }
303
304 ptrace_breakpoint_init(&attr);
305
306 /*
307 * Initialise fields to sane defaults
308 * (i.e. values that will pass validation).
309 */
310 attr.bp_addr = 0;
311 attr.bp_len = HW_BREAKPOINT_LEN_4;
312 attr.bp_type = type;
313 attr.disabled = 1;
314
315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
316 if (IS_ERR(bp))
317 return bp;
318
319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
320 if (err)
321 return ERR_PTR(err);
322
323 return bp;
324 }
325
326 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
327 struct arch_hw_breakpoint_ctrl ctrl,
328 struct perf_event_attr *attr)
329 {
330 int err, len, type, offset, disabled = !ctrl.enabled;
331
332 attr->disabled = disabled;
333 if (disabled)
334 return 0;
335
336 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
337 if (err)
338 return err;
339
340 switch (note_type) {
341 case NT_ARM_HW_BREAK:
342 if ((type & HW_BREAKPOINT_X) != type)
343 return -EINVAL;
344 break;
345 case NT_ARM_HW_WATCH:
346 if ((type & HW_BREAKPOINT_RW) != type)
347 return -EINVAL;
348 break;
349 default:
350 return -EINVAL;
351 }
352
353 attr->bp_len = len;
354 attr->bp_type = type;
355 attr->bp_addr += offset;
356
357 return 0;
358 }
359
360 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
361 {
362 u8 num;
363 u32 reg = 0;
364
365 switch (note_type) {
366 case NT_ARM_HW_BREAK:
367 num = hw_breakpoint_slots(TYPE_INST);
368 break;
369 case NT_ARM_HW_WATCH:
370 num = hw_breakpoint_slots(TYPE_DATA);
371 break;
372 default:
373 return -EINVAL;
374 }
375
376 reg |= debug_monitors_arch();
377 reg <<= 8;
378 reg |= num;
379
380 *info = reg;
381 return 0;
382 }
383
384 static int ptrace_hbp_get_ctrl(unsigned int note_type,
385 struct task_struct *tsk,
386 unsigned long idx,
387 u32 *ctrl)
388 {
389 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
390
391 if (IS_ERR(bp))
392 return PTR_ERR(bp);
393
394 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
395 return 0;
396 }
397
398 static int ptrace_hbp_get_addr(unsigned int note_type,
399 struct task_struct *tsk,
400 unsigned long idx,
401 u64 *addr)
402 {
403 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
404
405 if (IS_ERR(bp))
406 return PTR_ERR(bp);
407
408 *addr = bp ? counter_arch_bp(bp)->address : 0;
409 return 0;
410 }
411
412 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
413 struct task_struct *tsk,
414 unsigned long idx)
415 {
416 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
417
418 if (!bp)
419 bp = ptrace_hbp_create(note_type, tsk, idx);
420
421 return bp;
422 }
423
424 static int ptrace_hbp_set_ctrl(unsigned int note_type,
425 struct task_struct *tsk,
426 unsigned long idx,
427 u32 uctrl)
428 {
429 int err;
430 struct perf_event *bp;
431 struct perf_event_attr attr;
432 struct arch_hw_breakpoint_ctrl ctrl;
433
434 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
435 if (IS_ERR(bp)) {
436 err = PTR_ERR(bp);
437 return err;
438 }
439
440 attr = bp->attr;
441 decode_ctrl_reg(uctrl, &ctrl);
442 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
443 if (err)
444 return err;
445
446 return modify_user_hw_breakpoint(bp, &attr);
447 }
448
449 static int ptrace_hbp_set_addr(unsigned int note_type,
450 struct task_struct *tsk,
451 unsigned long idx,
452 u64 addr)
453 {
454 int err;
455 struct perf_event *bp;
456 struct perf_event_attr attr;
457
458 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
459 if (IS_ERR(bp)) {
460 err = PTR_ERR(bp);
461 return err;
462 }
463
464 attr = bp->attr;
465 attr.bp_addr = addr;
466 err = modify_user_hw_breakpoint(bp, &attr);
467 return err;
468 }
469
470 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
471 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
472 #define PTRACE_HBP_PAD_SZ sizeof(u32)
473
474 static int hw_break_get(struct task_struct *target,
475 const struct user_regset *regset,
476 unsigned int pos, unsigned int count,
477 void *kbuf, void __user *ubuf)
478 {
479 unsigned int note_type = regset->core_note_type;
480 int ret, idx = 0, offset, limit;
481 u32 info, ctrl;
482 u64 addr;
483
484 /* Resource info */
485 ret = ptrace_hbp_get_resource_info(note_type, &info);
486 if (ret)
487 return ret;
488
489 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
490 sizeof(info));
491 if (ret)
492 return ret;
493
494 /* Pad */
495 offset = offsetof(struct user_hwdebug_state, pad);
496 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
497 offset + PTRACE_HBP_PAD_SZ);
498 if (ret)
499 return ret;
500
501 /* (address, ctrl) registers */
502 offset = offsetof(struct user_hwdebug_state, dbg_regs);
503 limit = regset->n * regset->size;
504 while (count && offset < limit) {
505 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
506 if (ret)
507 return ret;
508 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
509 offset, offset + PTRACE_HBP_ADDR_SZ);
510 if (ret)
511 return ret;
512 offset += PTRACE_HBP_ADDR_SZ;
513
514 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
515 if (ret)
516 return ret;
517 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
518 offset, offset + PTRACE_HBP_CTRL_SZ);
519 if (ret)
520 return ret;
521 offset += PTRACE_HBP_CTRL_SZ;
522
523 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
524 offset,
525 offset + PTRACE_HBP_PAD_SZ);
526 if (ret)
527 return ret;
528 offset += PTRACE_HBP_PAD_SZ;
529 idx++;
530 }
531
532 return 0;
533 }
534
535 static int hw_break_set(struct task_struct *target,
536 const struct user_regset *regset,
537 unsigned int pos, unsigned int count,
538 const void *kbuf, const void __user *ubuf)
539 {
540 unsigned int note_type = regset->core_note_type;
541 int ret, idx = 0, offset, limit;
542 u32 ctrl;
543 u64 addr;
544
545 /* Resource info and pad */
546 offset = offsetof(struct user_hwdebug_state, dbg_regs);
547 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
548 if (ret)
549 return ret;
550
551 /* (address, ctrl) registers */
552 limit = regset->n * regset->size;
553 while (count && offset < limit) {
554 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
555 offset, offset + PTRACE_HBP_ADDR_SZ);
556 if (ret)
557 return ret;
558 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
559 if (ret)
560 return ret;
561 offset += PTRACE_HBP_ADDR_SZ;
562
563 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
564 offset, offset + PTRACE_HBP_CTRL_SZ);
565 if (ret)
566 return ret;
567 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
568 if (ret)
569 return ret;
570 offset += PTRACE_HBP_CTRL_SZ;
571
572 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
573 offset,
574 offset + PTRACE_HBP_PAD_SZ);
575 if (ret)
576 return ret;
577 offset += PTRACE_HBP_PAD_SZ;
578 idx++;
579 }
580
581 return 0;
582 }
583 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
584
585 static int gpr_get(struct task_struct *target,
586 const struct user_regset *regset,
587 unsigned int pos, unsigned int count,
588 void *kbuf, void __user *ubuf)
589 {
590 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
591 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
592 }
593
594 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
595 unsigned int pos, unsigned int count,
596 const void *kbuf, const void __user *ubuf)
597 {
598 int ret;
599 struct user_pt_regs newregs;
600
601 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
602 if (ret)
603 return ret;
604
605 if (!valid_user_regs(&newregs, target))
606 return -EINVAL;
607
608 task_pt_regs(target)->user_regs = newregs;
609 return 0;
610 }
611
612 /*
613 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
614 */
615 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
616 unsigned int pos, unsigned int count,
617 void *kbuf, void __user *ubuf)
618 {
619 struct user_fpsimd_state *uregs;
620 uregs = &target->thread.fpsimd_state.user_fpsimd;
621 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
622 }
623
624 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
625 unsigned int pos, unsigned int count,
626 const void *kbuf, const void __user *ubuf)
627 {
628 int ret;
629 struct user_fpsimd_state newstate;
630
631 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
632 if (ret)
633 return ret;
634
635 target->thread.fpsimd_state.user_fpsimd = newstate;
636 fpsimd_flush_task_state(target);
637 return ret;
638 }
639
640 static int tls_get(struct task_struct *target, const struct user_regset *regset,
641 unsigned int pos, unsigned int count,
642 void *kbuf, void __user *ubuf)
643 {
644 unsigned long *tls = &target->thread.tp_value;
645 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
646 }
647
648 static int tls_set(struct task_struct *target, const struct user_regset *regset,
649 unsigned int pos, unsigned int count,
650 const void *kbuf, const void __user *ubuf)
651 {
652 int ret;
653 unsigned long tls;
654
655 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
656 if (ret)
657 return ret;
658
659 target->thread.tp_value = tls;
660 return ret;
661 }
662
663 static int system_call_get(struct task_struct *target,
664 const struct user_regset *regset,
665 unsigned int pos, unsigned int count,
666 void *kbuf, void __user *ubuf)
667 {
668 int syscallno = task_pt_regs(target)->syscallno;
669
670 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
671 &syscallno, 0, -1);
672 }
673
674 static int system_call_set(struct task_struct *target,
675 const struct user_regset *regset,
676 unsigned int pos, unsigned int count,
677 const void *kbuf, const void __user *ubuf)
678 {
679 int syscallno, ret;
680
681 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
682 if (ret)
683 return ret;
684
685 task_pt_regs(target)->syscallno = syscallno;
686 return ret;
687 }
688
689 enum aarch64_regset {
690 REGSET_GPR,
691 REGSET_FPR,
692 REGSET_TLS,
693 #ifdef CONFIG_HAVE_HW_BREAKPOINT
694 REGSET_HW_BREAK,
695 REGSET_HW_WATCH,
696 #endif
697 REGSET_SYSTEM_CALL,
698 };
699
700 static const struct user_regset aarch64_regsets[] = {
701 [REGSET_GPR] = {
702 .core_note_type = NT_PRSTATUS,
703 .n = sizeof(struct user_pt_regs) / sizeof(u64),
704 .size = sizeof(u64),
705 .align = sizeof(u64),
706 .get = gpr_get,
707 .set = gpr_set
708 },
709 [REGSET_FPR] = {
710 .core_note_type = NT_PRFPREG,
711 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
712 /*
713 * We pretend we have 32-bit registers because the fpsr and
714 * fpcr are 32-bits wide.
715 */
716 .size = sizeof(u32),
717 .align = sizeof(u32),
718 .get = fpr_get,
719 .set = fpr_set
720 },
721 [REGSET_TLS] = {
722 .core_note_type = NT_ARM_TLS,
723 .n = 1,
724 .size = sizeof(void *),
725 .align = sizeof(void *),
726 .get = tls_get,
727 .set = tls_set,
728 },
729 #ifdef CONFIG_HAVE_HW_BREAKPOINT
730 [REGSET_HW_BREAK] = {
731 .core_note_type = NT_ARM_HW_BREAK,
732 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
733 .size = sizeof(u32),
734 .align = sizeof(u32),
735 .get = hw_break_get,
736 .set = hw_break_set,
737 },
738 [REGSET_HW_WATCH] = {
739 .core_note_type = NT_ARM_HW_WATCH,
740 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
741 .size = sizeof(u32),
742 .align = sizeof(u32),
743 .get = hw_break_get,
744 .set = hw_break_set,
745 },
746 #endif
747 [REGSET_SYSTEM_CALL] = {
748 .core_note_type = NT_ARM_SYSTEM_CALL,
749 .n = 1,
750 .size = sizeof(int),
751 .align = sizeof(int),
752 .get = system_call_get,
753 .set = system_call_set,
754 },
755 };
756
757 static const struct user_regset_view user_aarch64_view = {
758 .name = "aarch64", .e_machine = EM_AARCH64,
759 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
760 };
761
762 #ifdef CONFIG_COMPAT
763 #include <linux/compat.h>
764
765 enum compat_regset {
766 REGSET_COMPAT_GPR,
767 REGSET_COMPAT_VFP,
768 };
769
770 static int compat_gpr_get(struct task_struct *target,
771 const struct user_regset *regset,
772 unsigned int pos, unsigned int count,
773 void *kbuf, void __user *ubuf)
774 {
775 int ret = 0;
776 unsigned int i, start, num_regs;
777
778 /* Calculate the number of AArch32 registers contained in count */
779 num_regs = count / regset->size;
780
781 /* Convert pos into an register number */
782 start = pos / regset->size;
783
784 if (start + num_regs > regset->n)
785 return -EIO;
786
787 for (i = 0; i < num_regs; ++i) {
788 unsigned int idx = start + i;
789 compat_ulong_t reg;
790
791 switch (idx) {
792 case 15:
793 reg = task_pt_regs(target)->pc;
794 break;
795 case 16:
796 reg = task_pt_regs(target)->pstate;
797 break;
798 case 17:
799 reg = task_pt_regs(target)->orig_x0;
800 break;
801 default:
802 reg = task_pt_regs(target)->regs[idx];
803 }
804
805 if (kbuf) {
806 memcpy(kbuf, &reg, sizeof(reg));
807 kbuf += sizeof(reg);
808 } else {
809 ret = copy_to_user(ubuf, &reg, sizeof(reg));
810 if (ret) {
811 ret = -EFAULT;
812 break;
813 }
814
815 ubuf += sizeof(reg);
816 }
817 }
818
819 return ret;
820 }
821
822 static int compat_gpr_set(struct task_struct *target,
823 const struct user_regset *regset,
824 unsigned int pos, unsigned int count,
825 const void *kbuf, const void __user *ubuf)
826 {
827 struct pt_regs newregs;
828 int ret = 0;
829 unsigned int i, start, num_regs;
830
831 /* Calculate the number of AArch32 registers contained in count */
832 num_regs = count / regset->size;
833
834 /* Convert pos into an register number */
835 start = pos / regset->size;
836
837 if (start + num_regs > regset->n)
838 return -EIO;
839
840 newregs = *task_pt_regs(target);
841
842 for (i = 0; i < num_regs; ++i) {
843 unsigned int idx = start + i;
844 compat_ulong_t reg;
845
846 if (kbuf) {
847 memcpy(&reg, kbuf, sizeof(reg));
848 kbuf += sizeof(reg);
849 } else {
850 ret = copy_from_user(&reg, ubuf, sizeof(reg));
851 if (ret) {
852 ret = -EFAULT;
853 break;
854 }
855
856 ubuf += sizeof(reg);
857 }
858
859 switch (idx) {
860 case 15:
861 newregs.pc = reg;
862 break;
863 case 16:
864 newregs.pstate = reg;
865 break;
866 case 17:
867 newregs.orig_x0 = reg;
868 break;
869 default:
870 newregs.regs[idx] = reg;
871 }
872
873 }
874
875 if (valid_user_regs(&newregs.user_regs, target))
876 *task_pt_regs(target) = newregs;
877 else
878 ret = -EINVAL;
879
880 return ret;
881 }
882
883 static int compat_vfp_get(struct task_struct *target,
884 const struct user_regset *regset,
885 unsigned int pos, unsigned int count,
886 void *kbuf, void __user *ubuf)
887 {
888 struct user_fpsimd_state *uregs;
889 compat_ulong_t fpscr;
890 int ret;
891
892 uregs = &target->thread.fpsimd_state.user_fpsimd;
893
894 /*
895 * The VFP registers are packed into the fpsimd_state, so they all sit
896 * nicely together for us. We just need to create the fpscr separately.
897 */
898 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
899 VFP_STATE_SIZE - sizeof(compat_ulong_t));
900
901 if (count && !ret) {
902 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
903 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
904 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
905 }
906
907 return ret;
908 }
909
910 static int compat_vfp_set(struct task_struct *target,
911 const struct user_regset *regset,
912 unsigned int pos, unsigned int count,
913 const void *kbuf, const void __user *ubuf)
914 {
915 struct user_fpsimd_state *uregs;
916 compat_ulong_t fpscr;
917 int ret;
918
919 if (pos + count > VFP_STATE_SIZE)
920 return -EIO;
921
922 uregs = &target->thread.fpsimd_state.user_fpsimd;
923
924 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
925 VFP_STATE_SIZE - sizeof(compat_ulong_t));
926
927 if (count && !ret) {
928 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
929 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
930 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
931 }
932
933 fpsimd_flush_task_state(target);
934 return ret;
935 }
936
937 static int compat_tls_get(struct task_struct *target,
938 const struct user_regset *regset, unsigned int pos,
939 unsigned int count, void *kbuf, void __user *ubuf)
940 {
941 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
942 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
943 }
944
945 static int compat_tls_set(struct task_struct *target,
946 const struct user_regset *regset, unsigned int pos,
947 unsigned int count, const void *kbuf,
948 const void __user *ubuf)
949 {
950 int ret;
951 compat_ulong_t tls;
952
953 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
954 if (ret)
955 return ret;
956
957 target->thread.tp_value = tls;
958 return ret;
959 }
960
961 static const struct user_regset aarch32_regsets[] = {
962 [REGSET_COMPAT_GPR] = {
963 .core_note_type = NT_PRSTATUS,
964 .n = COMPAT_ELF_NGREG,
965 .size = sizeof(compat_elf_greg_t),
966 .align = sizeof(compat_elf_greg_t),
967 .get = compat_gpr_get,
968 .set = compat_gpr_set
969 },
970 [REGSET_COMPAT_VFP] = {
971 .core_note_type = NT_ARM_VFP,
972 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
973 .size = sizeof(compat_ulong_t),
974 .align = sizeof(compat_ulong_t),
975 .get = compat_vfp_get,
976 .set = compat_vfp_set
977 },
978 };
979
980 static const struct user_regset_view user_aarch32_view = {
981 .name = "aarch32", .e_machine = EM_ARM,
982 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
983 };
984
985 static const struct user_regset aarch32_ptrace_regsets[] = {
986 [REGSET_GPR] = {
987 .core_note_type = NT_PRSTATUS,
988 .n = COMPAT_ELF_NGREG,
989 .size = sizeof(compat_elf_greg_t),
990 .align = sizeof(compat_elf_greg_t),
991 .get = compat_gpr_get,
992 .set = compat_gpr_set
993 },
994 [REGSET_FPR] = {
995 .core_note_type = NT_ARM_VFP,
996 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
997 .size = sizeof(compat_ulong_t),
998 .align = sizeof(compat_ulong_t),
999 .get = compat_vfp_get,
1000 .set = compat_vfp_set
1001 },
1002 [REGSET_TLS] = {
1003 .core_note_type = NT_ARM_TLS,
1004 .n = 1,
1005 .size = sizeof(compat_ulong_t),
1006 .align = sizeof(compat_ulong_t),
1007 .get = compat_tls_get,
1008 .set = compat_tls_set,
1009 },
1010 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1011 [REGSET_HW_BREAK] = {
1012 .core_note_type = NT_ARM_HW_BREAK,
1013 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1014 .size = sizeof(u32),
1015 .align = sizeof(u32),
1016 .get = hw_break_get,
1017 .set = hw_break_set,
1018 },
1019 [REGSET_HW_WATCH] = {
1020 .core_note_type = NT_ARM_HW_WATCH,
1021 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1022 .size = sizeof(u32),
1023 .align = sizeof(u32),
1024 .get = hw_break_get,
1025 .set = hw_break_set,
1026 },
1027 #endif
1028 [REGSET_SYSTEM_CALL] = {
1029 .core_note_type = NT_ARM_SYSTEM_CALL,
1030 .n = 1,
1031 .size = sizeof(int),
1032 .align = sizeof(int),
1033 .get = system_call_get,
1034 .set = system_call_set,
1035 },
1036 };
1037
1038 static const struct user_regset_view user_aarch32_ptrace_view = {
1039 .name = "aarch32", .e_machine = EM_ARM,
1040 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1041 };
1042
1043 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1044 compat_ulong_t __user *ret)
1045 {
1046 compat_ulong_t tmp;
1047
1048 if (off & 3)
1049 return -EIO;
1050
1051 if (off == COMPAT_PT_TEXT_ADDR)
1052 tmp = tsk->mm->start_code;
1053 else if (off == COMPAT_PT_DATA_ADDR)
1054 tmp = tsk->mm->start_data;
1055 else if (off == COMPAT_PT_TEXT_END_ADDR)
1056 tmp = tsk->mm->end_code;
1057 else if (off < sizeof(compat_elf_gregset_t))
1058 return copy_regset_to_user(tsk, &user_aarch32_view,
1059 REGSET_COMPAT_GPR, off,
1060 sizeof(compat_ulong_t), ret);
1061 else if (off >= COMPAT_USER_SZ)
1062 return -EIO;
1063 else
1064 tmp = 0;
1065
1066 return put_user(tmp, ret);
1067 }
1068
1069 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1070 compat_ulong_t val)
1071 {
1072 int ret;
1073 mm_segment_t old_fs = get_fs();
1074
1075 if (off & 3 || off >= COMPAT_USER_SZ)
1076 return -EIO;
1077
1078 if (off >= sizeof(compat_elf_gregset_t))
1079 return 0;
1080
1081 set_fs(KERNEL_DS);
1082 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1083 REGSET_COMPAT_GPR, off,
1084 sizeof(compat_ulong_t),
1085 &val);
1086 set_fs(old_fs);
1087
1088 return ret;
1089 }
1090
1091 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1092
1093 /*
1094 * Convert a virtual register number into an index for a thread_info
1095 * breakpoint array. Breakpoints are identified using positive numbers
1096 * whilst watchpoints are negative. The registers are laid out as pairs
1097 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1098 * Register 0 is reserved for describing resource information.
1099 */
1100 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1101 {
1102 return (abs(num) - 1) >> 1;
1103 }
1104
1105 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1106 {
1107 u8 num_brps, num_wrps, debug_arch, wp_len;
1108 u32 reg = 0;
1109
1110 num_brps = hw_breakpoint_slots(TYPE_INST);
1111 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1112
1113 debug_arch = debug_monitors_arch();
1114 wp_len = 8;
1115 reg |= debug_arch;
1116 reg <<= 8;
1117 reg |= wp_len;
1118 reg <<= 8;
1119 reg |= num_wrps;
1120 reg <<= 8;
1121 reg |= num_brps;
1122
1123 *kdata = reg;
1124 return 0;
1125 }
1126
1127 static int compat_ptrace_hbp_get(unsigned int note_type,
1128 struct task_struct *tsk,
1129 compat_long_t num,
1130 u32 *kdata)
1131 {
1132 u64 addr = 0;
1133 u32 ctrl = 0;
1134
1135 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1136
1137 if (num & 1) {
1138 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1139 *kdata = (u32)addr;
1140 } else {
1141 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1142 *kdata = ctrl;
1143 }
1144
1145 return err;
1146 }
1147
1148 static int compat_ptrace_hbp_set(unsigned int note_type,
1149 struct task_struct *tsk,
1150 compat_long_t num,
1151 u32 *kdata)
1152 {
1153 u64 addr;
1154 u32 ctrl;
1155
1156 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1157
1158 if (num & 1) {
1159 addr = *kdata;
1160 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1161 } else {
1162 ctrl = *kdata;
1163 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1164 }
1165
1166 return err;
1167 }
1168
1169 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1170 compat_ulong_t __user *data)
1171 {
1172 int ret;
1173 u32 kdata;
1174 mm_segment_t old_fs = get_fs();
1175
1176 set_fs(KERNEL_DS);
1177 /* Watchpoint */
1178 if (num < 0) {
1179 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1180 /* Resource info */
1181 } else if (num == 0) {
1182 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1183 /* Breakpoint */
1184 } else {
1185 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1186 }
1187 set_fs(old_fs);
1188
1189 if (!ret)
1190 ret = put_user(kdata, data);
1191
1192 return ret;
1193 }
1194
1195 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1196 compat_ulong_t __user *data)
1197 {
1198 int ret;
1199 u32 kdata = 0;
1200 mm_segment_t old_fs = get_fs();
1201
1202 if (num == 0)
1203 return 0;
1204
1205 ret = get_user(kdata, data);
1206 if (ret)
1207 return ret;
1208
1209 set_fs(KERNEL_DS);
1210 if (num < 0)
1211 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1212 else
1213 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1214 set_fs(old_fs);
1215
1216 return ret;
1217 }
1218 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1219
1220 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1221 compat_ulong_t caddr, compat_ulong_t cdata)
1222 {
1223 unsigned long addr = caddr;
1224 unsigned long data = cdata;
1225 void __user *datap = compat_ptr(data);
1226 int ret;
1227
1228 switch (request) {
1229 case PTRACE_PEEKUSR:
1230 ret = compat_ptrace_read_user(child, addr, datap);
1231 break;
1232
1233 case PTRACE_POKEUSR:
1234 ret = compat_ptrace_write_user(child, addr, data);
1235 break;
1236
1237 case COMPAT_PTRACE_GETREGS:
1238 ret = copy_regset_to_user(child,
1239 &user_aarch32_view,
1240 REGSET_COMPAT_GPR,
1241 0, sizeof(compat_elf_gregset_t),
1242 datap);
1243 break;
1244
1245 case COMPAT_PTRACE_SETREGS:
1246 ret = copy_regset_from_user(child,
1247 &user_aarch32_view,
1248 REGSET_COMPAT_GPR,
1249 0, sizeof(compat_elf_gregset_t),
1250 datap);
1251 break;
1252
1253 case COMPAT_PTRACE_GET_THREAD_AREA:
1254 ret = put_user((compat_ulong_t)child->thread.tp_value,
1255 (compat_ulong_t __user *)datap);
1256 break;
1257
1258 case COMPAT_PTRACE_SET_SYSCALL:
1259 task_pt_regs(child)->syscallno = data;
1260 ret = 0;
1261 break;
1262
1263 case COMPAT_PTRACE_GETVFPREGS:
1264 ret = copy_regset_to_user(child,
1265 &user_aarch32_view,
1266 REGSET_COMPAT_VFP,
1267 0, VFP_STATE_SIZE,
1268 datap);
1269 break;
1270
1271 case COMPAT_PTRACE_SETVFPREGS:
1272 ret = copy_regset_from_user(child,
1273 &user_aarch32_view,
1274 REGSET_COMPAT_VFP,
1275 0, VFP_STATE_SIZE,
1276 datap);
1277 break;
1278
1279 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1280 case COMPAT_PTRACE_GETHBPREGS:
1281 ret = compat_ptrace_gethbpregs(child, addr, datap);
1282 break;
1283
1284 case COMPAT_PTRACE_SETHBPREGS:
1285 ret = compat_ptrace_sethbpregs(child, addr, datap);
1286 break;
1287 #endif
1288
1289 default:
1290 ret = compat_ptrace_request(child, request, addr,
1291 data);
1292 break;
1293 }
1294
1295 return ret;
1296 }
1297 #endif /* CONFIG_COMPAT */
1298
1299 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1300 {
1301 #ifdef CONFIG_COMPAT
1302 /*
1303 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1304 * user_aarch32_view compatible with arm32. Native ptrace requests on
1305 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1306 * access to the TLS register.
1307 */
1308 if (is_compat_task())
1309 return &user_aarch32_view;
1310 else if (is_compat_thread(task_thread_info(task)))
1311 return &user_aarch32_ptrace_view;
1312 #endif
1313 return &user_aarch64_view;
1314 }
1315
1316 long arch_ptrace(struct task_struct *child, long request,
1317 unsigned long addr, unsigned long data)
1318 {
1319 return ptrace_request(child, request, addr, data);
1320 }
1321
1322 enum ptrace_syscall_dir {
1323 PTRACE_SYSCALL_ENTER = 0,
1324 PTRACE_SYSCALL_EXIT,
1325 };
1326
1327 static void tracehook_report_syscall(struct pt_regs *regs,
1328 enum ptrace_syscall_dir dir)
1329 {
1330 int regno;
1331 unsigned long saved_reg;
1332
1333 /*
1334 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1335 * used to denote syscall entry/exit:
1336 */
1337 regno = (is_compat_task() ? 12 : 7);
1338 saved_reg = regs->regs[regno];
1339 regs->regs[regno] = dir;
1340
1341 if (dir == PTRACE_SYSCALL_EXIT)
1342 tracehook_report_syscall_exit(regs, 0);
1343 else if (tracehook_report_syscall_entry(regs))
1344 regs->syscallno = ~0UL;
1345
1346 regs->regs[regno] = saved_reg;
1347 }
1348
1349 asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1350 {
1351 if (test_thread_flag(TIF_SYSCALL_TRACE))
1352 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1353
1354 /* Do the secure computing after ptrace; failures should be fast. */
1355 if (secure_computing(NULL) == -1)
1356 return -1;
1357
1358 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1359 trace_sys_enter(regs, regs->syscallno);
1360
1361 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1362 regs->regs[2], regs->regs[3]);
1363
1364 return regs->syscallno;
1365 }
1366
1367 asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1368 {
1369 audit_syscall_exit(regs);
1370
1371 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1372 trace_sys_exit(regs, regs_return_value(regs));
1373
1374 if (test_thread_flag(TIF_SYSCALL_TRACE))
1375 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1376 }
1377
1378 /*
1379 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1380 * Userspace cannot use these until they have an architectural meaning.
1381 * We also reserve IL for the kernel; SS is handled dynamically.
1382 */
1383 #define SPSR_EL1_AARCH64_RES0_BITS \
1384 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1385 GENMASK_ULL(5, 5))
1386 #define SPSR_EL1_AARCH32_RES0_BITS \
1387 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1388
1389 static int valid_compat_regs(struct user_pt_regs *regs)
1390 {
1391 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1392
1393 if (!system_supports_mixed_endian_el0()) {
1394 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1395 regs->pstate |= COMPAT_PSR_E_BIT;
1396 else
1397 regs->pstate &= ~COMPAT_PSR_E_BIT;
1398 }
1399
1400 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1401 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1402 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1403 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1404 return 1;
1405 }
1406
1407 /*
1408 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1409 * arch/arm.
1410 */
1411 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1412 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1413 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1414 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1415 COMPAT_PSR_T_BIT;
1416 regs->pstate |= PSR_MODE32_BIT;
1417
1418 return 0;
1419 }
1420
1421 static int valid_native_regs(struct user_pt_regs *regs)
1422 {
1423 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1424
1425 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1426 (regs->pstate & PSR_D_BIT) == 0 &&
1427 (regs->pstate & PSR_A_BIT) == 0 &&
1428 (regs->pstate & PSR_I_BIT) == 0 &&
1429 (regs->pstate & PSR_F_BIT) == 0) {
1430 return 1;
1431 }
1432
1433 /* Force PSR to a valid 64-bit EL0t */
1434 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1435
1436 return 0;
1437 }
1438
1439 /*
1440 * Are the current registers suitable for user mode? (used to maintain
1441 * security in signal handlers)
1442 */
1443 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1444 {
1445 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1446 regs->pstate &= ~DBG_SPSR_SS;
1447
1448 if (is_compat_thread(task_thread_info(task)))
1449 return valid_compat_regs(regs);
1450 else
1451 return valid_native_regs(regs);
1452 }