2 * Based on arch/arm/kernel/traps.c
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched/signal.h>
33 #include <linux/sched/debug.h>
34 #include <linux/sched/task_stack.h>
35 #include <linux/sizes.h>
36 #include <linux/syscalls.h>
37 #include <linux/mm_types.h>
39 #include <asm/atomic.h>
41 #include <asm/cpufeature.h>
42 #include <asm/daifflags.h>
43 #include <asm/debug-monitors.h>
46 #include <asm/traps.h>
48 #include <asm/stack_pointer.h>
49 #include <asm/stacktrace.h>
50 #include <asm/exception.h>
51 #include <asm/system_misc.h>
52 #include <asm/sysreg.h>
54 static const char *handler
[]= {
61 int show_unhandled_signals
= 0;
63 static void dump_backtrace_entry(unsigned long where
)
65 printk(" %pS\n", (void *)where
);
68 static void __dump_instr(const char *lvl
, struct pt_regs
*regs
)
70 unsigned long addr
= instruction_pointer(regs
);
71 char str
[sizeof("00000000 ") * 5 + 2 + 1], *p
= str
;
74 for (i
= -4; i
< 1; i
++) {
75 unsigned int val
, bad
;
77 bad
= get_user(val
, &((u32
*)addr
)[i
]);
80 p
+= sprintf(p
, i
== 0 ? "(%08x) " : "%08x ", val
);
82 p
+= sprintf(p
, "bad PC value");
86 printk("%sCode: %s\n", lvl
, str
);
89 static void dump_instr(const char *lvl
, struct pt_regs
*regs
)
91 if (!user_mode(regs
)) {
92 mm_segment_t fs
= get_fs();
94 __dump_instr(lvl
, regs
);
97 __dump_instr(lvl
, regs
);
101 void dump_backtrace(struct pt_regs
*regs
, struct task_struct
*tsk
)
103 struct stackframe frame
;
106 pr_debug("%s(regs = %p tsk = %p)\n", __func__
, regs
, tsk
);
111 if (!try_get_task_stack(tsk
))
114 if (tsk
== current
) {
115 frame
.fp
= (unsigned long)__builtin_frame_address(0);
116 frame
.pc
= (unsigned long)dump_backtrace
;
119 * task blocked in __switch_to
121 frame
.fp
= thread_saved_fp(tsk
);
122 frame
.pc
= thread_saved_pc(tsk
);
124 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
125 frame
.graph
= tsk
->curr_ret_stack
;
129 printk("Call trace:\n");
131 /* skip until specified stack frame */
133 dump_backtrace_entry(frame
.pc
);
134 } else if (frame
.fp
== regs
->regs
[29]) {
137 * Mostly, this is the case where this function is
138 * called in panic/abort. As exception handler's
139 * stack frame does not contain the corresponding pc
140 * at which an exception has taken place, use regs->pc
143 dump_backtrace_entry(regs
->pc
);
145 } while (!unwind_frame(tsk
, &frame
));
150 void show_stack(struct task_struct
*tsk
, unsigned long *sp
)
152 dump_backtrace(NULL
, tsk
);
156 #ifdef CONFIG_PREEMPT
157 #define S_PREEMPT " PREEMPT"
163 static int __die(const char *str
, int err
, struct pt_regs
*regs
)
165 struct task_struct
*tsk
= current
;
166 static int die_counter
;
169 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP
"\n",
170 str
, err
, ++die_counter
);
172 /* trap and error numbers are mostly meaningless on ARM */
173 ret
= notify_die(DIE_OOPS
, str
, regs
, err
, 0, SIGSEGV
);
174 if (ret
== NOTIFY_STOP
)
179 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
180 TASK_COMM_LEN
, tsk
->comm
, task_pid_nr(tsk
),
183 if (!user_mode(regs
)) {
184 dump_backtrace(regs
, tsk
);
185 dump_instr(KERN_EMERG
, regs
);
191 static DEFINE_RAW_SPINLOCK(die_lock
);
194 * This function is protected against re-entrancy.
196 void die(const char *str
, struct pt_regs
*regs
, int err
)
201 raw_spin_lock_irqsave(&die_lock
, flags
);
207 ret
= __die(str
, err
, regs
);
209 if (regs
&& kexec_should_crash(current
))
213 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
217 panic("Fatal exception in interrupt");
219 panic("Fatal exception");
221 raw_spin_unlock_irqrestore(&die_lock
, flags
);
223 if (ret
!= NOTIFY_STOP
)
227 static bool show_unhandled_signals_ratelimited(void)
229 static DEFINE_RATELIMIT_STATE(rs
, DEFAULT_RATELIMIT_INTERVAL
,
230 DEFAULT_RATELIMIT_BURST
);
231 return show_unhandled_signals
&& __ratelimit(&rs
);
234 void arm64_force_sig_info(struct siginfo
*info
, const char *str
,
235 struct task_struct
*tsk
)
237 unsigned int esr
= tsk
->thread
.fault_code
;
238 struct pt_regs
*regs
= task_pt_regs(tsk
);
240 if (!unhandled_signal(tsk
, info
->si_signo
))
243 if (!show_unhandled_signals_ratelimited())
246 pr_info("%s[%d]: unhandled exception: ", tsk
->comm
, task_pid_nr(tsk
));
248 pr_cont("%s, ESR 0x%08x, ", esr_get_class_string(esr
), esr
);
251 print_vma_addr(KERN_CONT
" in ", regs
->pc
);
256 force_sig_info(info
->si_signo
, info
, tsk
);
259 void arm64_notify_die(const char *str
, struct pt_regs
*regs
,
260 struct siginfo
*info
, int err
)
262 if (user_mode(regs
)) {
263 WARN_ON(regs
!= current_pt_regs());
264 current
->thread
.fault_address
= 0;
265 current
->thread
.fault_code
= err
;
266 arm64_force_sig_info(info
, str
, current
);
272 void arm64_skip_faulting_instruction(struct pt_regs
*regs
, unsigned long size
)
277 * If we were single stepping, we want to get the step exception after
278 * we return from the trap.
281 user_fastforward_single_step(current
);
284 static LIST_HEAD(undef_hook
);
285 static DEFINE_RAW_SPINLOCK(undef_lock
);
287 void register_undef_hook(struct undef_hook
*hook
)
291 raw_spin_lock_irqsave(&undef_lock
, flags
);
292 list_add(&hook
->node
, &undef_hook
);
293 raw_spin_unlock_irqrestore(&undef_lock
, flags
);
296 void unregister_undef_hook(struct undef_hook
*hook
)
300 raw_spin_lock_irqsave(&undef_lock
, flags
);
301 list_del(&hook
->node
);
302 raw_spin_unlock_irqrestore(&undef_lock
, flags
);
305 static int call_undef_hook(struct pt_regs
*regs
)
307 struct undef_hook
*hook
;
310 int (*fn
)(struct pt_regs
*regs
, u32 instr
) = NULL
;
311 void __user
*pc
= (void __user
*)instruction_pointer(regs
);
313 if (!user_mode(regs
)) {
315 if (probe_kernel_address((__force __le32
*)pc
, instr_le
))
317 instr
= le32_to_cpu(instr_le
);
318 } else if (compat_thumb_mode(regs
)) {
319 /* 16-bit Thumb instruction */
321 if (get_user(instr_le
, (__le16 __user
*)pc
))
323 instr
= le16_to_cpu(instr_le
);
324 if (aarch32_insn_is_wide(instr
)) {
327 if (get_user(instr_le
, (__le16 __user
*)(pc
+ 2)))
329 instr2
= le16_to_cpu(instr_le
);
330 instr
= (instr
<< 16) | instr2
;
333 /* 32-bit ARM instruction */
335 if (get_user(instr_le
, (__le32 __user
*)pc
))
337 instr
= le32_to_cpu(instr_le
);
340 raw_spin_lock_irqsave(&undef_lock
, flags
);
341 list_for_each_entry(hook
, &undef_hook
, node
)
342 if ((instr
& hook
->instr_mask
) == hook
->instr_val
&&
343 (regs
->pstate
& hook
->pstate_mask
) == hook
->pstate_val
)
346 raw_spin_unlock_irqrestore(&undef_lock
, flags
);
348 return fn
? fn(regs
, instr
) : 1;
351 void force_signal_inject(int signal
, int code
, unsigned long address
)
355 struct pt_regs
*regs
= current_pt_regs();
357 if (WARN_ON(!user_mode(regs
)))
360 clear_siginfo(&info
);
364 desc
= "undefined instruction";
367 desc
= "illegal memory access";
370 desc
= "unknown or unrecoverable error";
374 /* Force signals we don't understand to SIGKILL */
375 if (WARN_ON(signal
!= SIGKILL
&&
376 siginfo_layout(signal
, code
) != SIL_FAULT
)) {
380 info
.si_signo
= signal
;
383 info
.si_addr
= (void __user
*)address
;
385 arm64_notify_die(desc
, regs
, &info
, 0);
389 * Set up process info to signal segmentation fault - called on access error.
391 void arm64_notify_segfault(unsigned long addr
)
395 down_read(¤t
->mm
->mmap_sem
);
396 if (find_vma(current
->mm
, addr
) == NULL
)
400 up_read(¤t
->mm
->mmap_sem
);
402 force_signal_inject(SIGSEGV
, code
, addr
);
405 asmlinkage
void __exception
do_undefinstr(struct pt_regs
*regs
)
407 /* check for AArch32 breakpoint instructions */
408 if (!aarch32_break_handler(regs
))
411 if (call_undef_hook(regs
) == 0)
414 BUG_ON(!user_mode(regs
));
415 force_signal_inject(SIGILL
, ILL_ILLOPC
, regs
->pc
);
418 #define __user_cache_maint(insn, address, res) \
419 if (address >= user_addr_max()) { \
422 uaccess_ttbr0_enable(); \
424 "1: " insn ", %1\n" \
427 " .pushsection .fixup,\"ax\"\n" \
429 "3: mov %w0, %w2\n" \
432 _ASM_EXTABLE(1b, 3b) \
434 : "r" (address), "i" (-EFAULT)); \
435 uaccess_ttbr0_disable(); \
438 static void user_cache_maint_handler(unsigned int esr
, struct pt_regs
*regs
)
440 unsigned long address
;
441 int rt
= (esr
& ESR_ELx_SYS64_ISS_RT_MASK
) >> ESR_ELx_SYS64_ISS_RT_SHIFT
;
442 int crm
= (esr
& ESR_ELx_SYS64_ISS_CRM_MASK
) >> ESR_ELx_SYS64_ISS_CRM_SHIFT
;
445 address
= untagged_addr(pt_regs_read_reg(regs
, rt
));
448 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU
: /* DC CVAU, gets promoted */
449 __user_cache_maint("dc civac", address
, ret
);
451 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC
: /* DC CVAC, gets promoted */
452 __user_cache_maint("dc civac", address
, ret
);
454 case ESR_ELx_SYS64_ISS_CRM_DC_CVAP
: /* DC CVAP */
455 __user_cache_maint("sys 3, c7, c12, 1", address
, ret
);
457 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC
: /* DC CIVAC */
458 __user_cache_maint("dc civac", address
, ret
);
460 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU
: /* IC IVAU */
461 __user_cache_maint("ic ivau", address
, ret
);
464 force_signal_inject(SIGILL
, ILL_ILLOPC
, regs
->pc
);
469 arm64_notify_segfault(address
);
471 arm64_skip_faulting_instruction(regs
, AARCH64_INSN_SIZE
);
474 static void ctr_read_handler(unsigned int esr
, struct pt_regs
*regs
)
476 int rt
= (esr
& ESR_ELx_SYS64_ISS_RT_MASK
) >> ESR_ELx_SYS64_ISS_RT_SHIFT
;
477 unsigned long val
= arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0
);
479 pt_regs_write_reg(regs
, rt
, val
);
481 arm64_skip_faulting_instruction(regs
, AARCH64_INSN_SIZE
);
484 static void cntvct_read_handler(unsigned int esr
, struct pt_regs
*regs
)
486 int rt
= (esr
& ESR_ELx_SYS64_ISS_RT_MASK
) >> ESR_ELx_SYS64_ISS_RT_SHIFT
;
488 pt_regs_write_reg(regs
, rt
, arch_counter_get_cntvct());
489 arm64_skip_faulting_instruction(regs
, AARCH64_INSN_SIZE
);
492 static void cntfrq_read_handler(unsigned int esr
, struct pt_regs
*regs
)
494 int rt
= (esr
& ESR_ELx_SYS64_ISS_RT_MASK
) >> ESR_ELx_SYS64_ISS_RT_SHIFT
;
496 pt_regs_write_reg(regs
, rt
, arch_timer_get_rate());
497 arm64_skip_faulting_instruction(regs
, AARCH64_INSN_SIZE
);
501 unsigned int esr_mask
;
502 unsigned int esr_val
;
503 void (*handler
)(unsigned int esr
, struct pt_regs
*regs
);
506 static struct sys64_hook sys64_hooks
[] = {
508 .esr_mask
= ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK
,
509 .esr_val
= ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL
,
510 .handler
= user_cache_maint_handler
,
513 /* Trap read access to CTR_EL0 */
514 .esr_mask
= ESR_ELx_SYS64_ISS_SYS_OP_MASK
,
515 .esr_val
= ESR_ELx_SYS64_ISS_SYS_CTR_READ
,
516 .handler
= ctr_read_handler
,
519 /* Trap read access to CNTVCT_EL0 */
520 .esr_mask
= ESR_ELx_SYS64_ISS_SYS_OP_MASK
,
521 .esr_val
= ESR_ELx_SYS64_ISS_SYS_CNTVCT
,
522 .handler
= cntvct_read_handler
,
525 /* Trap read access to CNTFRQ_EL0 */
526 .esr_mask
= ESR_ELx_SYS64_ISS_SYS_OP_MASK
,
527 .esr_val
= ESR_ELx_SYS64_ISS_SYS_CNTFRQ
,
528 .handler
= cntfrq_read_handler
,
533 asmlinkage
void __exception
do_sysinstr(unsigned int esr
, struct pt_regs
*regs
)
535 struct sys64_hook
*hook
;
537 for (hook
= sys64_hooks
; hook
->handler
; hook
++)
538 if ((hook
->esr_mask
& esr
) == hook
->esr_val
) {
539 hook
->handler(esr
, regs
);
544 * New SYS instructions may previously have been undefined at EL0. Fall
545 * back to our usual undefined instruction handler so that we handle
546 * these consistently.
551 static const char *esr_class_str
[] = {
552 [0 ... ESR_ELx_EC_MAX
] = "UNRECOGNIZED EC",
553 [ESR_ELx_EC_UNKNOWN
] = "Unknown/Uncategorized",
554 [ESR_ELx_EC_WFx
] = "WFI/WFE",
555 [ESR_ELx_EC_CP15_32
] = "CP15 MCR/MRC",
556 [ESR_ELx_EC_CP15_64
] = "CP15 MCRR/MRRC",
557 [ESR_ELx_EC_CP14_MR
] = "CP14 MCR/MRC",
558 [ESR_ELx_EC_CP14_LS
] = "CP14 LDC/STC",
559 [ESR_ELx_EC_FP_ASIMD
] = "ASIMD",
560 [ESR_ELx_EC_CP10_ID
] = "CP10 MRC/VMRS",
561 [ESR_ELx_EC_CP14_64
] = "CP14 MCRR/MRRC",
562 [ESR_ELx_EC_ILL
] = "PSTATE.IL",
563 [ESR_ELx_EC_SVC32
] = "SVC (AArch32)",
564 [ESR_ELx_EC_HVC32
] = "HVC (AArch32)",
565 [ESR_ELx_EC_SMC32
] = "SMC (AArch32)",
566 [ESR_ELx_EC_SVC64
] = "SVC (AArch64)",
567 [ESR_ELx_EC_HVC64
] = "HVC (AArch64)",
568 [ESR_ELx_EC_SMC64
] = "SMC (AArch64)",
569 [ESR_ELx_EC_SYS64
] = "MSR/MRS (AArch64)",
570 [ESR_ELx_EC_SVE
] = "SVE",
571 [ESR_ELx_EC_IMP_DEF
] = "EL3 IMP DEF",
572 [ESR_ELx_EC_IABT_LOW
] = "IABT (lower EL)",
573 [ESR_ELx_EC_IABT_CUR
] = "IABT (current EL)",
574 [ESR_ELx_EC_PC_ALIGN
] = "PC Alignment",
575 [ESR_ELx_EC_DABT_LOW
] = "DABT (lower EL)",
576 [ESR_ELx_EC_DABT_CUR
] = "DABT (current EL)",
577 [ESR_ELx_EC_SP_ALIGN
] = "SP Alignment",
578 [ESR_ELx_EC_FP_EXC32
] = "FP (AArch32)",
579 [ESR_ELx_EC_FP_EXC64
] = "FP (AArch64)",
580 [ESR_ELx_EC_SERROR
] = "SError",
581 [ESR_ELx_EC_BREAKPT_LOW
] = "Breakpoint (lower EL)",
582 [ESR_ELx_EC_BREAKPT_CUR
] = "Breakpoint (current EL)",
583 [ESR_ELx_EC_SOFTSTP_LOW
] = "Software Step (lower EL)",
584 [ESR_ELx_EC_SOFTSTP_CUR
] = "Software Step (current EL)",
585 [ESR_ELx_EC_WATCHPT_LOW
] = "Watchpoint (lower EL)",
586 [ESR_ELx_EC_WATCHPT_CUR
] = "Watchpoint (current EL)",
587 [ESR_ELx_EC_BKPT32
] = "BKPT (AArch32)",
588 [ESR_ELx_EC_VECTOR32
] = "Vector catch (AArch32)",
589 [ESR_ELx_EC_BRK64
] = "BRK (AArch64)",
592 const char *esr_get_class_string(u32 esr
)
594 return esr_class_str
[ESR_ELx_EC(esr
)];
598 * bad_mode handles the impossible case in the exception vector. This is always
601 asmlinkage
void bad_mode(struct pt_regs
*regs
, int reason
, unsigned int esr
)
605 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
606 handler
[reason
], smp_processor_id(), esr
,
607 esr_get_class_string(esr
));
614 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
615 * exceptions taken from EL0. Unlike bad_mode, this returns.
617 asmlinkage
void bad_el0_sync(struct pt_regs
*regs
, int reason
, unsigned int esr
)
620 void __user
*pc
= (void __user
*)instruction_pointer(regs
);
622 clear_siginfo(&info
);
623 info
.si_signo
= SIGILL
;
625 info
.si_code
= ILL_ILLOPC
;
628 current
->thread
.fault_address
= 0;
629 current
->thread
.fault_code
= esr
;
631 arm64_force_sig_info(&info
, "Bad EL0 synchronous exception", current
);
634 #ifdef CONFIG_VMAP_STACK
636 DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE
/sizeof(long)], overflow_stack
)
639 asmlinkage
void handle_bad_stack(struct pt_regs
*regs
)
641 unsigned long tsk_stk
= (unsigned long)current
->stack
;
642 unsigned long irq_stk
= (unsigned long)this_cpu_read(irq_stack_ptr
);
643 unsigned long ovf_stk
= (unsigned long)this_cpu_ptr(overflow_stack
);
644 unsigned int esr
= read_sysreg(esr_el1
);
645 unsigned long far
= read_sysreg(far_el1
);
648 pr_emerg("Insufficient stack space to handle exception!");
650 pr_emerg("ESR: 0x%08x -- %s\n", esr
, esr_get_class_string(esr
));
651 pr_emerg("FAR: 0x%016lx\n", far
);
653 pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
654 tsk_stk
, tsk_stk
+ THREAD_SIZE
);
655 pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n",
656 irq_stk
, irq_stk
+ THREAD_SIZE
);
657 pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
658 ovf_stk
, ovf_stk
+ OVERFLOW_STACK_SIZE
);
663 * We use nmi_panic to limit the potential for recusive overflows, and
664 * to get a better stack trace.
666 nmi_panic(NULL
, "kernel stack overflow");
671 void __noreturn
arm64_serror_panic(struct pt_regs
*regs
, u32 esr
)
675 pr_crit("SError Interrupt on CPU%d, code 0x%08x -- %s\n",
676 smp_processor_id(), esr
, esr_get_class_string(esr
));
680 nmi_panic(regs
, "Asynchronous SError Interrupt");
686 bool arm64_is_fatal_ras_serror(struct pt_regs
*regs
, unsigned int esr
)
688 u32 aet
= arm64_ras_serror_get_severity(esr
);
691 case ESR_ELx_AET_CE
: /* corrected error */
692 case ESR_ELx_AET_UEO
: /* restartable, not yet consumed */
694 * The CPU can make progress. We may take UEO again as
695 * a more severe error.
699 case ESR_ELx_AET_UEU
: /* Uncorrected Unrecoverable */
700 case ESR_ELx_AET_UER
: /* Uncorrected Recoverable */
702 * The CPU can't make progress. The exception may have
707 case ESR_ELx_AET_UC
: /* Uncontainable or Uncategorized error */
709 /* Error has been silently propagated */
710 arm64_serror_panic(regs
, esr
);
714 asmlinkage
void do_serror(struct pt_regs
*regs
, unsigned int esr
)
718 /* non-RAS errors are not containable */
719 if (!arm64_is_ras_serror(esr
) || arm64_is_fatal_ras_serror(regs
, esr
))
720 arm64_serror_panic(regs
, esr
);
725 void __pte_error(const char *file
, int line
, unsigned long val
)
727 pr_err("%s:%d: bad pte %016lx.\n", file
, line
, val
);
730 void __pmd_error(const char *file
, int line
, unsigned long val
)
732 pr_err("%s:%d: bad pmd %016lx.\n", file
, line
, val
);
735 void __pud_error(const char *file
, int line
, unsigned long val
)
737 pr_err("%s:%d: bad pud %016lx.\n", file
, line
, val
);
740 void __pgd_error(const char *file
, int line
, unsigned long val
)
742 pr_err("%s:%d: bad pgd %016lx.\n", file
, line
, val
);
745 /* GENERIC_BUG traps */
747 int is_valid_bugaddr(unsigned long addr
)
750 * bug_handler() only called for BRK #BUG_BRK_IMM.
751 * So the answer is trivial -- any spurious instances with no
752 * bug table entry will be rejected by report_bug() and passed
753 * back to the debug-monitors code and handled as a fatal
754 * unexpected debug exception.
759 static int bug_handler(struct pt_regs
*regs
, unsigned int esr
)
762 return DBG_HOOK_ERROR
;
764 switch (report_bug(regs
->pc
, regs
)) {
765 case BUG_TRAP_TYPE_BUG
:
766 die("Oops - BUG", regs
, 0);
769 case BUG_TRAP_TYPE_WARN
:
773 /* unknown/unrecognised bug trap type */
774 return DBG_HOOK_ERROR
;
777 /* If thread survives, skip over the BUG instruction and continue: */
778 arm64_skip_faulting_instruction(regs
, AARCH64_INSN_SIZE
);
779 return DBG_HOOK_HANDLED
;
782 static struct break_hook bug_break_hook
= {
783 .esr_val
= 0xf2000000 | BUG_BRK_IMM
,
784 .esr_mask
= 0xffffffff,
789 * Initial handler for AArch64 BRK exceptions
790 * This handler only used until debug_traps_init().
792 int __init
early_brk64(unsigned long addr
, unsigned int esr
,
793 struct pt_regs
*regs
)
795 return bug_handler(regs
, esr
) != DBG_HOOK_HANDLED
;
798 /* This registration must happen early, before debug_traps_init(). */
799 void __init
trap_init(void)
801 register_break_hook(&bug_break_hook
);