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Merge tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso...
[mirror_ubuntu-bionic-kernel.git] / arch / arm64 / kernel / traps.c
1 /*
2 * Based on arch/arm/kernel/traps.c
3 *
4 * Copyright (C) 1995-2009 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/bug.h>
21 #include <linux/signal.h>
22 #include <linux/personality.h>
23 #include <linux/kallsyms.h>
24 #include <linux/spinlock.h>
25 #include <linux/uaccess.h>
26 #include <linux/hardirq.h>
27 #include <linux/kdebug.h>
28 #include <linux/module.h>
29 #include <linux/kexec.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/sched.h>
33 #include <linux/syscalls.h>
34
35 #include <asm/atomic.h>
36 #include <asm/bug.h>
37 #include <asm/debug-monitors.h>
38 #include <asm/esr.h>
39 #include <asm/insn.h>
40 #include <asm/traps.h>
41 #include <asm/stack_pointer.h>
42 #include <asm/stacktrace.h>
43 #include <asm/exception.h>
44 #include <asm/system_misc.h>
45 #include <asm/sysreg.h>
46
47 static const char *handler[]= {
48 "Synchronous Abort",
49 "IRQ",
50 "FIQ",
51 "Error"
52 };
53
54 int show_unhandled_signals = 1;
55
56 /*
57 * Dump out the contents of some kernel memory nicely...
58 */
59 static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
60 unsigned long top)
61 {
62 unsigned long first;
63 mm_segment_t fs;
64 int i;
65
66 /*
67 * We need to switch to kernel mode so that we can use __get_user
68 * to safely read from kernel space.
69 */
70 fs = get_fs();
71 set_fs(KERNEL_DS);
72
73 printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
74
75 for (first = bottom & ~31; first < top; first += 32) {
76 unsigned long p;
77 char str[sizeof(" 12345678") * 8 + 1];
78
79 memset(str, ' ', sizeof(str));
80 str[sizeof(str) - 1] = '\0';
81
82 for (p = first, i = 0; i < (32 / 8)
83 && p < top; i++, p += 8) {
84 if (p >= bottom && p < top) {
85 unsigned long val;
86
87 if (__get_user(val, (unsigned long *)p) == 0)
88 sprintf(str + i * 17, " %016lx", val);
89 else
90 sprintf(str + i * 17, " ????????????????");
91 }
92 }
93 printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
94 }
95
96 set_fs(fs);
97 }
98
99 static void dump_backtrace_entry(unsigned long where)
100 {
101 /*
102 * Note that 'where' can have a physical address, but it's not handled.
103 */
104 print_ip_sym(where);
105 }
106
107 static void __dump_instr(const char *lvl, struct pt_regs *regs)
108 {
109 unsigned long addr = instruction_pointer(regs);
110 char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
111 int i;
112
113 for (i = -4; i < 1; i++) {
114 unsigned int val, bad;
115
116 bad = __get_user(val, &((u32 *)addr)[i]);
117
118 if (!bad)
119 p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
120 else {
121 p += sprintf(p, "bad PC value");
122 break;
123 }
124 }
125 printk("%sCode: %s\n", lvl, str);
126 }
127
128 static void dump_instr(const char *lvl, struct pt_regs *regs)
129 {
130 if (!user_mode(regs)) {
131 mm_segment_t fs = get_fs();
132 set_fs(KERNEL_DS);
133 __dump_instr(lvl, regs);
134 set_fs(fs);
135 } else {
136 __dump_instr(lvl, regs);
137 }
138 }
139
140 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
141 {
142 struct stackframe frame;
143 unsigned long irq_stack_ptr;
144 int skip;
145
146 pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
147
148 if (!tsk)
149 tsk = current;
150
151 if (!try_get_task_stack(tsk))
152 return;
153
154 /*
155 * Switching between stacks is valid when tracing current and in
156 * non-preemptible context.
157 */
158 if (tsk == current && !preemptible())
159 irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
160 else
161 irq_stack_ptr = 0;
162
163 if (tsk == current) {
164 frame.fp = (unsigned long)__builtin_frame_address(0);
165 frame.sp = current_stack_pointer;
166 frame.pc = (unsigned long)dump_backtrace;
167 } else {
168 /*
169 * task blocked in __switch_to
170 */
171 frame.fp = thread_saved_fp(tsk);
172 frame.sp = thread_saved_sp(tsk);
173 frame.pc = thread_saved_pc(tsk);
174 }
175 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
176 frame.graph = tsk->curr_ret_stack;
177 #endif
178
179 skip = !!regs;
180 printk("Call trace:\n");
181 while (1) {
182 unsigned long where = frame.pc;
183 unsigned long stack;
184 int ret;
185
186 /* skip until specified stack frame */
187 if (!skip) {
188 dump_backtrace_entry(where);
189 } else if (frame.fp == regs->regs[29]) {
190 skip = 0;
191 /*
192 * Mostly, this is the case where this function is
193 * called in panic/abort. As exception handler's
194 * stack frame does not contain the corresponding pc
195 * at which an exception has taken place, use regs->pc
196 * instead.
197 */
198 dump_backtrace_entry(regs->pc);
199 }
200 ret = unwind_frame(tsk, &frame);
201 if (ret < 0)
202 break;
203 stack = frame.sp;
204 if (in_exception_text(where)) {
205 /*
206 * If we switched to the irq_stack before calling this
207 * exception handler, then the pt_regs will be on the
208 * task stack. The easiest way to tell is if the large
209 * pt_regs would overlap with the end of the irq_stack.
210 */
211 if (stack < irq_stack_ptr &&
212 (stack + sizeof(struct pt_regs)) > irq_stack_ptr)
213 stack = IRQ_STACK_TO_TASK_STACK(irq_stack_ptr);
214
215 dump_mem("", "Exception stack", stack,
216 stack + sizeof(struct pt_regs));
217 }
218 }
219
220 put_task_stack(tsk);
221 }
222
223 void show_stack(struct task_struct *tsk, unsigned long *sp)
224 {
225 dump_backtrace(NULL, tsk);
226 barrier();
227 }
228
229 #ifdef CONFIG_PREEMPT
230 #define S_PREEMPT " PREEMPT"
231 #else
232 #define S_PREEMPT ""
233 #endif
234 #define S_SMP " SMP"
235
236 static int __die(const char *str, int err, struct pt_regs *regs)
237 {
238 struct task_struct *tsk = current;
239 static int die_counter;
240 int ret;
241
242 pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
243 str, err, ++die_counter);
244
245 /* trap and error numbers are mostly meaningless on ARM */
246 ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
247 if (ret == NOTIFY_STOP)
248 return ret;
249
250 print_modules();
251 __show_regs(regs);
252 pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
253 TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk),
254 end_of_stack(tsk));
255
256 if (!user_mode(regs)) {
257 dump_mem(KERN_EMERG, "Stack: ", regs->sp,
258 THREAD_SIZE + (unsigned long)task_stack_page(tsk));
259 dump_backtrace(regs, tsk);
260 dump_instr(KERN_EMERG, regs);
261 }
262
263 return ret;
264 }
265
266 static DEFINE_RAW_SPINLOCK(die_lock);
267
268 /*
269 * This function is protected against re-entrancy.
270 */
271 void die(const char *str, struct pt_regs *regs, int err)
272 {
273 int ret;
274
275 oops_enter();
276
277 raw_spin_lock_irq(&die_lock);
278 console_verbose();
279 bust_spinlocks(1);
280 ret = __die(str, err, regs);
281
282 if (regs && kexec_should_crash(current))
283 crash_kexec(regs);
284
285 bust_spinlocks(0);
286 add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
287 raw_spin_unlock_irq(&die_lock);
288 oops_exit();
289
290 if (in_interrupt())
291 panic("Fatal exception in interrupt");
292 if (panic_on_oops)
293 panic("Fatal exception");
294 if (ret != NOTIFY_STOP)
295 do_exit(SIGSEGV);
296 }
297
298 void arm64_notify_die(const char *str, struct pt_regs *regs,
299 struct siginfo *info, int err)
300 {
301 if (user_mode(regs)) {
302 current->thread.fault_address = 0;
303 current->thread.fault_code = err;
304 force_sig_info(info->si_signo, info, current);
305 } else {
306 die(str, regs, err);
307 }
308 }
309
310 static LIST_HEAD(undef_hook);
311 static DEFINE_RAW_SPINLOCK(undef_lock);
312
313 void register_undef_hook(struct undef_hook *hook)
314 {
315 unsigned long flags;
316
317 raw_spin_lock_irqsave(&undef_lock, flags);
318 list_add(&hook->node, &undef_hook);
319 raw_spin_unlock_irqrestore(&undef_lock, flags);
320 }
321
322 void unregister_undef_hook(struct undef_hook *hook)
323 {
324 unsigned long flags;
325
326 raw_spin_lock_irqsave(&undef_lock, flags);
327 list_del(&hook->node);
328 raw_spin_unlock_irqrestore(&undef_lock, flags);
329 }
330
331 static int call_undef_hook(struct pt_regs *regs)
332 {
333 struct undef_hook *hook;
334 unsigned long flags;
335 u32 instr;
336 int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
337 void __user *pc = (void __user *)instruction_pointer(regs);
338
339 if (!user_mode(regs))
340 return 1;
341
342 if (compat_thumb_mode(regs)) {
343 /* 16-bit Thumb instruction */
344 if (get_user(instr, (u16 __user *)pc))
345 goto exit;
346 instr = le16_to_cpu(instr);
347 if (aarch32_insn_is_wide(instr)) {
348 u32 instr2;
349
350 if (get_user(instr2, (u16 __user *)(pc + 2)))
351 goto exit;
352 instr2 = le16_to_cpu(instr2);
353 instr = (instr << 16) | instr2;
354 }
355 } else {
356 /* 32-bit ARM instruction */
357 if (get_user(instr, (u32 __user *)pc))
358 goto exit;
359 instr = le32_to_cpu(instr);
360 }
361
362 raw_spin_lock_irqsave(&undef_lock, flags);
363 list_for_each_entry(hook, &undef_hook, node)
364 if ((instr & hook->instr_mask) == hook->instr_val &&
365 (regs->pstate & hook->pstate_mask) == hook->pstate_val)
366 fn = hook->fn;
367
368 raw_spin_unlock_irqrestore(&undef_lock, flags);
369 exit:
370 return fn ? fn(regs, instr) : 1;
371 }
372
373 static void force_signal_inject(int signal, int code, struct pt_regs *regs,
374 unsigned long address)
375 {
376 siginfo_t info;
377 void __user *pc = (void __user *)instruction_pointer(regs);
378 const char *desc;
379
380 switch (signal) {
381 case SIGILL:
382 desc = "undefined instruction";
383 break;
384 case SIGSEGV:
385 desc = "illegal memory access";
386 break;
387 default:
388 desc = "bad mode";
389 break;
390 }
391
392 if (unhandled_signal(current, signal) &&
393 show_unhandled_signals_ratelimited()) {
394 pr_info("%s[%d]: %s: pc=%p\n",
395 current->comm, task_pid_nr(current), desc, pc);
396 dump_instr(KERN_INFO, regs);
397 }
398
399 info.si_signo = signal;
400 info.si_errno = 0;
401 info.si_code = code;
402 info.si_addr = pc;
403
404 arm64_notify_die(desc, regs, &info, 0);
405 }
406
407 /*
408 * Set up process info to signal segmentation fault - called on access error.
409 */
410 void arm64_notify_segfault(struct pt_regs *regs, unsigned long addr)
411 {
412 int code;
413
414 down_read(&current->mm->mmap_sem);
415 if (find_vma(current->mm, addr) == NULL)
416 code = SEGV_MAPERR;
417 else
418 code = SEGV_ACCERR;
419 up_read(&current->mm->mmap_sem);
420
421 force_signal_inject(SIGSEGV, code, regs, addr);
422 }
423
424 asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
425 {
426 /* check for AArch32 breakpoint instructions */
427 if (!aarch32_break_handler(regs))
428 return;
429
430 if (call_undef_hook(regs) == 0)
431 return;
432
433 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
434 }
435
436 int cpu_enable_cache_maint_trap(void *__unused)
437 {
438 config_sctlr_el1(SCTLR_EL1_UCI, 0);
439 return 0;
440 }
441
442 #define __user_cache_maint(insn, address, res) \
443 if (untagged_addr(address) >= user_addr_max()) { \
444 res = -EFAULT; \
445 } else { \
446 uaccess_ttbr0_enable(); \
447 asm volatile ( \
448 "1: " insn ", %1\n" \
449 " mov %w0, #0\n" \
450 "2:\n" \
451 " .pushsection .fixup,\"ax\"\n" \
452 " .align 2\n" \
453 "3: mov %w0, %w2\n" \
454 " b 2b\n" \
455 " .popsection\n" \
456 _ASM_EXTABLE(1b, 3b) \
457 : "=r" (res) \
458 : "r" (address), "i" (-EFAULT)); \
459 uaccess_ttbr0_disable(); \
460 }
461
462 static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
463 {
464 unsigned long address;
465 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
466 int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
467 int ret = 0;
468
469 address = (rt == 31) ? 0 : regs->regs[rt];
470
471 switch (crm) {
472 case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
473 __user_cache_maint("dc civac", address, ret);
474 break;
475 case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
476 __user_cache_maint("dc civac", address, ret);
477 break;
478 case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
479 __user_cache_maint("dc civac", address, ret);
480 break;
481 case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
482 __user_cache_maint("ic ivau", address, ret);
483 break;
484 default:
485 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
486 return;
487 }
488
489 if (ret)
490 arm64_notify_segfault(regs, address);
491 else
492 regs->pc += 4;
493 }
494
495 static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
496 {
497 int rt = (esr & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT;
498
499 regs->regs[rt] = arm64_ftr_reg_ctrel0.sys_val;
500 regs->pc += 4;
501 }
502
503 struct sys64_hook {
504 unsigned int esr_mask;
505 unsigned int esr_val;
506 void (*handler)(unsigned int esr, struct pt_regs *regs);
507 };
508
509 static struct sys64_hook sys64_hooks[] = {
510 {
511 .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
512 .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
513 .handler = user_cache_maint_handler,
514 },
515 {
516 /* Trap read access to CTR_EL0 */
517 .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
518 .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
519 .handler = ctr_read_handler,
520 },
521 {},
522 };
523
524 asmlinkage void __exception do_sysinstr(unsigned int esr, struct pt_regs *regs)
525 {
526 struct sys64_hook *hook;
527
528 for (hook = sys64_hooks; hook->handler; hook++)
529 if ((hook->esr_mask & esr) == hook->esr_val) {
530 hook->handler(esr, regs);
531 return;
532 }
533
534 force_signal_inject(SIGILL, ILL_ILLOPC, regs, 0);
535 }
536
537 long compat_arm_syscall(struct pt_regs *regs);
538
539 asmlinkage long do_ni_syscall(struct pt_regs *regs)
540 {
541 #ifdef CONFIG_COMPAT
542 long ret;
543 if (is_compat_task()) {
544 ret = compat_arm_syscall(regs);
545 if (ret != -ENOSYS)
546 return ret;
547 }
548 #endif
549
550 if (show_unhandled_signals_ratelimited()) {
551 pr_info("%s[%d]: syscall %d\n", current->comm,
552 task_pid_nr(current), (int)regs->syscallno);
553 dump_instr("", regs);
554 if (user_mode(regs))
555 __show_regs(regs);
556 }
557
558 return sys_ni_syscall();
559 }
560
561 static const char *esr_class_str[] = {
562 [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
563 [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
564 [ESR_ELx_EC_WFx] = "WFI/WFE",
565 [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
566 [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
567 [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
568 [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
569 [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
570 [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
571 [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
572 [ESR_ELx_EC_ILL] = "PSTATE.IL",
573 [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
574 [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
575 [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
576 [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
577 [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
578 [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
579 [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
580 [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
581 [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
582 [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
583 [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
584 [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
585 [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
586 [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
587 [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
588 [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
589 [ESR_ELx_EC_SERROR] = "SError",
590 [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
591 [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
592 [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
593 [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
594 [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
595 [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
596 [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
597 [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
598 [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
599 };
600
601 const char *esr_get_class_string(u32 esr)
602 {
603 return esr_class_str[ESR_ELx_EC(esr)];
604 }
605
606 /*
607 * bad_mode handles the impossible case in the exception vector. This is always
608 * fatal.
609 */
610 asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
611 {
612 console_verbose();
613
614 pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
615 handler[reason], smp_processor_id(), esr,
616 esr_get_class_string(esr));
617
618 die("Oops - bad mode", regs, 0);
619 local_irq_disable();
620 panic("bad mode");
621 }
622
623 /*
624 * bad_el0_sync handles unexpected, but potentially recoverable synchronous
625 * exceptions taken from EL0. Unlike bad_mode, this returns.
626 */
627 asmlinkage void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
628 {
629 siginfo_t info;
630 void __user *pc = (void __user *)instruction_pointer(regs);
631 console_verbose();
632
633 pr_crit("Bad EL0 synchronous exception detected on CPU%d, code 0x%08x -- %s\n",
634 smp_processor_id(), esr, esr_get_class_string(esr));
635 __show_regs(regs);
636
637 info.si_signo = SIGILL;
638 info.si_errno = 0;
639 info.si_code = ILL_ILLOPC;
640 info.si_addr = pc;
641
642 current->thread.fault_address = 0;
643 current->thread.fault_code = 0;
644
645 force_sig_info(info.si_signo, &info, current);
646 }
647
648 void __pte_error(const char *file, int line, unsigned long val)
649 {
650 pr_err("%s:%d: bad pte %016lx.\n", file, line, val);
651 }
652
653 void __pmd_error(const char *file, int line, unsigned long val)
654 {
655 pr_err("%s:%d: bad pmd %016lx.\n", file, line, val);
656 }
657
658 void __pud_error(const char *file, int line, unsigned long val)
659 {
660 pr_err("%s:%d: bad pud %016lx.\n", file, line, val);
661 }
662
663 void __pgd_error(const char *file, int line, unsigned long val)
664 {
665 pr_err("%s:%d: bad pgd %016lx.\n", file, line, val);
666 }
667
668 /* GENERIC_BUG traps */
669
670 int is_valid_bugaddr(unsigned long addr)
671 {
672 /*
673 * bug_handler() only called for BRK #BUG_BRK_IMM.
674 * So the answer is trivial -- any spurious instances with no
675 * bug table entry will be rejected by report_bug() and passed
676 * back to the debug-monitors code and handled as a fatal
677 * unexpected debug exception.
678 */
679 return 1;
680 }
681
682 static int bug_handler(struct pt_regs *regs, unsigned int esr)
683 {
684 if (user_mode(regs))
685 return DBG_HOOK_ERROR;
686
687 switch (report_bug(regs->pc, regs)) {
688 case BUG_TRAP_TYPE_BUG:
689 die("Oops - BUG", regs, 0);
690 break;
691
692 case BUG_TRAP_TYPE_WARN:
693 /* Ideally, report_bug() should backtrace for us... but no. */
694 dump_backtrace(regs, NULL);
695 break;
696
697 default:
698 /* unknown/unrecognised bug trap type */
699 return DBG_HOOK_ERROR;
700 }
701
702 /* If thread survives, skip over the BUG instruction and continue: */
703 regs->pc += AARCH64_INSN_SIZE; /* skip BRK and resume */
704 return DBG_HOOK_HANDLED;
705 }
706
707 static struct break_hook bug_break_hook = {
708 .esr_val = 0xf2000000 | BUG_BRK_IMM,
709 .esr_mask = 0xffffffff,
710 .fn = bug_handler,
711 };
712
713 /*
714 * Initial handler for AArch64 BRK exceptions
715 * This handler only used until debug_traps_init().
716 */
717 int __init early_brk64(unsigned long addr, unsigned int esr,
718 struct pt_regs *regs)
719 {
720 return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
721 }
722
723 /* This registration must happen early, before debug_traps_init(). */
724 void __init trap_init(void)
725 {
726 register_break_hook(&bug_break_hook);
727 }
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