arch/arm64/kvm/hyp/entry.S

   1 /*
   2  * Copyright (C) 2015 - ARM Ltd
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <linux/linkage.h>
  19
  20 #include <asm/asm-offsets.h>
  21 #include <asm/assembler.h>
  22 #include <asm/fpsimdmacros.h>
  23 #include <asm/kvm.h>
  24 #include <asm/kvm_arm.h>
  25 #include <asm/kvm_asm.h>
  26 #include <asm/kvm_mmu.h>
  27
  28 #define CPU_GP_REG_OFFSET(x)    (CPU_GP_REGS + x)
  29 #define CPU_XREG_OFFSET(x)      CPU_GP_REG_OFFSET(CPU_USER_PT_REGS + 8*x)
  30
  31         .text
  32         .pushsection    .hyp.text, "ax"
  33
  34 .macro save_callee_saved_regs ctxt
  35         stp     x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)]
  36         stp     x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)]
  37         stp     x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)]
  38         stp     x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)]
  39         stp     x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)]
  40         stp     x29, lr,  [\ctxt, #CPU_XREG_OFFSET(29)]
  41 .endm
  42
  43 .macro restore_callee_saved_regs ctxt
  44         ldp     x19, x20, [\ctxt, #CPU_XREG_OFFSET(19)]
  45         ldp     x21, x22, [\ctxt, #CPU_XREG_OFFSET(21)]
  46         ldp     x23, x24, [\ctxt, #CPU_XREG_OFFSET(23)]
  47         ldp     x25, x26, [\ctxt, #CPU_XREG_OFFSET(25)]
  48         ldp     x27, x28, [\ctxt, #CPU_XREG_OFFSET(27)]
  49         ldp     x29, lr,  [\ctxt, #CPU_XREG_OFFSET(29)]
  50 .endm
  51
  52 /*
  53  * u64 __guest_enter(struct kvm_vcpu *vcpu,
  54  *                   struct kvm_cpu_context *host_ctxt);
  55  */
  56 ENTRY(__guest_enter)
  57         // x0: vcpu
  58         // x1: host context
  59         // x2-x17: clobbered by macros
  60         // x18: guest context
  61
  62         // Store the host regs
  63         save_callee_saved_regs x1
  64
  65         add     x18, x0, #VCPU_CONTEXT
  66
  67         // Restore guest regs x0-x17
  68         ldp     x0, x1,   [x18, #CPU_XREG_OFFSET(0)]
  69         ldp     x2, x3,   [x18, #CPU_XREG_OFFSET(2)]
  70         ldp     x4, x5,   [x18, #CPU_XREG_OFFSET(4)]
  71         ldp     x6, x7,   [x18, #CPU_XREG_OFFSET(6)]
  72         ldp     x8, x9,   [x18, #CPU_XREG_OFFSET(8)]
  73         ldp     x10, x11, [x18, #CPU_XREG_OFFSET(10)]
  74         ldp     x12, x13, [x18, #CPU_XREG_OFFSET(12)]
  75         ldp     x14, x15, [x18, #CPU_XREG_OFFSET(14)]
  76         ldp     x16, x17, [x18, #CPU_XREG_OFFSET(16)]
  77
  78         // Restore guest regs x19-x29, lr
  79         restore_callee_saved_regs x18
  80
  81         // Restore guest reg x18
  82         ldr     x18,      [x18, #CPU_XREG_OFFSET(18)]
  83
  84         // Do not touch any register after this!
  85         eret
  86         sb
  87 ENDPROC(__guest_enter)
  88
  89 ENTRY(__guest_exit)
  90         // x0: return code
  91         // x1: vcpu
  92         // x2-x29,lr: vcpu regs
  93         // vcpu x0-x1 on the stack
  94
  95         add     x1, x1, #VCPU_CONTEXT
  96
  97         ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
  98
  99         // Store the guest regs x2 and x3
 100         stp     x2, x3,   [x1, #CPU_XREG_OFFSET(2)]
 101
 102         // Retrieve the guest regs x0-x1 from the stack
 103         ldp     x2, x3, [sp], #16       // x0, x1
 104
 105         // Store the guest regs x0-x1 and x4-x18
 106         stp     x2, x3,   [x1, #CPU_XREG_OFFSET(0)]
 107         stp     x4, x5,   [x1, #CPU_XREG_OFFSET(4)]
 108         stp     x6, x7,   [x1, #CPU_XREG_OFFSET(6)]
 109         stp     x8, x9,   [x1, #CPU_XREG_OFFSET(8)]
 110         stp     x10, x11, [x1, #CPU_XREG_OFFSET(10)]
 111         stp     x12, x13, [x1, #CPU_XREG_OFFSET(12)]
 112         stp     x14, x15, [x1, #CPU_XREG_OFFSET(14)]
 113         stp     x16, x17, [x1, #CPU_XREG_OFFSET(16)]
 114         str     x18,      [x1, #CPU_XREG_OFFSET(18)]
 115
 116         // Store the guest regs x19-x29, lr
 117         save_callee_saved_regs x1
 118
 119         get_host_ctxt   x2, x3
 120
 121         // Now restore the host regs
 122         restore_callee_saved_regs x2
 123
 124 alternative_if ARM64_HAS_RAS_EXTN
 125         // If we have the RAS extensions we can consume a pending error
 126         // without an unmask-SError and isb.
 127         esb
 128         mrs_s   x2, SYS_DISR_EL1
 129         str     x2, [x1, #(VCPU_FAULT_DISR - VCPU_CONTEXT)]
 130         cbz     x2, 1f
 131         msr_s   SYS_DISR_EL1, xzr
 132         orr     x0, x0, #(1<<ARM_EXIT_WITH_SERROR_BIT)
 133 1:      ret
 134 alternative_else
 135         // If we have a pending asynchronous abort, now is the
 136         // time to find out. From your VAXorcist book, page 666:
 137         // "Threaten me not, oh Evil one!  For I speak with
 138         // the power of DEC, and I command thee to show thyself!"
 139         mrs     x2, elr_el2
 140         mrs     x3, esr_el2
 141         mrs     x4, spsr_el2
 142         mov     x5, x0
 143
 144         dsb     sy              // Synchronize against in-flight ld/st
 145         nop
 146         msr     daifclr, #4     // Unmask aborts
 147 alternative_endif
 148
 149         // This is our single instruction exception window. A pending
 150         // SError is guaranteed to occur at the earliest when we unmask
 151         // it, and at the latest just after the ISB.
 152         .global abort_guest_exit_start
 153 abort_guest_exit_start:
 154
 155         isb
 156
 157         .global abort_guest_exit_end
 158 abort_guest_exit_end:
 159
 160         // If the exception took place, restore the EL1 exception
 161         // context so that we can report some information.
 162         // Merge the exception code with the SError pending bit.
 163         tbz     x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
 164         msr     elr_el2, x2
 165         msr     esr_el2, x3
 166         msr     spsr_el2, x4
 167         orr     x0, x0, x5
 168 1:      ret
 169 ENDPROC(__guest_exit)