arch/arm64/kvm/hyp/tlb.c

   1 /*
   2  * Copyright (C) 2015 - ARM Ltd
   3  * Author: Marc Zyngier <marc.zyngier@arm.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <asm/kvm_hyp.h>
  19 #include <asm/tlbflush.h>
  20
  21 void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
  22 {
  23         dsb(ishst);
  24
  25         /* Switch to requested VMID */
  26         kvm = kern_hyp_va(kvm);
  27         write_sysreg(kvm->arch.vttbr, vttbr_el2);
  28         isb();
  29
  30         /*
  31          * We could do so much better if we had the VA as well.
  32          * Instead, we invalidate Stage-2 for this IPA, and the
  33          * whole of Stage-1. Weep...
  34          */
  35         ipa >>= 12;
  36         __tlbi(ipas2e1is, ipa);
  37
  38         /*
  39          * We have to ensure completion of the invalidation at Stage-2,
  40          * since a table walk on another CPU could refill a TLB with a
  41          * complete (S1 + S2) walk based on the old Stage-2 mapping if
  42          * the Stage-1 invalidation happened first.
  43          */
  44         dsb(ish);
  45         __tlbi(vmalle1is);
  46         dsb(ish);
  47         isb();
  48
  49         write_sysreg(0, vttbr_el2);
  50 }
  51
  52 void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
  53 {
  54         dsb(ishst);
  55
  56         /* Switch to requested VMID */
  57         kvm = kern_hyp_va(kvm);
  58         write_sysreg(kvm->arch.vttbr, vttbr_el2);
  59         isb();
  60
  61         __tlbi(vmalls12e1is);
  62         dsb(ish);
  63         isb();
  64
  65         write_sysreg(0, vttbr_el2);
  66 }
  67
  68 void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
  69 {
  70         struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
  71
  72         /* Switch to requested VMID */
  73         write_sysreg(kvm->arch.vttbr, vttbr_el2);
  74         isb();
  75
  76         __tlbi(vmalle1);
  77         dsb(nsh);
  78         isb();
  79
  80         write_sysreg(0, vttbr_el2);
  81 }
  82
  83 void __hyp_text __kvm_flush_vm_context(void)
  84 {
  85         dsb(ishst);
  86         __tlbi(alle1is);
  87         asm volatile("ic ialluis" : : );
  88         dsb(ish);
  89 }