2 * file: include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
8 * blackfin serial driver head file
14 * bugs: enter bugs at http://blackfin.uclinux.org/
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
32 #include <linux/serial.h>
34 #include <asm/portmux.h>
36 #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
37 #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
38 #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
39 #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
40 #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
41 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
42 #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
44 #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v)
45 #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v)
46 #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v)
47 #define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v))
48 #define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v))
49 #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v)
50 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
51 #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v)
53 #define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
54 #define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
56 #define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
57 #define UART_SET_RTS(x) gpio_set_value(x->rts_pin, 1)
58 #define UART_CLEAR_RTS(x) gpio_set_value(x->rts_pin, 0)
59 #define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)
60 #define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0)
62 #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
63 # define CONFIG_SERIAL_BFIN_CTSRTS
65 # ifndef CONFIG_UART0_CTS_PIN
66 # define CONFIG_UART0_CTS_PIN -1
69 # ifndef CONFIG_UART0_RTS_PIN
70 # define CONFIG_UART0_RTS_PIN -1
73 # ifndef CONFIG_UART1_CTS_PIN
74 # define CONFIG_UART1_CTS_PIN -1
77 # ifndef CONFIG_UART1_RTS_PIN
78 # define CONFIG_UART1_RTS_PIN -1
82 #define BFIN_UART_TX_FIFO_SIZE 2
85 * The pin configuration is different from schematic
87 struct bfin_serial_port
{
88 struct uart_port port
;
89 unsigned int old_status
;
91 #ifdef CONFIG_SERIAL_BFIN_DMA
94 struct circ_buf rx_dma_buf
;
95 struct timer_list rx_dma_timer
;
97 unsigned int tx_dma_channel
;
98 unsigned int rx_dma_channel
;
99 struct work_struct tx_dma_workqueue
;
101 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
102 struct timer_list cts_timer
;
108 /* The hardware clears the LSR bits upon read, so we need to cache
109 * some of the more fun bits in software so they don't get lost
110 * when checking the LSR in other code paths (TX).
112 static inline unsigned int UART_GET_LSR(struct bfin_serial_port
*uart
)
114 unsigned int lsr
= bfin_read16(uart
->port
.membase
+ OFFSET_LSR
);
115 uart
->lsr
|= (lsr
& (BI
|FE
|PE
|OE
));
116 return lsr
| uart
->lsr
;
119 static inline void UART_CLEAR_LSR(struct bfin_serial_port
*uart
)
122 bfin_write16(uart
->port
.membase
+ OFFSET_LSR
, -1);
125 struct bfin_serial_res
{
126 unsigned long uart_base_addr
;
128 #ifdef CONFIG_SERIAL_BFIN_DMA
129 unsigned int uart_tx_dma_channel
;
130 unsigned int uart_rx_dma_channel
;
132 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
138 struct bfin_serial_res bfin_serial_resource
[] = {
139 #ifdef CONFIG_SERIAL_BFIN_UART0
143 #ifdef CONFIG_SERIAL_BFIN_DMA
147 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
148 CONFIG_UART0_CTS_PIN
,
149 CONFIG_UART0_RTS_PIN
,
153 #ifdef CONFIG_SERIAL_BFIN_UART1
157 #ifdef CONFIG_SERIAL_BFIN_DMA
161 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
162 CONFIG_UART1_CTS_PIN
,
163 CONFIG_UART1_RTS_PIN
,
169 #define DRIVER_NAME "bfin-uart"
171 static void bfin_serial_hw_init(struct bfin_serial_port
*uart
)
174 #ifdef CONFIG_SERIAL_BFIN_UART0
175 peripheral_request(P_UART0_TX
, DRIVER_NAME
);
176 peripheral_request(P_UART0_RX
, DRIVER_NAME
);
179 #ifdef CONFIG_SERIAL_BFIN_UART1
180 peripheral_request(P_UART1_TX
, DRIVER_NAME
);
181 peripheral_request(P_UART1_RX
, DRIVER_NAME
);
184 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
185 if (uart
->cts_pin
>= 0) {
186 gpio_request(uart
->cts_pin
, DRIVER_NAME
);
187 gpio_direction_input(uart
->cts_pin
);
190 if (uart
->rts_pin
>= 0) {
191 gpio_request(uart
->rts_pin
, DRIVER_NAME
);
192 gpio_direction_output(uart
->rts_pin
, 0);