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1 /*
2 * Board Info File for the BlackStamp
3 *
4 * Copyright 2004-2008 Analog Devices Inc.
5 * 2008 Benjamin Matthews <bmat@lle.rochester.edu>
6 * 2005 National ICT Australia (NICTA)
7 * Aidan Williams <aidan@nicta.com.au>
8 *
9 * More info about the BlackStamp at:
10 * http://blackfin.uclinux.org/gf/project/blackstamp/
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/partitions.h>
19 #include <linux/mtd/physmap.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/flash.h>
22 #include <linux/irq.h>
23 #include <linux/gpio.h>
24 #include <linux/i2c.h>
25 #include <linux/gpio/machine.h>
26 #include <asm/dma.h>
27 #include <asm/bfin5xx_spi.h>
28 #include <asm/portmux.h>
29 #include <asm/dpmc.h>
30
31 /*
32 * Name the Board for the /proc/cpuinfo
33 */
34 const char bfin_board_name[] = "BlackStamp";
35
36 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
37 static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40 };
41 #endif
42
43 /*
44 * Driver needs to know address, irq and flag pin.
45 */
46 #if IS_ENABLED(CONFIG_SMC91X)
47 #include <linux/smc91x.h>
48
49 static struct smc91x_platdata smc91x_info = {
50 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
51 .leda = RPC_LED_100_10,
52 .ledb = RPC_LED_TX_RX,
53 };
54
55 static struct resource smc91x_resources[] = {
56 {
57 .name = "smc91x-regs",
58 .start = 0x20300300,
59 .end = 0x20300300 + 16,
60 .flags = IORESOURCE_MEM,
61 }, {
62 .start = IRQ_PF3,
63 .end = IRQ_PF3,
64 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
65 },
66 };
67
68 static struct platform_device smc91x_device = {
69 .name = "smc91x",
70 .id = 0,
71 .num_resources = ARRAY_SIZE(smc91x_resources),
72 .resource = smc91x_resources,
73 .dev = {
74 .platform_data = &smc91x_info,
75 },
76 };
77 #endif
78
79 #if IS_ENABLED(CONFIG_MTD_M25P80)
80 static struct mtd_partition bfin_spi_flash_partitions[] = {
81 {
82 .name = "bootloader(spi)",
83 .size = 0x00040000,
84 .offset = 0,
85 .mask_flags = MTD_CAP_ROM
86 }, {
87 .name = "linux kernel(spi)",
88 .size = 0x180000,
89 .offset = MTDPART_OFS_APPEND,
90 }, {
91 .name = "file system(spi)",
92 .size = MTDPART_SIZ_FULL,
93 .offset = MTDPART_OFS_APPEND,
94 }
95 };
96
97 static struct flash_platform_data bfin_spi_flash_data = {
98 .name = "m25p80",
99 .parts = bfin_spi_flash_partitions,
100 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
101 .type = "m25p64",
102 };
103
104 /* SPI flash chip (m25p64) */
105 static struct bfin5xx_spi_chip spi_flash_chip_info = {
106 .enable_dma = 0, /* use dma transfer with this chip*/
107 };
108 #endif
109
110 #if IS_ENABLED(CONFIG_MMC_SPI)
111 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
112 .enable_dma = 0,
113 };
114 #endif
115
116 static struct spi_board_info bfin_spi_board_info[] __initdata = {
117 #if IS_ENABLED(CONFIG_MTD_M25P80)
118 {
119 /* the modalias must be the same as spi device driver name */
120 .modalias = "m25p80", /* Name of spi_driver for this device */
121 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
122 .bus_num = 0, /* Framework bus number */
123 .chip_select = 2, /* Framework chip select. */
124 .platform_data = &bfin_spi_flash_data,
125 .controller_data = &spi_flash_chip_info,
126 .mode = SPI_MODE_3,
127 },
128 #endif
129
130 #if IS_ENABLED(CONFIG_MMC_SPI)
131 {
132 .modalias = "mmc_spi",
133 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
134 .bus_num = 0,
135 .chip_select = 5,
136 .controller_data = &mmc_spi_chip_info,
137 .mode = SPI_MODE_3,
138 },
139 #endif
140
141 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
142 {
143 .modalias = "spidev",
144 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0,
146 .chip_select = 7,
147 },
148 #endif
149 };
150
151 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
152 /* SPI (0) */
153 static struct resource bfin_spi0_resource[] = {
154 [0] = {
155 .start = SPI0_REGBASE,
156 .end = SPI0_REGBASE + 0xFF,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = CH_SPI,
161 .end = CH_SPI,
162 .flags = IORESOURCE_DMA,
163 },
164 [2] = {
165 .start = IRQ_SPI,
166 .end = IRQ_SPI,
167 .flags = IORESOURCE_IRQ,
168 }
169 };
170
171 /* SPI controller data */
172 static struct bfin5xx_spi_master bfin_spi0_info = {
173 .num_chipselect = 8,
174 .enable_dma = 1, /* master has the ability to do dma transfer */
175 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
176 };
177
178 static struct platform_device bfin_spi0_device = {
179 .name = "bfin-spi",
180 .id = 0, /* Bus number */
181 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
182 .resource = bfin_spi0_resource,
183 .dev = {
184 .platform_data = &bfin_spi0_info, /* Passed to driver */
185 },
186 };
187 #endif /* spi master and devices */
188
189 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
190 #ifdef CONFIG_SERIAL_BFIN_UART0
191 static struct resource bfin_uart0_resources[] = {
192 {
193 .start = BFIN_UART_THR,
194 .end = BFIN_UART_GCTL+2,
195 .flags = IORESOURCE_MEM,
196 },
197 {
198 .start = IRQ_UART0_TX,
199 .end = IRQ_UART0_TX,
200 .flags = IORESOURCE_IRQ,
201 },
202 {
203 .start = IRQ_UART0_RX,
204 .end = IRQ_UART0_RX,
205 .flags = IORESOURCE_IRQ,
206 },
207 {
208 .start = IRQ_UART0_ERROR,
209 .end = IRQ_UART0_ERROR,
210 .flags = IORESOURCE_IRQ,
211 },
212 {
213 .start = CH_UART0_TX,
214 .end = CH_UART0_TX,
215 .flags = IORESOURCE_DMA,
216 },
217 {
218 .start = CH_UART0_RX,
219 .end = CH_UART0_RX,
220 .flags = IORESOURCE_DMA,
221 },
222 };
223
224 static unsigned short bfin_uart0_peripherals[] = {
225 P_UART0_TX, P_UART0_RX, 0
226 };
227
228 static struct platform_device bfin_uart0_device = {
229 .name = "bfin-uart",
230 .id = 0,
231 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
232 .resource = bfin_uart0_resources,
233 .dev = {
234 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
235 },
236 };
237 #endif
238 #endif
239
240 #if IS_ENABLED(CONFIG_BFIN_SIR)
241 #ifdef CONFIG_BFIN_SIR0
242 static struct resource bfin_sir0_resources[] = {
243 {
244 .start = 0xFFC00400,
245 .end = 0xFFC004FF,
246 .flags = IORESOURCE_MEM,
247 },
248 {
249 .start = IRQ_UART0_RX,
250 .end = IRQ_UART0_RX+1,
251 .flags = IORESOURCE_IRQ,
252 },
253 {
254 .start = CH_UART0_RX,
255 .end = CH_UART0_RX+1,
256 .flags = IORESOURCE_DMA,
257 },
258 };
259
260 static struct platform_device bfin_sir0_device = {
261 .name = "bfin_sir",
262 .id = 0,
263 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
264 .resource = bfin_sir0_resources,
265 };
266 #endif
267 #endif
268
269 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
270 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
271 static struct resource bfin_sport0_uart_resources[] = {
272 {
273 .start = SPORT0_TCR1,
274 .end = SPORT0_MRCS3+4,
275 .flags = IORESOURCE_MEM,
276 },
277 {
278 .start = IRQ_SPORT0_RX,
279 .end = IRQ_SPORT0_RX+1,
280 .flags = IORESOURCE_IRQ,
281 },
282 {
283 .start = IRQ_SPORT0_ERROR,
284 .end = IRQ_SPORT0_ERROR,
285 .flags = IORESOURCE_IRQ,
286 },
287 };
288
289 static unsigned short bfin_sport0_peripherals[] = {
290 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
291 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
292 };
293
294 static struct platform_device bfin_sport0_uart_device = {
295 .name = "bfin-sport-uart",
296 .id = 0,
297 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
298 .resource = bfin_sport0_uart_resources,
299 .dev = {
300 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
301 },
302 };
303 #endif
304 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
305 static struct resource bfin_sport1_uart_resources[] = {
306 {
307 .start = SPORT1_TCR1,
308 .end = SPORT1_MRCS3+4,
309 .flags = IORESOURCE_MEM,
310 },
311 {
312 .start = IRQ_SPORT1_RX,
313 .end = IRQ_SPORT1_RX+1,
314 .flags = IORESOURCE_IRQ,
315 },
316 {
317 .start = IRQ_SPORT1_ERROR,
318 .end = IRQ_SPORT1_ERROR,
319 .flags = IORESOURCE_IRQ,
320 },
321 };
322
323 static unsigned short bfin_sport1_peripherals[] = {
324 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
325 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
326 };
327
328 static struct platform_device bfin_sport1_uart_device = {
329 .name = "bfin-sport-uart",
330 .id = 1,
331 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
332 .resource = bfin_sport1_uart_resources,
333 .dev = {
334 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
335 },
336 };
337 #endif
338 #endif
339
340 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
341 #include <linux/input.h>
342 #include <linux/gpio_keys.h>
343
344 static struct gpio_keys_button bfin_gpio_keys_table[] = {
345 {BTN_0, GPIO_PF4, 0, "gpio-keys: BTN0"},
346 {BTN_1, GPIO_PF5, 0, "gpio-keys: BTN1"},
347 {BTN_2, GPIO_PF6, 0, "gpio-keys: BTN2"},
348 }; /* Mapped to the first three PF Test Points */
349
350 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
351 .buttons = bfin_gpio_keys_table,
352 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
353 };
354
355 static struct platform_device bfin_device_gpiokeys = {
356 .name = "gpio-keys",
357 .dev = {
358 .platform_data = &bfin_gpio_keys_data,
359 },
360 };
361 #endif
362
363 #if IS_ENABLED(CONFIG_I2C_GPIO)
364 #include <linux/i2c-gpio.h>
365
366 static struct gpiod_lookup_table bfin_i2c_gpiod_table = {
367 .dev_id = "i2c-gpio",
368 .table = {
369 GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF8, NULL, 0,
370 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
371 GPIO_LOOKUP_IDX("BFIN-GPIO", GPIO_PF9, NULL, 1,
372 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
373 },
374 };
375
376 static struct i2c_gpio_platform_data i2c_gpio_data = {
377 .udelay = 40,
378 }; /* This hasn't actually been used these pins
379 * are (currently) free pins on the expansion connector */
380
381 static struct platform_device i2c_gpio_device = {
382 .name = "i2c-gpio",
383 .id = 0,
384 .dev = {
385 .platform_data = &i2c_gpio_data,
386 },
387 };
388 #endif
389
390 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
391 };
392
393 static const unsigned int cclk_vlev_datasheet[] =
394 {
395 VRPAIR(VLEV_085, 250000000),
396 VRPAIR(VLEV_090, 376000000),
397 VRPAIR(VLEV_095, 426000000),
398 VRPAIR(VLEV_100, 426000000),
399 VRPAIR(VLEV_105, 476000000),
400 VRPAIR(VLEV_110, 476000000),
401 VRPAIR(VLEV_115, 476000000),
402 VRPAIR(VLEV_120, 600000000),
403 VRPAIR(VLEV_125, 600000000),
404 VRPAIR(VLEV_130, 600000000),
405 };
406
407 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
408 .tuple_tab = cclk_vlev_datasheet,
409 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
410 .vr_settling_time = 25 /* us */,
411 };
412
413 static struct platform_device bfin_dpmc = {
414 .name = "bfin dpmc",
415 .dev = {
416 .platform_data = &bfin_dmpc_vreg_data,
417 },
418 };
419
420 static struct platform_device *stamp_devices[] __initdata = {
421
422 &bfin_dpmc,
423
424 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
425 &rtc_device,
426 #endif
427
428 #if IS_ENABLED(CONFIG_SMC91X)
429 &smc91x_device,
430 #endif
431
432
433 #if IS_ENABLED(CONFIG_SPI_BFIN5XX)
434 &bfin_spi0_device,
435 #endif
436
437 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
438 #ifdef CONFIG_SERIAL_BFIN_UART0
439 &bfin_uart0_device,
440 #endif
441 #endif
442
443 #if IS_ENABLED(CONFIG_BFIN_SIR)
444 #ifdef CONFIG_BFIN_SIR0
445 &bfin_sir0_device,
446 #endif
447 #endif
448
449 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
450 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
451 &bfin_sport0_uart_device,
452 #endif
453 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
454 &bfin_sport1_uart_device,
455 #endif
456 #endif
457
458 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
459 &bfin_device_gpiokeys,
460 #endif
461
462 #if IS_ENABLED(CONFIG_I2C_GPIO)
463 &i2c_gpio_device,
464 #endif
465 };
466
467 static int __init blackstamp_init(void)
468 {
469 int ret;
470
471 printk(KERN_INFO "%s(): registering device resources\n", __func__);
472 #if IS_ENABLED(CONFIG_I2C_GPIO)
473 gpiod_add_lookup_table(&bfin_i2c_gpiod_table);
474 #endif
475 i2c_register_board_info(0, bfin_i2c_board_info,
476 ARRAY_SIZE(bfin_i2c_board_info));
477
478 ret = platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
479 if (ret < 0)
480 return ret;
481
482 #if IS_ENABLED(CONFIG_SMC91X)
483 /*
484 * setup BF533_STAMP CPLD to route AMS3 to Ethernet MAC.
485 * the bfin-async-map driver takes care of flipping between
486 * flash and ethernet when necessary.
487 */
488 ret = gpio_request(GPIO_PF0, "enet_cpld");
489 if (!ret) {
490 gpio_direction_output(GPIO_PF0, 1);
491 gpio_free(GPIO_PF0);
492 }
493 #endif
494
495 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
496 return 0;
497 }
498
499 arch_initcall(blackstamp_init);
500
501 static struct platform_device *stamp_early_devices[] __initdata = {
502 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
503 #ifdef CONFIG_SERIAL_BFIN_UART0
504 &bfin_uart0_device,
505 #endif
506 #endif
507
508 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
509 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
510 &bfin_sport0_uart_device,
511 #endif
512 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
513 &bfin_sport1_uart_device,
514 #endif
515 #endif
516 };
517
518 void __init native_machine_early_platform_add_devices(void)
519 {
520 printk(KERN_INFO "register early platform devices\n");
521 early_platform_add_devices(stamp_early_devices,
522 ARRAY_SIZE(stamp_early_devices));
523 }