arch/blackfin/mach-bf537/boards/pnav10.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/etherdevice.h>
  11 #include <linux/export.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/spi/flash.h>
  17 #include <linux/irq.h>
  18 #include <asm/dma.h>
  19 #include <asm/bfin5xx_spi.h>
  20 #include <asm/portmux.h>
  21
  22 #include <linux/spi/ad7877.h>
  23
  24 /*
  25  * Name the Board for the /proc/cpuinfo
  26  */
  27 const char bfin_board_name[] = "ADI PNAV-1.0";
  28
  29 /*
  30  *  Driver needs to know address, irq and flag pin.
  31  */
  32
  33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  34 static struct resource bfin_pcmcia_cf_resources[] = {
  35         {
  36                 .start = 0x20310000, /* IO PORT */
  37                 .end = 0x20312000,
  38                 .flags = IORESOURCE_MEM,
  39         }, {
  40                 .start = 0x20311000, /* Attribute Memory */
  41                 .end = 0x20311FFF,
  42                 .flags = IORESOURCE_MEM,
  43         }, {
  44                 .start = IRQ_PF4,
  45                 .end = IRQ_PF4,
  46                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  47         }, {
  48                 .start = 6, /* Card Detect PF6 */
  49                 .end = 6,
  50                 .flags = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device bfin_pcmcia_cf_device = {
  55         .name = "bfin_cf_pcmcia",
  56         .id = -1,
  57         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  58         .resource = bfin_pcmcia_cf_resources,
  59 };
  60 #endif
  61
  62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  63 static struct platform_device rtc_device = {
  64         .name = "rtc-bfin",
  65         .id   = -1,
  66 };
  67 #endif
  68
  69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  70 #include <linux/smc91x.h>
  71
  72 static struct smc91x_platdata smc91x_info = {
  73         .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  74         .leda = RPC_LED_100_10,
  75         .ledb = RPC_LED_TX_RX,
  76 };
  77
  78 static struct resource smc91x_resources[] = {
  79         {
  80                 .name = "smc91x-regs",
  81                 .start = 0x20300300,
  82                 .end = 0x20300300 + 16,
  83                 .flags = IORESOURCE_MEM,
  84         }, {
  85
  86                 .start = IRQ_PF7,
  87                 .end = IRQ_PF7,
  88                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  89         },
  90 };
  91 static struct platform_device smc91x_device = {
  92         .name = "smc91x",
  93         .id = 0,
  94         .num_resources = ARRAY_SIZE(smc91x_resources),
  95         .resource = smc91x_resources,
  96         .dev    = {
  97                 .platform_data  = &smc91x_info,
  98         },
  99 };
 100 #endif
 101
 102 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 103 #include <linux/bfin_mac.h>
 104 #include <linux/export.h>
 105 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 106
 107 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 108         {
 109                 .addr = 1,
 110                 .irq = IRQ_MAC_PHYINT,
 111         },
 112 };
 113
 114 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 115         .phydev_number = 1,
 116         .phydev_data = bfin_phydev_data,
 117         .phy_mode = PHY_INTERFACE_MODE_RMII,
 118         .mac_peripherals = bfin_mac_peripherals,
 119 };
 120
 121 static struct platform_device bfin_mii_bus = {
 122         .name = "bfin_mii_bus",
 123         .dev = {
 124                 .platform_data = &bfin_mii_bus_data,
 125         }
 126 };
 127
 128 static struct platform_device bfin_mac_device = {
 129         .name = "bfin_mac",
 130         .dev = {
 131                 .platform_data = &bfin_mii_bus,
 132         }
 133 };
 134 #endif
 135
 136 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 137 static struct resource net2272_bfin_resources[] = {
 138         {
 139                 .start = 0x20300000,
 140                 .end = 0x20300000 + 0x100,
 141                 .flags = IORESOURCE_MEM,
 142         }, {
 143                 .start = IRQ_PF7,
 144                 .end = IRQ_PF7,
 145                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 146         },
 147 };
 148
 149 static struct platform_device net2272_bfin_device = {
 150         .name = "net2272",
 151         .id = -1,
 152         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 153         .resource = net2272_bfin_resources,
 154 };
 155 #endif
 156
 157 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 158 /* all SPI peripherals info goes here */
 159
 160 #if defined(CONFIG_MTD_M25P80) \
 161         || defined(CONFIG_MTD_M25P80_MODULE)
 162 static struct mtd_partition bfin_spi_flash_partitions[] = {
 163         {
 164                 .name = "bootloader(spi)",
 165                 .size = 0x00020000,
 166                 .offset = 0,
 167                 .mask_flags = MTD_CAP_ROM
 168         }, {
 169                 .name = "linux kernel(spi)",
 170                 .size = 0xe0000,
 171                 .offset = 0x20000
 172         }, {
 173                 .name = "file system(spi)",
 174                 .size = 0x700000,
 175                 .offset = 0x00100000,
 176         }
 177 };
 178
 179 static struct flash_platform_data bfin_spi_flash_data = {
 180         .name = "m25p80",
 181         .parts = bfin_spi_flash_partitions,
 182         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 183         .type = "m25p64",
 184 };
 185
 186 /* SPI flash chip (m25p64) */
 187 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 188         .enable_dma = 0,         /* use dma transfer with this chip*/
 189 };
 190 #endif
 191
 192 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 193 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 194         .enable_dma = 0,
 195 };
 196 #endif
 197
 198 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 199 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 200         .model                  = 7877,
 201         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 202         .x_plate_ohms           = 419,
 203         .y_plate_ohms           = 486,
 204         .pressure_max           = 1000,
 205         .pressure_min           = 0,
 206         .stopacq_polarity       = 1,
 207         .first_conversion_delay = 3,
 208         .acquisition_time       = 1,
 209         .averaging              = 1,
 210         .pen_down_acc_interval  = 1,
 211 };
 212 #endif
 213
 214 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 215 #if defined(CONFIG_MTD_M25P80) \
 216         || defined(CONFIG_MTD_M25P80_MODULE)
 217         {
 218                 /* the modalias must be the same as spi device driver name */
 219                 .modalias = "m25p80", /* Name of spi_driver for this device */
 220                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 221                 .bus_num = 0, /* Framework bus number */
 222                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 223                 .platform_data = &bfin_spi_flash_data,
 224                 .controller_data = &spi_flash_chip_info,
 225                 .mode = SPI_MODE_3,
 226         },
 227 #endif
 228
 229 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
 230         || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 231         {
 232                 .modalias = "ad183x",
 233                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 234                 .bus_num = 0,
 235                 .chip_select = 4,
 236         },
 237 #endif
 238 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 239         {
 240                 .modalias = "mmc_spi",
 241                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 242                 .bus_num = 0,
 243                 .chip_select = 5,
 244                 .controller_data = &mmc_spi_chip_info,
 245                 .mode = SPI_MODE_3,
 246         },
 247 #endif
 248 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 249 {
 250         .modalias               = "ad7877",
 251         .platform_data          = &bfin_ad7877_ts_info,
 252         .irq                    = IRQ_PF2,
 253         .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 254         .bus_num                = 0,
 255         .chip_select            = 5,
 256 },
 257 #endif
 258
 259 };
 260
 261 /* SPI (0) */
 262 static struct resource bfin_spi0_resource[] = {
 263         [0] = {
 264                 .start = SPI0_REGBASE,
 265                 .end   = SPI0_REGBASE + 0xFF,
 266                 .flags = IORESOURCE_MEM,
 267                 },
 268         [1] = {
 269                 .start = CH_SPI,
 270                 .end   = CH_SPI,
 271                 .flags = IORESOURCE_DMA,
 272         },
 273         [2] = {
 274                 .start = IRQ_SPI,
 275                 .end   = IRQ_SPI,
 276                 .flags = IORESOURCE_IRQ,
 277         },
 278 };
 279
 280 /* SPI controller data */
 281 static struct bfin5xx_spi_master bfin_spi0_info = {
 282         .num_chipselect = 8,
 283         .enable_dma = 1,  /* master has the ability to do dma transfer */
 284         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 285 };
 286
 287 static struct platform_device bfin_spi0_device = {
 288         .name = "bfin-spi",
 289         .id = 0, /* Bus number */
 290         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 291         .resource = bfin_spi0_resource,
 292         .dev = {
 293                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 294         },
 295 };
 296 #endif  /* spi master and devices */
 297
 298 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 299 static struct platform_device bfin_fb_device = {
 300         .name = "bf537-lq035",
 301 };
 302 #endif
 303
 304 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 305 #ifdef CONFIG_SERIAL_BFIN_UART0
 306 static struct resource bfin_uart0_resources[] = {
 307         {
 308                 .start = UART0_THR,
 309                 .end = UART0_GCTL+2,
 310                 .flags = IORESOURCE_MEM,
 311         },
 312         {
 313                 .start = IRQ_UART0_TX,
 314                 .end = IRQ_UART0_TX,
 315                 .flags = IORESOURCE_IRQ,
 316         },
 317         {
 318                 .start = IRQ_UART0_RX,
 319                 .end = IRQ_UART0_RX,
 320                 .flags = IORESOURCE_IRQ,
 321         },
 322         {
 323                 .start = IRQ_UART0_ERROR,
 324                 .end = IRQ_UART0_ERROR,
 325                 .flags = IORESOURCE_IRQ,
 326         },
 327         {
 328                 .start = CH_UART0_TX,
 329                 .end = CH_UART0_TX,
 330                 .flags = IORESOURCE_DMA,
 331         },
 332         {
 333                 .start = CH_UART0_RX,
 334                 .end = CH_UART0_RX,
 335                 .flags = IORESOURCE_DMA,
 336         },
 337 };
 338
 339 static unsigned short bfin_uart0_peripherals[] = {
 340         P_UART0_TX, P_UART0_RX, 0
 341 };
 342
 343 static struct platform_device bfin_uart0_device = {
 344         .name = "bfin-uart",
 345         .id = 0,
 346         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 347         .resource = bfin_uart0_resources,
 348         .dev = {
 349                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 350         },
 351 };
 352 #endif
 353 #ifdef CONFIG_SERIAL_BFIN_UART1
 354 static struct resource bfin_uart1_resources[] = {
 355         {
 356                 .start = UART1_THR,
 357                 .end = UART1_GCTL+2,
 358                 .flags = IORESOURCE_MEM,
 359         },
 360         {
 361                 .start = IRQ_UART1_TX,
 362                 .end = IRQ_UART1_TX,
 363                 .flags = IORESOURCE_IRQ,
 364         },
 365         {
 366                 .start = IRQ_UART1_RX,
 367                 .end = IRQ_UART1_RX,
 368                 .flags = IORESOURCE_IRQ,
 369         },
 370         {
 371                 .start = IRQ_UART1_ERROR,
 372                 .end = IRQ_UART1_ERROR,
 373                 .flags = IORESOURCE_IRQ,
 374         },
 375         {
 376                 .start = CH_UART1_TX,
 377                 .end = CH_UART1_TX,
 378                 .flags = IORESOURCE_DMA,
 379         },
 380         {
 381                 .start = CH_UART1_RX,
 382                 .end = CH_UART1_RX,
 383                 .flags = IORESOURCE_DMA,
 384         },
 385 };
 386
 387 static unsigned short bfin_uart1_peripherals[] = {
 388         P_UART1_TX, P_UART1_RX, 0
 389 };
 390
 391 static struct platform_device bfin_uart1_device = {
 392         .name = "bfin-uart",
 393         .id = 1,
 394         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 395         .resource = bfin_uart1_resources,
 396         .dev = {
 397                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 398         },
 399 };
 400 #endif
 401 #endif
 402
 403 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 404 #ifdef CONFIG_BFIN_SIR0
 405 static struct resource bfin_sir0_resources[] = {
 406         {
 407                 .start = 0xFFC00400,
 408                 .end = 0xFFC004FF,
 409                 .flags = IORESOURCE_MEM,
 410         },
 411         {
 412                 .start = IRQ_UART0_RX,
 413                 .end = IRQ_UART0_RX+1,
 414                 .flags = IORESOURCE_IRQ,
 415         },
 416         {
 417                 .start = CH_UART0_RX,
 418                 .end = CH_UART0_RX+1,
 419                 .flags = IORESOURCE_DMA,
 420         },
 421 };
 422
 423 static struct platform_device bfin_sir0_device = {
 424         .name = "bfin_sir",
 425         .id = 0,
 426         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 427         .resource = bfin_sir0_resources,
 428 };
 429 #endif
 430 #ifdef CONFIG_BFIN_SIR1
 431 static struct resource bfin_sir1_resources[] = {
 432         {
 433                 .start = 0xFFC02000,
 434                 .end = 0xFFC020FF,
 435                 .flags = IORESOURCE_MEM,
 436         },
 437         {
 438                 .start = IRQ_UART1_RX,
 439                 .end = IRQ_UART1_RX+1,
 440                 .flags = IORESOURCE_IRQ,
 441         },
 442         {
 443                 .start = CH_UART1_RX,
 444                 .end = CH_UART1_RX+1,
 445                 .flags = IORESOURCE_DMA,
 446         },
 447 };
 448
 449 static struct platform_device bfin_sir1_device = {
 450         .name = "bfin_sir",
 451         .id = 1,
 452         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 453         .resource = bfin_sir1_resources,
 454 };
 455 #endif
 456 #endif
 457
 458 static struct platform_device *stamp_devices[] __initdata = {
 459 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 460         &bfin_pcmcia_cf_device,
 461 #endif
 462
 463 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 464         &rtc_device,
 465 #endif
 466
 467 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 468         &smc91x_device,
 469 #endif
 470
 471 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 472         &bfin_mii_bus,
 473         &bfin_mac_device,
 474 #endif
 475
 476 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 477         &net2272_bfin_device,
 478 #endif
 479
 480 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 481         &bfin_spi0_device,
 482 #endif
 483
 484 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 485         &bfin_fb_device,
 486 #endif
 487
 488 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 489 #ifdef CONFIG_SERIAL_BFIN_UART0
 490         &bfin_uart0_device,
 491 #endif
 492 #ifdef CONFIG_SERIAL_BFIN_UART1
 493         &bfin_uart1_device,
 494 #endif
 495 #endif
 496
 497 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 498 #ifdef CONFIG_BFIN_SIR0
 499         &bfin_sir0_device,
 500 #endif
 501 #ifdef CONFIG_BFIN_SIR1
 502         &bfin_sir1_device,
 503 #endif
 504 #endif
 505 };
 506
 507 static int __init pnav_init(void)
 508 {
 509         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 510         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 511 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 512         spi_register_board_info(bfin_spi_board_info,
 513                                 ARRAY_SIZE(bfin_spi_board_info));
 514 #endif
 515         return 0;
 516 }
 517
 518 arch_initcall(pnav_init);
 519
 520 static struct platform_device *stamp_early_devices[] __initdata = {
 521 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 522 #ifdef CONFIG_SERIAL_BFIN_UART0
 523         &bfin_uart0_device,
 524 #endif
 525 #ifdef CONFIG_SERIAL_BFIN_UART1
 526         &bfin_uart1_device,
 527 #endif
 528 #endif
 529 };
 530
 531 void __init native_machine_early_platform_add_devices(void)
 532 {
 533         printk(KERN_INFO "register early platform devices\n");
 534         early_platform_add_devices(stamp_early_devices,
 535                 ARRAY_SIZE(stamp_early_devices));
 536 }
 537
 538 int bfin_get_ether_addr(char *addr)
 539 {
 540         return 1;
 541 }
 542 EXPORT_SYMBOL(bfin_get_ether_addr);