2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <linux/pinctrl/machine.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/platform_data/pinctrl-adi2.h>
23 #include <asm/bfin5xx_spi.h>
28 #include <asm/bfin_sport.h>
29 #include <asm/portmux.h>
30 #include <asm/bfin_sdh.h>
31 #include <mach/bf54x_keys.h>
32 #include <linux/input.h>
33 #include <linux/spi/ad7877.h>
36 * Name the Board for the /proc/cpuinfo
38 const char bfin_board_name
[] = "ADI BF548-EZKIT";
41 * Driver needs to know address, irq and flag pin.
44 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
45 #include <linux/usb/isp1760.h>
46 static struct resource bfin_isp1760_resources
[] = {
49 .end
= 0x2C0C0000 + 0xfffff,
50 .flags
= IORESOURCE_MEM
,
55 .flags
= IORESOURCE_IRQ
,
59 static struct isp1760_platform_data isp1760_priv
= {
64 .dack_polarity_high
= 0,
65 .dreq_polarity_high
= 0,
68 static struct platform_device bfin_isp1760_device
= {
72 .platform_data
= &isp1760_priv
,
74 .num_resources
= ARRAY_SIZE(bfin_isp1760_resources
),
75 .resource
= bfin_isp1760_resources
,
79 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
81 #include <mach/bf54x-lq043.h>
83 static struct bfin_bf54xfb_mach_info bf54x_lq043_data
= {
86 .xres
= {480, 480, 480},
87 .yres
= {272, 272, 272},
92 static struct resource bf54x_lq043_resources
[] = {
94 .start
= IRQ_EPPI0_ERR
,
96 .flags
= IORESOURCE_IRQ
,
100 static struct platform_device bf54x_lq043_device
= {
101 .name
= "bf54x-lq043",
103 .num_resources
= ARRAY_SIZE(bf54x_lq043_resources
),
104 .resource
= bf54x_lq043_resources
,
106 .platform_data
= &bf54x_lq043_data
,
111 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
112 static const unsigned int bf548_keymap
[] = {
113 KEYVAL(0, 0, KEY_ENTER
),
114 KEYVAL(0, 1, KEY_HELP
),
116 KEYVAL(0, 3, KEY_BACKSPACE
),
117 KEYVAL(1, 0, KEY_TAB
),
121 KEYVAL(2, 0, KEY_DOWN
),
125 KEYVAL(3, 0, KEY_UP
),
131 static struct bfin_kpad_platform_data bf54x_kpad_data
= {
134 .keymap
= bf548_keymap
,
135 .keymapsize
= ARRAY_SIZE(bf548_keymap
),
137 .debounce_time
= 5000, /* ns (5ms) */
138 .coldrive_time
= 1000, /* ns (1ms) */
139 .keyup_test_interval
= 50, /* ms (50ms) */
142 static struct resource bf54x_kpad_resources
[] = {
146 .flags
= IORESOURCE_IRQ
,
150 static struct platform_device bf54x_kpad_device
= {
151 .name
= "bf54x-keys",
153 .num_resources
= ARRAY_SIZE(bf54x_kpad_resources
),
154 .resource
= bf54x_kpad_resources
,
156 .platform_data
= &bf54x_kpad_data
,
161 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
162 #include <asm/bfin_rotary.h>
164 static struct bfin_rotary_platform_data bfin_rotary_data
= {
165 /*.rotary_up_key = KEY_UP,*/
166 /*.rotary_down_key = KEY_DOWN,*/
167 .rotary_rel_code
= REL_WHEEL
,
168 .rotary_button_key
= KEY_ENTER
,
169 .debounce
= 10, /* 0..17 */
170 .mode
= ROT_QUAD_ENC
| ROT_DEBE
,
174 static struct resource bfin_rotary_resources
[] = {
178 .flags
= IORESOURCE_IRQ
,
182 static struct platform_device bfin_rotary_device
= {
183 .name
= "bfin-rotary",
185 .num_resources
= ARRAY_SIZE(bfin_rotary_resources
),
186 .resource
= bfin_rotary_resources
,
188 .platform_data
= &bfin_rotary_data
,
193 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
194 #include <linux/input/adxl34x.h>
195 static const struct adxl34x_platform_data adxl34x_info
= {
199 .tap_threshold
= 0x31,
200 .tap_duration
= 0x10,
203 .tap_axis_control
= ADXL_TAP_X_EN
| ADXL_TAP_Y_EN
| ADXL_TAP_Z_EN
,
204 .act_axis_control
= 0xFF,
205 .activity_threshold
= 5,
206 .inactivity_threshold
= 3,
207 .inactivity_time
= 4,
208 .free_fall_threshold
= 0x7,
209 .free_fall_time
= 0x20,
211 .data_range
= ADXL_FULL_RES
,
214 .ev_code_x
= ABS_X
, /* EV_REL */
215 .ev_code_y
= ABS_Y
, /* EV_REL */
216 .ev_code_z
= ABS_Z
, /* EV_REL */
218 .ev_code_tap
= {BTN_TOUCH
, BTN_TOUCH
, BTN_TOUCH
}, /* EV_KEY x,y,z */
220 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
221 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
222 .power_mode
= ADXL_AUTO_SLEEP
| ADXL_LINK
,
223 .fifo_mode
= ADXL_FIFO_STREAM
,
224 .orientation_enable
= ADXL_EN_ORIENTATION_3D
,
225 .deadzone_angle
= ADXL_DEADZONE_ANGLE_10p8
,
226 .divisor_length
= ADXL_LP_FILTER_DIVISOR_16
,
227 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
228 .ev_codes_orient_3d
= {BTN_Z
, BTN_Y
, BTN_X
, BTN_A
, BTN_B
, BTN_C
},
232 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
233 static struct platform_device rtc_device
= {
239 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
240 #ifdef CONFIG_SERIAL_BFIN_UART0
241 static struct resource bfin_uart0_resources
[] = {
245 .flags
= IORESOURCE_MEM
,
247 #ifdef CONFIG_EARLY_PRINTK
251 .flags
= IORESOURCE_REG
,
255 .start
= IRQ_UART0_TX
,
257 .flags
= IORESOURCE_IRQ
,
260 .start
= IRQ_UART0_RX
,
262 .flags
= IORESOURCE_IRQ
,
265 .start
= IRQ_UART0_ERROR
,
266 .end
= IRQ_UART0_ERROR
,
267 .flags
= IORESOURCE_IRQ
,
270 .start
= CH_UART0_TX
,
272 .flags
= IORESOURCE_DMA
,
275 .start
= CH_UART0_RX
,
277 .flags
= IORESOURCE_DMA
,
281 static unsigned short bfin_uart0_peripherals
[] = {
282 P_UART0_TX
, P_UART0_RX
, 0
285 static struct platform_device bfin_uart0_device
= {
288 .num_resources
= ARRAY_SIZE(bfin_uart0_resources
),
289 .resource
= bfin_uart0_resources
,
291 .platform_data
= &bfin_uart0_peripherals
, /* Passed to driver */
295 #ifdef CONFIG_SERIAL_BFIN_UART1
296 static struct resource bfin_uart1_resources
[] = {
300 .flags
= IORESOURCE_MEM
,
302 #ifdef CONFIG_EARLY_PRINTK
306 .flags
= IORESOURCE_REG
,
310 .start
= IRQ_UART1_TX
,
312 .flags
= IORESOURCE_IRQ
,
315 .start
= IRQ_UART1_RX
,
317 .flags
= IORESOURCE_IRQ
,
320 .start
= IRQ_UART1_ERROR
,
321 .end
= IRQ_UART1_ERROR
,
322 .flags
= IORESOURCE_IRQ
,
325 .start
= CH_UART1_TX
,
327 .flags
= IORESOURCE_DMA
,
330 .start
= CH_UART1_RX
,
332 .flags
= IORESOURCE_DMA
,
334 #ifdef CONFIG_BFIN_UART1_CTSRTS
335 { /* CTS pin -- 0 means not supported */
338 .flags
= IORESOURCE_IO
,
340 { /* RTS pin -- 0 means not supported */
343 .flags
= IORESOURCE_IO
,
348 static unsigned short bfin_uart1_peripherals
[] = {
349 P_UART1_TX
, P_UART1_RX
,
350 #ifdef CONFIG_BFIN_UART1_CTSRTS
351 P_UART1_RTS
, P_UART1_CTS
,
356 static struct platform_device bfin_uart1_device
= {
359 .num_resources
= ARRAY_SIZE(bfin_uart1_resources
),
360 .resource
= bfin_uart1_resources
,
362 .platform_data
= &bfin_uart1_peripherals
, /* Passed to driver */
366 #ifdef CONFIG_SERIAL_BFIN_UART2
367 static struct resource bfin_uart2_resources
[] = {
371 .flags
= IORESOURCE_MEM
,
373 #ifdef CONFIG_EARLY_PRINTK
377 .flags
= IORESOURCE_REG
,
381 .start
= IRQ_UART2_TX
,
383 .flags
= IORESOURCE_IRQ
,
386 .start
= IRQ_UART2_RX
,
388 .flags
= IORESOURCE_IRQ
,
391 .start
= IRQ_UART2_ERROR
,
392 .end
= IRQ_UART2_ERROR
,
393 .flags
= IORESOURCE_IRQ
,
396 .start
= CH_UART2_TX
,
398 .flags
= IORESOURCE_DMA
,
401 .start
= CH_UART2_RX
,
403 .flags
= IORESOURCE_DMA
,
407 static unsigned short bfin_uart2_peripherals
[] = {
408 P_UART2_TX
, P_UART2_RX
, 0
411 static struct platform_device bfin_uart2_device
= {
414 .num_resources
= ARRAY_SIZE(bfin_uart2_resources
),
415 .resource
= bfin_uart2_resources
,
417 .platform_data
= &bfin_uart2_peripherals
, /* Passed to driver */
421 #ifdef CONFIG_SERIAL_BFIN_UART3
422 static struct resource bfin_uart3_resources
[] = {
426 .flags
= IORESOURCE_MEM
,
428 #ifdef CONFIG_EARLY_PRINTK
432 .flags
= IORESOURCE_REG
,
436 .start
= IRQ_UART3_TX
,
438 .flags
= IORESOURCE_IRQ
,
441 .start
= IRQ_UART3_RX
,
443 .flags
= IORESOURCE_IRQ
,
446 .start
= IRQ_UART3_ERROR
,
447 .end
= IRQ_UART3_ERROR
,
448 .flags
= IORESOURCE_IRQ
,
451 .start
= CH_UART3_TX
,
453 .flags
= IORESOURCE_DMA
,
456 .start
= CH_UART3_RX
,
458 .flags
= IORESOURCE_DMA
,
460 #ifdef CONFIG_BFIN_UART3_CTSRTS
461 { /* CTS pin -- 0 means not supported */
464 .flags
= IORESOURCE_IO
,
466 { /* RTS pin -- 0 means not supported */
469 .flags
= IORESOURCE_IO
,
474 static unsigned short bfin_uart3_peripherals
[] = {
475 P_UART3_TX
, P_UART3_RX
,
476 #ifdef CONFIG_BFIN_UART3_CTSRTS
477 P_UART3_RTS
, P_UART3_CTS
,
482 static struct platform_device bfin_uart3_device
= {
485 .num_resources
= ARRAY_SIZE(bfin_uart3_resources
),
486 .resource
= bfin_uart3_resources
,
488 .platform_data
= &bfin_uart3_peripherals
, /* Passed to driver */
494 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
495 #ifdef CONFIG_BFIN_SIR0
496 static struct resource bfin_sir0_resources
[] = {
500 .flags
= IORESOURCE_MEM
,
503 .start
= IRQ_UART0_RX
,
504 .end
= IRQ_UART0_RX
+1,
505 .flags
= IORESOURCE_IRQ
,
508 .start
= CH_UART0_RX
,
509 .end
= CH_UART0_RX
+1,
510 .flags
= IORESOURCE_DMA
,
513 static struct platform_device bfin_sir0_device
= {
516 .num_resources
= ARRAY_SIZE(bfin_sir0_resources
),
517 .resource
= bfin_sir0_resources
,
520 #ifdef CONFIG_BFIN_SIR1
521 static struct resource bfin_sir1_resources
[] = {
525 .flags
= IORESOURCE_MEM
,
528 .start
= IRQ_UART1_RX
,
529 .end
= IRQ_UART1_RX
+1,
530 .flags
= IORESOURCE_IRQ
,
533 .start
= CH_UART1_RX
,
534 .end
= CH_UART1_RX
+1,
535 .flags
= IORESOURCE_DMA
,
538 static struct platform_device bfin_sir1_device
= {
541 .num_resources
= ARRAY_SIZE(bfin_sir1_resources
),
542 .resource
= bfin_sir1_resources
,
545 #ifdef CONFIG_BFIN_SIR2
546 static struct resource bfin_sir2_resources
[] = {
550 .flags
= IORESOURCE_MEM
,
553 .start
= IRQ_UART2_RX
,
554 .end
= IRQ_UART2_RX
+1,
555 .flags
= IORESOURCE_IRQ
,
558 .start
= CH_UART2_RX
,
559 .end
= CH_UART2_RX
+1,
560 .flags
= IORESOURCE_DMA
,
563 static struct platform_device bfin_sir2_device
= {
566 .num_resources
= ARRAY_SIZE(bfin_sir2_resources
),
567 .resource
= bfin_sir2_resources
,
570 #ifdef CONFIG_BFIN_SIR3
571 static struct resource bfin_sir3_resources
[] = {
575 .flags
= IORESOURCE_MEM
,
578 .start
= IRQ_UART3_RX
,
579 .end
= IRQ_UART3_RX
+1,
580 .flags
= IORESOURCE_IRQ
,
583 .start
= CH_UART3_RX
,
584 .end
= CH_UART3_RX
+1,
585 .flags
= IORESOURCE_DMA
,
588 static struct platform_device bfin_sir3_device
= {
591 .num_resources
= ARRAY_SIZE(bfin_sir3_resources
),
592 .resource
= bfin_sir3_resources
,
597 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
598 #include <linux/smsc911x.h>
600 static struct resource smsc911x_resources
[] = {
602 .name
= "smsc911x-memory",
604 .end
= 0x24000000 + 0xFF,
605 .flags
= IORESOURCE_MEM
,
610 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_LOWLEVEL
,
614 static struct smsc911x_platform_config smsc911x_config
= {
615 .flags
= SMSC911X_USE_32BIT
,
616 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_LOW
,
617 .irq_type
= SMSC911X_IRQ_TYPE_OPEN_DRAIN
,
618 .phy_interface
= PHY_INTERFACE_MODE_MII
,
621 static struct platform_device smsc911x_device
= {
624 .num_resources
= ARRAY_SIZE(smsc911x_resources
),
625 .resource
= smsc911x_resources
,
627 .platform_data
= &smsc911x_config
,
632 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
633 static struct resource musb_resources
[] = {
637 .flags
= IORESOURCE_MEM
,
639 [1] = { /* general IRQ */
640 .start
= IRQ_USB_INT0
,
642 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
,
645 [2] = { /* DMA IRQ */
646 .start
= IRQ_USB_DMA
,
648 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
,
653 static struct musb_hdrc_config musb_config
= {
660 .gpio_vrsel
= GPIO_PE7
,
661 /* Some custom boards need to be active low, just set it to "0"
664 .gpio_vrsel_active
= 1,
665 .clkin
= 24, /* musb CLKIN in MHZ */
668 static struct musb_hdrc_platform_data musb_plat
= {
669 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
671 #elif defined(CONFIG_USB_MUSB_HDRC)
673 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
674 .mode
= MUSB_PERIPHERAL
,
676 .config
= &musb_config
,
679 static u64 musb_dmamask
= ~(u32
)0;
681 static struct platform_device musb_device
= {
682 .name
= "musb-blackfin",
685 .dma_mask
= &musb_dmamask
,
686 .coherent_dma_mask
= 0xffffffff,
687 .platform_data
= &musb_plat
,
689 .num_resources
= ARRAY_SIZE(musb_resources
),
690 .resource
= musb_resources
,
694 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
695 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
696 static struct resource bfin_sport0_uart_resources
[] = {
698 .start
= SPORT0_TCR1
,
699 .end
= SPORT0_MRCS3
+4,
700 .flags
= IORESOURCE_MEM
,
703 .start
= IRQ_SPORT0_RX
,
704 .end
= IRQ_SPORT0_RX
+1,
705 .flags
= IORESOURCE_IRQ
,
708 .start
= IRQ_SPORT0_ERROR
,
709 .end
= IRQ_SPORT0_ERROR
,
710 .flags
= IORESOURCE_IRQ
,
714 static unsigned short bfin_sport0_peripherals
[] = {
715 P_SPORT0_TFS
, P_SPORT0_DTPRI
, P_SPORT0_TSCLK
, P_SPORT0_RFS
,
716 P_SPORT0_DRPRI
, P_SPORT0_RSCLK
, 0
719 static struct platform_device bfin_sport0_uart_device
= {
720 .name
= "bfin-sport-uart",
722 .num_resources
= ARRAY_SIZE(bfin_sport0_uart_resources
),
723 .resource
= bfin_sport0_uart_resources
,
725 .platform_data
= &bfin_sport0_peripherals
, /* Passed to driver */
729 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
730 static struct resource bfin_sport1_uart_resources
[] = {
732 .start
= SPORT1_TCR1
,
733 .end
= SPORT1_MRCS3
+4,
734 .flags
= IORESOURCE_MEM
,
737 .start
= IRQ_SPORT1_RX
,
738 .end
= IRQ_SPORT1_RX
+1,
739 .flags
= IORESOURCE_IRQ
,
742 .start
= IRQ_SPORT1_ERROR
,
743 .end
= IRQ_SPORT1_ERROR
,
744 .flags
= IORESOURCE_IRQ
,
748 static unsigned short bfin_sport1_peripherals
[] = {
749 P_SPORT1_TFS
, P_SPORT1_DTPRI
, P_SPORT1_TSCLK
, P_SPORT1_RFS
,
750 P_SPORT1_DRPRI
, P_SPORT1_RSCLK
, 0
753 static struct platform_device bfin_sport1_uart_device
= {
754 .name
= "bfin-sport-uart",
756 .num_resources
= ARRAY_SIZE(bfin_sport1_uart_resources
),
757 .resource
= bfin_sport1_uart_resources
,
759 .platform_data
= &bfin_sport1_peripherals
, /* Passed to driver */
763 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
764 static struct resource bfin_sport2_uart_resources
[] = {
766 .start
= SPORT2_TCR1
,
767 .end
= SPORT2_MRCS3
+4,
768 .flags
= IORESOURCE_MEM
,
771 .start
= IRQ_SPORT2_RX
,
772 .end
= IRQ_SPORT2_RX
+1,
773 .flags
= IORESOURCE_IRQ
,
776 .start
= IRQ_SPORT2_ERROR
,
777 .end
= IRQ_SPORT2_ERROR
,
778 .flags
= IORESOURCE_IRQ
,
782 static unsigned short bfin_sport2_peripherals
[] = {
783 P_SPORT2_TFS
, P_SPORT2_DTPRI
, P_SPORT2_TSCLK
, P_SPORT2_RFS
,
784 P_SPORT2_DRPRI
, P_SPORT2_RSCLK
, P_SPORT2_DRSEC
, P_SPORT2_DTSEC
, 0
787 static struct platform_device bfin_sport2_uart_device
= {
788 .name
= "bfin-sport-uart",
790 .num_resources
= ARRAY_SIZE(bfin_sport2_uart_resources
),
791 .resource
= bfin_sport2_uart_resources
,
793 .platform_data
= &bfin_sport2_peripherals
, /* Passed to driver */
797 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
798 static struct resource bfin_sport3_uart_resources
[] = {
800 .start
= SPORT3_TCR1
,
801 .end
= SPORT3_MRCS3
+4,
802 .flags
= IORESOURCE_MEM
,
805 .start
= IRQ_SPORT3_RX
,
806 .end
= IRQ_SPORT3_RX
+1,
807 .flags
= IORESOURCE_IRQ
,
810 .start
= IRQ_SPORT3_ERROR
,
811 .end
= IRQ_SPORT3_ERROR
,
812 .flags
= IORESOURCE_IRQ
,
816 static unsigned short bfin_sport3_peripherals
[] = {
817 P_SPORT3_TFS
, P_SPORT3_DTPRI
, P_SPORT3_TSCLK
, P_SPORT3_RFS
,
818 P_SPORT3_DRPRI
, P_SPORT3_RSCLK
, P_SPORT3_DRSEC
, P_SPORT3_DTSEC
, 0
821 static struct platform_device bfin_sport3_uart_device
= {
822 .name
= "bfin-sport-uart",
824 .num_resources
= ARRAY_SIZE(bfin_sport3_uart_resources
),
825 .resource
= bfin_sport3_uart_resources
,
827 .platform_data
= &bfin_sport3_peripherals
, /* Passed to driver */
833 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
835 static unsigned short bfin_can0_peripherals
[] = {
836 P_CAN0_RX
, P_CAN0_TX
, 0
839 static struct resource bfin_can0_resources
[] = {
843 .flags
= IORESOURCE_MEM
,
846 .start
= IRQ_CAN0_RX
,
848 .flags
= IORESOURCE_IRQ
,
851 .start
= IRQ_CAN0_TX
,
853 .flags
= IORESOURCE_IRQ
,
856 .start
= IRQ_CAN0_ERROR
,
857 .end
= IRQ_CAN0_ERROR
,
858 .flags
= IORESOURCE_IRQ
,
862 static struct platform_device bfin_can0_device
= {
865 .num_resources
= ARRAY_SIZE(bfin_can0_resources
),
866 .resource
= bfin_can0_resources
,
868 .platform_data
= &bfin_can0_peripherals
, /* Passed to driver */
872 static unsigned short bfin_can1_peripherals
[] = {
873 P_CAN1_RX
, P_CAN1_TX
, 0
876 static struct resource bfin_can1_resources
[] = {
880 .flags
= IORESOURCE_MEM
,
883 .start
= IRQ_CAN1_RX
,
885 .flags
= IORESOURCE_IRQ
,
888 .start
= IRQ_CAN1_TX
,
890 .flags
= IORESOURCE_IRQ
,
893 .start
= IRQ_CAN1_ERROR
,
894 .end
= IRQ_CAN1_ERROR
,
895 .flags
= IORESOURCE_IRQ
,
899 static struct platform_device bfin_can1_device
= {
902 .num_resources
= ARRAY_SIZE(bfin_can1_resources
),
903 .resource
= bfin_can1_resources
,
905 .platform_data
= &bfin_can1_peripherals
, /* Passed to driver */
911 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
912 static struct resource bfin_atapi_resources
[] = {
916 .flags
= IORESOURCE_MEM
,
919 .start
= IRQ_ATAPI_ERR
,
920 .end
= IRQ_ATAPI_ERR
,
921 .flags
= IORESOURCE_IRQ
,
925 static struct platform_device bfin_atapi_device
= {
926 .name
= "pata-bf54x",
928 .num_resources
= ARRAY_SIZE(bfin_atapi_resources
),
929 .resource
= bfin_atapi_resources
,
933 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
934 static struct mtd_partition partition_info
[] = {
936 .name
= "bootloader(nand)",
940 .name
= "linux kernel(nand)",
941 .offset
= MTDPART_OFS_APPEND
,
942 .size
= 4 * 1024 * 1024,
945 .name
= "file system(nand)",
946 .offset
= MTDPART_OFS_APPEND
,
947 .size
= MTDPART_SIZ_FULL
,
951 static struct bf5xx_nand_platform bf5xx_nand_platform
= {
952 .data_width
= NFC_NWIDTH_8
,
953 .partitions
= partition_info
,
954 .nr_partitions
= ARRAY_SIZE(partition_info
),
959 static struct resource bf5xx_nand_resources
[] = {
963 .flags
= IORESOURCE_MEM
,
968 .flags
= IORESOURCE_IRQ
,
972 static struct platform_device bf5xx_nand_device
= {
973 .name
= "bf5xx-nand",
975 .num_resources
= ARRAY_SIZE(bf5xx_nand_resources
),
976 .resource
= bf5xx_nand_resources
,
978 .platform_data
= &bf5xx_nand_platform
,
983 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
985 static struct bfin_sd_host bfin_sdh_data
= {
987 .irq_int0
= IRQ_SDH_MASK0
,
988 .pin_req
= {P_SD_D0
, P_SD_D1
, P_SD_D2
, P_SD_D3
, P_SD_CLK
, P_SD_CMD
, 0},
991 static struct platform_device bf54x_sdh_device
= {
995 .platform_data
= &bfin_sdh_data
,
1000 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1001 static struct mtd_partition ezkit_partitions
[] = {
1003 .name
= "bootloader(nor)",
1007 .name
= "linux kernel(nor)",
1009 .offset
= MTDPART_OFS_APPEND
,
1011 .name
= "file system(nor)",
1012 .size
= 0x1000000 - 0x80000 - 0x400000 - 0x8000 * 4,
1013 .offset
= MTDPART_OFS_APPEND
,
1015 .name
= "config(nor)",
1017 .offset
= MTDPART_OFS_APPEND
,
1019 .name
= "u-boot env(nor)",
1021 .offset
= MTDPART_OFS_APPEND
,
1025 static struct physmap_flash_data ezkit_flash_data
= {
1027 .parts
= ezkit_partitions
,
1028 .nr_parts
= ARRAY_SIZE(ezkit_partitions
),
1031 static struct resource ezkit_flash_resource
= {
1032 .start
= 0x20000000,
1034 .flags
= IORESOURCE_MEM
,
1037 static struct platform_device ezkit_flash_device
= {
1038 .name
= "physmap-flash",
1041 .platform_data
= &ezkit_flash_data
,
1044 .resource
= &ezkit_flash_resource
,
1048 #if defined(CONFIG_MTD_M25P80) \
1049 || defined(CONFIG_MTD_M25P80_MODULE)
1050 /* SPI flash chip (m25p16) */
1051 static struct mtd_partition bfin_spi_flash_partitions
[] = {
1053 .name
= "bootloader(spi)",
1056 .mask_flags
= MTD_CAP_ROM
1058 .name
= "linux kernel(spi)",
1059 .size
= MTDPART_SIZ_FULL
,
1060 .offset
= MTDPART_OFS_APPEND
,
1064 static struct flash_platform_data bfin_spi_flash_data
= {
1066 .parts
= bfin_spi_flash_partitions
,
1067 .nr_parts
= ARRAY_SIZE(bfin_spi_flash_partitions
),
1071 static struct bfin5xx_spi_chip spi_flash_chip_info
= {
1072 .enable_dma
= 0, /* use dma transfer with this chip*/
1076 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1077 static const struct ad7877_platform_data bfin_ad7877_ts_info
= {
1079 .vref_delay_usecs
= 50, /* internal, no capacitor */
1080 .x_plate_ohms
= 419,
1081 .y_plate_ohms
= 486,
1082 .pressure_max
= 1000,
1084 .stopacq_polarity
= 1,
1085 .first_conversion_delay
= 3,
1086 .acquisition_time
= 1,
1088 .pen_down_acc_interval
= 1,
1092 #ifdef CONFIG_PINCTRL_ADI2
1094 # define ADI_PINT_DEVNAME "adi-gpio-pint"
1095 # define ADI_GPIO_DEVNAME "adi-gpio"
1096 # define ADI_PINCTRL_DEVNAME "pinctrl-adi2"
1098 static struct platform_device bfin_pinctrl_device
= {
1099 .name
= ADI_PINCTRL_DEVNAME
,
1103 static struct resource bfin_pint0_resources
[] = {
1105 .start
= PINT0_MASK_SET
,
1106 .end
= PINT0_LATCH
+ 3,
1107 .flags
= IORESOURCE_MEM
,
1112 .flags
= IORESOURCE_IRQ
,
1116 static struct platform_device bfin_pint0_device
= {
1117 .name
= ADI_PINT_DEVNAME
,
1119 .num_resources
= ARRAY_SIZE(bfin_pint0_resources
),
1120 .resource
= bfin_pint0_resources
,
1123 static struct resource bfin_pint1_resources
[] = {
1125 .start
= PINT1_MASK_SET
,
1126 .end
= PINT1_LATCH
+ 3,
1127 .flags
= IORESOURCE_MEM
,
1132 .flags
= IORESOURCE_IRQ
,
1136 static struct platform_device bfin_pint1_device
= {
1137 .name
= ADI_PINT_DEVNAME
,
1139 .num_resources
= ARRAY_SIZE(bfin_pint1_resources
),
1140 .resource
= bfin_pint1_resources
,
1143 static struct resource bfin_pint2_resources
[] = {
1145 .start
= PINT2_MASK_SET
,
1146 .end
= PINT2_LATCH
+ 3,
1147 .flags
= IORESOURCE_MEM
,
1152 .flags
= IORESOURCE_IRQ
,
1156 static struct platform_device bfin_pint2_device
= {
1157 .name
= ADI_PINT_DEVNAME
,
1159 .num_resources
= ARRAY_SIZE(bfin_pint2_resources
),
1160 .resource
= bfin_pint2_resources
,
1163 static struct resource bfin_pint3_resources
[] = {
1165 .start
= PINT3_MASK_SET
,
1166 .end
= PINT3_LATCH
+ 3,
1167 .flags
= IORESOURCE_MEM
,
1172 .flags
= IORESOURCE_IRQ
,
1176 static struct platform_device bfin_pint3_device
= {
1177 .name
= ADI_PINT_DEVNAME
,
1179 .num_resources
= ARRAY_SIZE(bfin_pint3_resources
),
1180 .resource
= bfin_pint3_resources
,
1183 static struct resource bfin_gpa_resources
[] = {
1186 .end
= PORTA_MUX
+ 3,
1187 .flags
= IORESOURCE_MEM
,
1192 .flags
= IORESOURCE_IRQ
,
1196 static struct adi_pinctrl_gpio_platform_data bfin_gpa_pdata
= {
1197 .port_gpio_base
= GPIO_PA0
, /* Optional */
1198 .port_pin_base
= GPIO_PA0
,
1199 .port_width
= GPIO_BANKSIZE
,
1200 .pint_id
= 0, /* PINT0 */
1201 .pint_assign
= true, /* PINT upper 16 bit */
1202 .pint_map
= 0, /* mapping mask in PINT */
1205 static struct platform_device bfin_gpa_device
= {
1206 .name
= ADI_GPIO_DEVNAME
,
1208 .num_resources
= ARRAY_SIZE(bfin_gpa_resources
),
1209 .resource
= bfin_gpa_resources
,
1211 .platform_data
= &bfin_gpa_pdata
, /* Passed to driver */
1215 static struct resource bfin_gpb_resources
[] = {
1218 .end
= PORTB_MUX
+ 3,
1219 .flags
= IORESOURCE_MEM
,
1224 .flags
= IORESOURCE_IRQ
,
1228 static struct adi_pinctrl_gpio_platform_data bfin_gpb_pdata
= {
1229 .port_gpio_base
= GPIO_PB0
,
1230 .port_pin_base
= GPIO_PB0
,
1233 .pint_assign
= true,
1237 static struct platform_device bfin_gpb_device
= {
1238 .name
= ADI_GPIO_DEVNAME
,
1240 .num_resources
= ARRAY_SIZE(bfin_gpb_resources
),
1241 .resource
= bfin_gpb_resources
,
1243 .platform_data
= &bfin_gpb_pdata
, /* Passed to driver */
1247 static struct resource bfin_gpc_resources
[] = {
1250 .end
= PORTC_MUX
+ 3,
1251 .flags
= IORESOURCE_MEM
,
1256 .flags
= IORESOURCE_IRQ
,
1260 static struct adi_pinctrl_gpio_platform_data bfin_gpc_pdata
= {
1261 .port_gpio_base
= GPIO_PC0
,
1262 .port_pin_base
= GPIO_PC0
,
1265 .pint_assign
= true,
1269 static struct platform_device bfin_gpc_device
= {
1270 .name
= ADI_GPIO_DEVNAME
,
1272 .num_resources
= ARRAY_SIZE(bfin_gpc_resources
),
1273 .resource
= bfin_gpc_resources
,
1275 .platform_data
= &bfin_gpc_pdata
, /* Passed to driver */
1279 static struct resource bfin_gpd_resources
[] = {
1282 .end
= PORTD_MUX
+ 3,
1283 .flags
= IORESOURCE_MEM
,
1288 .flags
= IORESOURCE_IRQ
,
1292 static struct adi_pinctrl_gpio_platform_data bfin_gpd_pdata
= {
1293 .port_gpio_base
= GPIO_PD0
,
1294 .port_pin_base
= GPIO_PD0
,
1295 .port_width
= GPIO_BANKSIZE
,
1297 .pint_assign
= false,
1301 static struct platform_device bfin_gpd_device
= {
1302 .name
= ADI_GPIO_DEVNAME
,
1304 .num_resources
= ARRAY_SIZE(bfin_gpd_resources
),
1305 .resource
= bfin_gpd_resources
,
1307 .platform_data
= &bfin_gpd_pdata
, /* Passed to driver */
1311 static struct resource bfin_gpe_resources
[] = {
1314 .end
= PORTE_MUX
+ 3,
1315 .flags
= IORESOURCE_MEM
,
1320 .flags
= IORESOURCE_IRQ
,
1324 static struct adi_pinctrl_gpio_platform_data bfin_gpe_pdata
= {
1325 .port_gpio_base
= GPIO_PE0
,
1326 .port_pin_base
= GPIO_PE0
,
1327 .port_width
= GPIO_BANKSIZE
,
1329 .pint_assign
= true,
1333 static struct platform_device bfin_gpe_device
= {
1334 .name
= ADI_GPIO_DEVNAME
,
1336 .num_resources
= ARRAY_SIZE(bfin_gpe_resources
),
1337 .resource
= bfin_gpe_resources
,
1339 .platform_data
= &bfin_gpe_pdata
, /* Passed to driver */
1343 static struct resource bfin_gpf_resources
[] = {
1346 .end
= PORTF_MUX
+ 3,
1347 .flags
= IORESOURCE_MEM
,
1352 .flags
= IORESOURCE_IRQ
,
1356 static struct adi_pinctrl_gpio_platform_data bfin_gpf_pdata
= {
1357 .port_gpio_base
= GPIO_PF0
,
1358 .port_pin_base
= GPIO_PF0
,
1359 .port_width
= GPIO_BANKSIZE
,
1361 .pint_assign
= false,
1365 static struct platform_device bfin_gpf_device
= {
1366 .name
= ADI_GPIO_DEVNAME
,
1368 .num_resources
= ARRAY_SIZE(bfin_gpf_resources
),
1369 .resource
= bfin_gpf_resources
,
1371 .platform_data
= &bfin_gpf_pdata
, /* Passed to driver */
1375 static struct resource bfin_gpg_resources
[] = {
1378 .end
= PORTG_MUX
+ 3,
1379 .flags
= IORESOURCE_MEM
,
1384 .flags
= IORESOURCE_IRQ
,
1388 static struct adi_pinctrl_gpio_platform_data bfin_gpg_pdata
= {
1389 .port_gpio_base
= GPIO_PG0
,
1390 .port_pin_base
= GPIO_PG0
,
1391 .port_width
= GPIO_BANKSIZE
,
1395 static struct platform_device bfin_gpg_device
= {
1396 .name
= ADI_GPIO_DEVNAME
,
1398 .num_resources
= ARRAY_SIZE(bfin_gpg_resources
),
1399 .resource
= bfin_gpg_resources
,
1401 .platform_data
= &bfin_gpg_pdata
, /* Passed to driver */
1405 static struct resource bfin_gph_resources
[] = {
1408 .end
= PORTH_MUX
+ 3,
1409 .flags
= IORESOURCE_MEM
,
1414 .flags
= IORESOURCE_IRQ
,
1418 static struct adi_pinctrl_gpio_platform_data bfin_gph_pdata
= {
1419 .port_gpio_base
= GPIO_PH0
,
1420 .port_pin_base
= GPIO_PH0
,
1425 static struct platform_device bfin_gph_device
= {
1426 .name
= ADI_GPIO_DEVNAME
,
1428 .num_resources
= ARRAY_SIZE(bfin_gph_resources
),
1429 .resource
= bfin_gph_resources
,
1431 .platform_data
= &bfin_gph_pdata
, /* Passed to driver */
1435 static struct resource bfin_gpi_resources
[] = {
1438 .end
= PORTI_MUX
+ 3,
1439 .flags
= IORESOURCE_MEM
,
1444 .flags
= IORESOURCE_IRQ
,
1448 static struct adi_pinctrl_gpio_platform_data bfin_gpi_pdata
= {
1449 .port_gpio_base
= GPIO_PI0
,
1450 .port_pin_base
= GPIO_PI0
,
1451 .port_width
= GPIO_BANKSIZE
,
1455 static struct platform_device bfin_gpi_device
= {
1456 .name
= ADI_GPIO_DEVNAME
,
1458 .num_resources
= ARRAY_SIZE(bfin_gpi_resources
),
1459 .resource
= bfin_gpi_resources
,
1461 .platform_data
= &bfin_gpi_pdata
, /* Passed to driver */
1465 static struct resource bfin_gpj_resources
[] = {
1468 .end
= PORTJ_MUX
+ 3,
1469 .flags
= IORESOURCE_MEM
,
1474 .flags
= IORESOURCE_IRQ
,
1478 static struct adi_pinctrl_gpio_platform_data bfin_gpj_pdata
= {
1479 .port_gpio_base
= GPIO_PJ0
,
1480 .port_pin_base
= GPIO_PJ0
,
1485 static struct platform_device bfin_gpj_device
= {
1486 .name
= ADI_GPIO_DEVNAME
,
1488 .num_resources
= ARRAY_SIZE(bfin_gpj_resources
),
1489 .resource
= bfin_gpj_resources
,
1491 .platform_data
= &bfin_gpj_pdata
, /* Passed to driver */
1497 static struct spi_board_info bfin_spi_board_info
[] __initdata
= {
1498 #if defined(CONFIG_MTD_M25P80) \
1499 || defined(CONFIG_MTD_M25P80_MODULE)
1501 /* the modalias must be the same as spi device driver name */
1502 .modalias
= "m25p80", /* Name of spi_driver for this device */
1503 .max_speed_hz
= 25000000, /* max spi clock (SCK) speed in HZ */
1504 .bus_num
= 0, /* Framework bus number */
1505 .chip_select
= MAX_CTRL_CS
+ GPIO_PE4
, /* SPI_SSEL1*/
1506 .platform_data
= &bfin_spi_flash_data
,
1507 .controller_data
= &spi_flash_chip_info
,
1511 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
1512 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
1514 .modalias
= "ad183x",
1515 .max_speed_hz
= 3125000, /* max spi clock (SCK) speed in HZ */
1517 .chip_select
= MAX_CTRL_CS
+ GPIO_PG6
, /* SPI_SSEL2 */
1520 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1522 .modalias
= "ad7877",
1523 .platform_data
= &bfin_ad7877_ts_info
,
1524 .irq
= IRQ_PB4
, /* old boards (<=Rev 1.3) use IRQ_PJ11 */
1525 .max_speed_hz
= 12500000, /* max spi clock (SCK) speed in HZ */
1527 .chip_select
= MAX_CTRL_CS
+ GPIO_PE5
, /* SPI_SSEL2 */
1530 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1532 .modalias
= "spidev",
1533 .max_speed_hz
= 3125000, /* max spi clock (SCK) speed in HZ */
1535 .chip_select
= MAX_CTRL_CS
+ GPIO_PE4
, /* SPI_SSEL1 */
1538 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1540 .modalias
= "adxl34x",
1541 .platform_data
= &adxl34x_info
,
1543 .max_speed_hz
= 5000000, /* max spi clock (SCK) speed in HZ */
1545 .chip_select
= MAX_CTRL_CS
+ GPIO_PG6
, /* SPI_SSEL2 */
1550 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1552 static struct resource bfin_spi0_resource
[] = {
1554 .start
= SPI0_REGBASE
,
1555 .end
= SPI0_REGBASE
+ 0xFF,
1556 .flags
= IORESOURCE_MEM
,
1561 .flags
= IORESOURCE_DMA
,
1566 .flags
= IORESOURCE_IRQ
,
1571 static struct resource bfin_spi1_resource
[] = {
1573 .start
= SPI1_REGBASE
,
1574 .end
= SPI1_REGBASE
+ 0xFF,
1575 .flags
= IORESOURCE_MEM
,
1580 .flags
= IORESOURCE_DMA
,
1585 .flags
= IORESOURCE_IRQ
,
1589 /* SPI controller data */
1590 static struct bfin5xx_spi_master bf54x_spi_master_info0
= {
1591 .num_chipselect
= MAX_CTRL_CS
+ MAX_BLACKFIN_GPIOS
,
1592 .enable_dma
= 1, /* master has the ability to do dma transfer */
1593 .pin_req
= {P_SPI0_SCK
, P_SPI0_MISO
, P_SPI0_MOSI
, 0},
1596 static struct platform_device bf54x_spi_master0
= {
1598 .id
= 0, /* Bus number */
1599 .num_resources
= ARRAY_SIZE(bfin_spi0_resource
),
1600 .resource
= bfin_spi0_resource
,
1602 .platform_data
= &bf54x_spi_master_info0
, /* Passed to driver */
1606 static struct bfin5xx_spi_master bf54x_spi_master_info1
= {
1607 .num_chipselect
= MAX_CTRL_CS
+ MAX_BLACKFIN_GPIOS
,
1608 .enable_dma
= 1, /* master has the ability to do dma transfer */
1609 .pin_req
= {P_SPI1_SCK
, P_SPI1_MISO
, P_SPI1_MOSI
, 0},
1612 static struct platform_device bf54x_spi_master1
= {
1614 .id
= 1, /* Bus number */
1615 .num_resources
= ARRAY_SIZE(bfin_spi1_resource
),
1616 .resource
= bfin_spi1_resource
,
1618 .platform_data
= &bf54x_spi_master_info1
, /* Passed to driver */
1621 #endif /* spi master and devices */
1623 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1624 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1625 #include <linux/videodev2.h>
1626 #include <media/blackfin/bfin_capture.h>
1627 #include <media/blackfin/ppi.h>
1629 static const unsigned short ppi_req
[] = {
1630 P_PPI1_D0
, P_PPI1_D1
, P_PPI1_D2
, P_PPI1_D3
,
1631 P_PPI1_D4
, P_PPI1_D5
, P_PPI1_D6
, P_PPI1_D7
,
1632 P_PPI1_CLK
, P_PPI1_FS1
, P_PPI1_FS2
,
1636 static const struct ppi_info ppi_info
= {
1637 .type
= PPI_TYPE_EPPI
,
1639 .irq_err
= IRQ_EPPI1_ERROR
,
1640 .base
= (void __iomem
*)EPPI1_STATUS
,
1644 #if defined(CONFIG_VIDEO_VS6624) \
1645 || defined(CONFIG_VIDEO_VS6624_MODULE)
1646 static struct v4l2_input vs6624_inputs
[] = {
1650 .type
= V4L2_INPUT_TYPE_CAMERA
,
1651 .std
= V4L2_STD_UNKNOWN
,
1655 static struct bcap_route vs6624_routes
[] = {
1662 static const unsigned vs6624_ce_pin
= GPIO_PG6
;
1664 static struct bfin_capture_config bfin_capture_data
= {
1665 .card_name
= "BF548",
1666 .inputs
= vs6624_inputs
,
1667 .num_inputs
= ARRAY_SIZE(vs6624_inputs
),
1668 .routes
= vs6624_routes
,
1669 .i2c_adapter_id
= 0,
1673 .platform_data
= (void *)&vs6624_ce_pin
,
1675 .ppi_info
= &ppi_info
,
1676 .ppi_control
= (POLC
| PACKEN
| DLEN_8
| XFR_TYPE
| 0x20),
1677 .int_mask
= 0xFFFFFFFF, /* disable error interrupt on eppi */
1678 .blank_clocks
= 8, /* 8 clocks as SAV and EAV */
1682 static struct platform_device bfin_capture_device
= {
1683 .name
= "bfin_capture",
1685 .platform_data
= &bfin_capture_data
,
1690 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1691 static const u16 bfin_twi0_pins
[] = {P_TWI0_SCL
, P_TWI0_SDA
, 0};
1693 static struct resource bfin_twi0_resource
[] = {
1695 .start
= TWI0_REGBASE
,
1696 .end
= TWI0_REGBASE
+ 0xFF,
1697 .flags
= IORESOURCE_MEM
,
1702 .flags
= IORESOURCE_IRQ
,
1706 static struct platform_device i2c_bfin_twi0_device
= {
1707 .name
= "i2c-bfin-twi",
1709 .num_resources
= ARRAY_SIZE(bfin_twi0_resource
),
1710 .resource
= bfin_twi0_resource
,
1712 .platform_data
= &bfin_twi0_pins
,
1716 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1717 static const u16 bfin_twi1_pins
[] = {P_TWI1_SCL
, P_TWI1_SDA
, 0};
1719 static struct resource bfin_twi1_resource
[] = {
1721 .start
= TWI1_REGBASE
,
1722 .end
= TWI1_REGBASE
+ 0xFF,
1723 .flags
= IORESOURCE_MEM
,
1728 .flags
= IORESOURCE_IRQ
,
1732 static struct platform_device i2c_bfin_twi1_device
= {
1733 .name
= "i2c-bfin-twi",
1735 .num_resources
= ARRAY_SIZE(bfin_twi1_resource
),
1736 .resource
= bfin_twi1_resource
,
1738 .platform_data
= &bfin_twi1_pins
,
1744 static struct i2c_board_info __initdata bfin_i2c_board_info0
[] = {
1745 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1747 I2C_BOARD_INFO("ssm2602", 0x1b),
1752 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
1753 static struct i2c_board_info __initdata bfin_i2c_board_info1
[] = {
1754 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1756 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
1759 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
1761 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
1765 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1767 I2C_BOARD_INFO("adxl34x", 0x53),
1769 .platform_data
= (void *)&adxl34x_info
,
1772 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
1774 I2C_BOARD_INFO("ad5252", 0x2f),
1780 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1781 #include <linux/gpio_keys.h>
1783 static struct gpio_keys_button bfin_gpio_keys_table
[] = {
1784 {BTN_0
, GPIO_PB8
, 1, "gpio-keys: BTN0"},
1785 {BTN_1
, GPIO_PB9
, 1, "gpio-keys: BTN1"},
1786 {BTN_2
, GPIO_PB10
, 1, "gpio-keys: BTN2"},
1787 {BTN_3
, GPIO_PB11
, 1, "gpio-keys: BTN3"},
1790 static struct gpio_keys_platform_data bfin_gpio_keys_data
= {
1791 .buttons
= bfin_gpio_keys_table
,
1792 .nbuttons
= ARRAY_SIZE(bfin_gpio_keys_table
),
1795 static struct platform_device bfin_device_gpiokeys
= {
1796 .name
= "gpio-keys",
1798 .platform_data
= &bfin_gpio_keys_data
,
1803 static const unsigned int cclk_vlev_datasheet
[] =
1806 * Internal VLEV BF54XSBBC1533
1807 ****temporarily using these values until data sheet is updated
1809 VRPAIR(VLEV_085
, 150000000),
1810 VRPAIR(VLEV_090
, 250000000),
1811 VRPAIR(VLEV_110
, 276000000),
1812 VRPAIR(VLEV_115
, 301000000),
1813 VRPAIR(VLEV_120
, 525000000),
1814 VRPAIR(VLEV_125
, 550000000),
1815 VRPAIR(VLEV_130
, 600000000),
1818 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data
= {
1819 .tuple_tab
= cclk_vlev_datasheet
,
1820 .tabsize
= ARRAY_SIZE(cclk_vlev_datasheet
),
1821 .vr_settling_time
= 25 /* us */,
1824 static struct platform_device bfin_dpmc
= {
1825 .name
= "bfin dpmc",
1827 .platform_data
= &bfin_dmpc_vreg_data
,
1831 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
1832 defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1834 #define SPORT_REQ(x) \
1835 [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
1836 P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
1838 static const u16 bfin_snd_pin
[][7] = {
1845 static struct bfin_snd_platform_data bfin_snd_data
[] = {
1847 .pin_req
= &bfin_snd_pin
[0][0],
1850 .pin_req
= &bfin_snd_pin
[1][0],
1853 .pin_req
= &bfin_snd_pin
[2][0],
1856 .pin_req
= &bfin_snd_pin
[3][0],
1860 #define BFIN_SND_RES(x) \
1863 .start = SPORT##x##_TCR1, \
1864 .end = SPORT##x##_TCR1, \
1865 .flags = IORESOURCE_MEM \
1868 .start = CH_SPORT##x##_RX, \
1869 .end = CH_SPORT##x##_RX, \
1870 .flags = IORESOURCE_DMA, \
1873 .start = CH_SPORT##x##_TX, \
1874 .end = CH_SPORT##x##_TX, \
1875 .flags = IORESOURCE_DMA, \
1878 .start = IRQ_SPORT##x##_ERROR, \
1879 .end = IRQ_SPORT##x##_ERROR, \
1880 .flags = IORESOURCE_IRQ, \
1884 static struct resource bfin_snd_resources
[][4] = {
1892 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1893 static struct platform_device bfin_i2s_pcm
= {
1894 .name
= "bfin-i2s-pcm-audio",
1899 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
1900 static struct platform_device bfin_ac97_pcm
= {
1901 .name
= "bfin-ac97-pcm-audio",
1906 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
1907 static struct platform_device bfin_ad73311_codec_device
= {
1913 #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
1914 static struct platform_device bfin_ad1980_codec_device
= {
1920 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
1921 static struct platform_device bfin_i2s
= {
1923 .id
= CONFIG_SND_BF5XX_SPORT_NUM
,
1924 .num_resources
= ARRAY_SIZE(bfin_snd_resources
[CONFIG_SND_BF5XX_SPORT_NUM
]),
1925 .resource
= bfin_snd_resources
[CONFIG_SND_BF5XX_SPORT_NUM
],
1927 .platform_data
= &bfin_snd_data
[CONFIG_SND_BF5XX_SPORT_NUM
],
1932 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
1933 static struct platform_device bfin_ac97
= {
1934 .name
= "bfin-ac97",
1935 .id
= CONFIG_SND_BF5XX_SPORT_NUM
,
1936 .num_resources
= ARRAY_SIZE(bfin_snd_resources
[CONFIG_SND_BF5XX_SPORT_NUM
]),
1937 .resource
= bfin_snd_resources
[CONFIG_SND_BF5XX_SPORT_NUM
],
1939 .platform_data
= &bfin_snd_data
[CONFIG_SND_BF5XX_SPORT_NUM
],
1944 static struct platform_device
*ezkit_devices
[] __initdata
= {
1947 #if defined(CONFIG_PINCTRL_ADI2)
1948 &bfin_pinctrl_device
,
1965 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1969 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1970 #ifdef CONFIG_SERIAL_BFIN_UART0
1973 #ifdef CONFIG_SERIAL_BFIN_UART1
1976 #ifdef CONFIG_SERIAL_BFIN_UART2
1979 #ifdef CONFIG_SERIAL_BFIN_UART3
1984 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1985 #ifdef CONFIG_BFIN_SIR0
1988 #ifdef CONFIG_BFIN_SIR1
1991 #ifdef CONFIG_BFIN_SIR2
1994 #ifdef CONFIG_BFIN_SIR3
1999 #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE)
2000 &bf54x_lq043_device
,
2003 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
2007 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
2011 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2012 &bfin_isp1760_device
,
2015 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2016 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2017 &bfin_sport0_uart_device
,
2019 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2020 &bfin_sport1_uart_device
,
2022 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
2023 &bfin_sport2_uart_device
,
2025 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
2026 &bfin_sport3_uart_device
,
2030 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2035 #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE)
2039 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
2043 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
2047 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
2051 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
2052 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
2053 &bfin_capture_device
,
2056 #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE)
2060 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
2061 &bfin_rotary_device
,
2064 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2065 &i2c_bfin_twi0_device
,
2066 #if !defined(CONFIG_BF542)
2067 &i2c_bfin_twi1_device
,
2071 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2072 &bfin_device_gpiokeys
,
2075 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2076 &ezkit_flash_device
,
2079 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2083 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2087 #if defined(CONFIG_SND_BF5XX_SOC_AD1980) || defined(CONFIG_SND_BF5XX_SOC_AD1980_MODULE)
2088 &bfin_ad1980_codec_device
,
2091 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2095 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2100 /* Pin control settings */
2101 static struct pinctrl_map __initdata bfin_pinmux_map
[] = {
2102 /* per-device maps */
2103 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.0", "pinctrl-adi2.0", NULL
, "uart0"),
2104 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL
, "uart1"),
2105 #ifdef CONFIG_BFIN_UART1_CTSRTS
2106 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL
, "uart1_ctsrts"),
2108 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.2", "pinctrl-adi2.0", NULL
, "uart2"),
2109 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.3", "pinctrl-adi2.0", NULL
, "uart3"),
2110 #ifdef CONFIG_BFIN_UART3_CTSRTS
2111 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.3", "pinctrl-adi2.0", NULL
, "uart3_ctsrts"),
2113 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.0", "pinctrl-adi2.0", NULL
, "uart0"),
2114 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1", "pinctrl-adi2.0", NULL
, "uart1"),
2115 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.2", "pinctrl-adi2.0", NULL
, "uart2"),
2116 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.3", "pinctrl-adi2.0", NULL
, "uart3"),
2117 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0", "pinctrl-adi2.0", NULL
, "rsi0"),
2118 PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi.0", "pinctrl-adi2.0", NULL
, "spi0"),
2119 PIN_MAP_MUX_GROUP_DEFAULT("bfin-spi.1", "pinctrl-adi2.0", NULL
, "spi1"),
2120 PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0", "pinctrl-adi2.0", NULL
, "twi0"),
2121 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
2122 PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1", "pinctrl-adi2.0", NULL
, "twi1"),
2124 PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL
, "rotary"),
2125 PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0", "pinctrl-adi2.0", NULL
, "can0"),
2126 PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.1", "pinctrl-adi2.0", NULL
, "can1"),
2127 PIN_MAP_MUX_GROUP_DEFAULT("bf54x-lq043", "pinctrl-adi2.0", NULL
, "ppi0_24b"),
2128 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0", "pinctrl-adi2.0", NULL
, "sport0"),
2129 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0", "pinctrl-adi2.0", NULL
, "sport0"),
2130 PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.0", "pinctrl-adi2.0", NULL
, "sport0"),
2131 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.1", "pinctrl-adi2.0", NULL
, "sport1"),
2132 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.1", "pinctrl-adi2.0", NULL
, "sport1"),
2133 PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.1", "pinctrl-adi2.0", NULL
, "sport1"),
2134 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.2", "pinctrl-adi2.0", NULL
, "sport2"),
2135 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.2", "pinctrl-adi2.0", NULL
, "sport2"),
2136 PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.2", "pinctrl-adi2.0", NULL
, "sport2"),
2137 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.3", "pinctrl-adi2.0", NULL
, "sport3"),
2138 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.3", "pinctrl-adi2.0", NULL
, "sport3"),
2139 PIN_MAP_MUX_GROUP_DEFAULT("bfin-ac97.3", "pinctrl-adi2.0", NULL
, "sport3"),
2140 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.0", "pinctrl-adi2.0", NULL
, "sport0"),
2141 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.1", "pinctrl-adi2.0", NULL
, "sport1"),
2142 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.2", "pinctrl-adi2.0", NULL
, "sport2"),
2143 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sport-uart.3", "pinctrl-adi2.0", NULL
, "sport3"),
2144 PIN_MAP_MUX_GROUP_DEFAULT("pata-bf54x", "pinctrl-adi2.0", NULL
, "atapi"),
2145 #ifdef CONFIG_BF548_ATAPI_ALTERNATIVE_PORT
2146 PIN_MAP_MUX_GROUP_DEFAULT("pata-bf54x", "pinctrl-adi2.0", NULL
, "atapi_alter"),
2148 PIN_MAP_MUX_GROUP_DEFAULT("bf5xx-nand.0", "pinctrl-adi2.0", NULL
, "nfc0"),
2149 PIN_MAP_MUX_GROUP_DEFAULT("bf54x-keys", "pinctrl-adi2.0", NULL
, "keys_4x4"),
2152 static int __init
ezkit_init(void)
2154 printk(KERN_INFO
"%s(): registering device resources\n", __func__
);
2156 /* Initialize pinmuxing */
2157 pinctrl_register_mappings(bfin_pinmux_map
,
2158 ARRAY_SIZE(bfin_pinmux_map
));
2160 i2c_register_board_info(0, bfin_i2c_board_info0
,
2161 ARRAY_SIZE(bfin_i2c_board_info0
));
2162 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
2163 i2c_register_board_info(1, bfin_i2c_board_info1
,
2164 ARRAY_SIZE(bfin_i2c_board_info1
));
2167 platform_add_devices(ezkit_devices
, ARRAY_SIZE(ezkit_devices
));
2169 spi_register_board_info(bfin_spi_board_info
, ARRAY_SIZE(bfin_spi_board_info
));
2174 arch_initcall(ezkit_init
);
2176 static struct platform_device
*ezkit_early_devices
[] __initdata
= {
2177 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2178 #ifdef CONFIG_SERIAL_BFIN_UART0
2181 #ifdef CONFIG_SERIAL_BFIN_UART1
2184 #ifdef CONFIG_SERIAL_BFIN_UART2
2187 #ifdef CONFIG_SERIAL_BFIN_UART3
2193 void __init
native_machine_early_platform_add_devices(void)
2195 printk(KERN_INFO
"register early platform devices\n");
2196 early_platform_add_devices(ezkit_early_devices
,
2197 ARRAY_SIZE(ezkit_early_devices
));