arch/cris/arch-v32/kernel/head.S

   1 /*
   2  * CRISv32 kernel startup code.
   3  *
   4  * Copyright (C) 2003, Axis Communications AB
   5  */
   6
   7 #define ASSEMBLER_MACROS_ONLY
   8
   9 /*
  10  * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
  11  * -traditional must not be used when assembling this file.
  12  */
  13 #include <arch/memmap.h>
  14 #include <hwregs/reg_rdwr.h>
  15 #include <hwregs/intr_vect.h>
  16 #include <hwregs/asm/mmu_defs_asm.h>
  17 #include <hwregs/asm/reg_map_asm.h>
  18 #include <mach/startup.inc>
  19
  20 #define CRAMFS_MAGIC 0x28cd3d45
  21 #define JHEAD_MAGIC 0x1FF528A6
  22 #define JHEAD_SIZE 8
  23 #define RAM_INIT_MAGIC 0x56902387
  24 #define COMMAND_LINE_MAGIC 0x87109563
  25 #define NAND_BOOT_MAGIC 0x9a9db001
  26
  27         ;; NOTE: R8 and R9 carry information from the decompressor (if the
  28         ;; kernel was compressed). They must not be used in the code below
  29         ;; until they are read!
  30
  31         ;; Exported symbols.
  32         .global etrax_irv
  33         .global romfs_start
  34         .global romfs_length
  35         .global romfs_in_flash
  36         .global nand_boot
  37         .global swapper_pg_dir
  38
  39         .text
  40 tstart:
  41         ;; This is the entry point of the kernel. The CPU is currently in
  42         ;; supervisor mode.
  43         ;;
  44         ;; 0x00000000 if flash.
  45         ;; 0x40004000 if DRAM.
  46         ;;
  47         di
  48
  49         START_CLOCKS
  50
  51         SETUP_WAIT_STATES
  52
  53         GIO_INIT
  54
  55 #ifdef CONFIG_SMP
  56 secondary_cpu_entry: /* Entry point for secondary CPUs */
  57         di
  58 #endif
  59
  60         ;; Setup and enable the MMU. Use same configuration for both the data
  61         ;; and the instruction MMU.
  62         ;;
  63         ;; Note; 3 cycles is needed for a bank-select to take effect. Further;
  64         ;; bank 1 is the instruction MMU, bank 2 is the data MMU.
  65
  66 #ifdef CONFIG_CRIS_MACH_ARTPEC3
  67         move.d  REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)       \
  68                 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)     \
  69                 | REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5)     \
  70                 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
  71 #else
  72         move.d  REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8)       \
  73                 | REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4)     \
  74                 | REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
  75 #endif
  76
  77         ;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
  78         move.d  REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4)  \
  79                 | REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1
  80
  81         ;; Enable certain page protections and setup linear mapping
  82         ;; for f,e,c,b,4,0.
  83
  84         ;; ARTPEC-3:
  85         ;; c,d used for linear kernel mapping, up to 512 MB
  86         ;; e used for vmalloc
  87         ;; f unused, but page mapped to get page faults
  88
  89         ;; ETRAX FS:
  90         ;; c used for linear kernel mapping, up to 256 MB
  91         ;; d used for vmalloc
  92         ;; e,f used for memory-mapped NOR flash
  93
  94 #ifdef CONFIG_CRIS_MACH_ARTPEC3
  95         move.d  REG_STATE(mmu, rw_mm_cfg, we, on)               \
  96                 | REG_STATE(mmu, rw_mm_cfg, acc, on)            \
  97                 | REG_STATE(mmu, rw_mm_cfg, ex, on)             \
  98                 | REG_STATE(mmu, rw_mm_cfg, inv, on)            \
  99                 | REG_STATE(mmu, rw_mm_cfg, seg_f, page)        \
 100                 | REG_STATE(mmu, rw_mm_cfg, seg_e, page)        \
 101                 | REG_STATE(mmu, rw_mm_cfg, seg_d, linear)      \
 102                 | REG_STATE(mmu, rw_mm_cfg, seg_c, linear)      \
 103                 | REG_STATE(mmu, rw_mm_cfg, seg_b, linear)      \
 104                 | REG_STATE(mmu, rw_mm_cfg, seg_a, page)        \
 105                 | REG_STATE(mmu, rw_mm_cfg, seg_9, page)        \
 106                 | REG_STATE(mmu, rw_mm_cfg, seg_8, page)        \
 107                 | REG_STATE(mmu, rw_mm_cfg, seg_7, page)        \
 108                 | REG_STATE(mmu, rw_mm_cfg, seg_6, page)        \
 109                 | REG_STATE(mmu, rw_mm_cfg, seg_5, page)        \
 110                 | REG_STATE(mmu, rw_mm_cfg, seg_4, linear)      \
 111                 | REG_STATE(mmu, rw_mm_cfg, seg_3, page)        \
 112                 | REG_STATE(mmu, rw_mm_cfg, seg_2, page)        \
 113                 | REG_STATE(mmu, rw_mm_cfg, seg_1, page)        \
 114                 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
 115 #else
 116         move.d  REG_STATE(mmu, rw_mm_cfg, we, on)               \
 117                 | REG_STATE(mmu, rw_mm_cfg, acc, on)            \
 118                 | REG_STATE(mmu, rw_mm_cfg, ex, on)             \
 119                 | REG_STATE(mmu, rw_mm_cfg, inv, on)            \
 120                 | REG_STATE(mmu, rw_mm_cfg, seg_f, linear)      \
 121                 | REG_STATE(mmu, rw_mm_cfg, seg_e, linear)      \
 122                 | REG_STATE(mmu, rw_mm_cfg, seg_d, page)        \
 123                 | REG_STATE(mmu, rw_mm_cfg, seg_c, linear)      \
 124                 | REG_STATE(mmu, rw_mm_cfg, seg_b, linear)      \
 125                 | REG_STATE(mmu, rw_mm_cfg, seg_a, page)        \
 126                 | REG_STATE(mmu, rw_mm_cfg, seg_9, page)        \
 127                 | REG_STATE(mmu, rw_mm_cfg, seg_8, page)        \
 128                 | REG_STATE(mmu, rw_mm_cfg, seg_7, page)        \
 129                 | REG_STATE(mmu, rw_mm_cfg, seg_6, page)        \
 130                 | REG_STATE(mmu, rw_mm_cfg, seg_5, page)        \
 131                 | REG_STATE(mmu, rw_mm_cfg, seg_4, linear)      \
 132                 | REG_STATE(mmu, rw_mm_cfg, seg_3, page)        \
 133                 | REG_STATE(mmu, rw_mm_cfg, seg_2, page)        \
 134                 | REG_STATE(mmu, rw_mm_cfg, seg_1, page)        \
 135                 | REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
 136 #endif
 137
 138         ;; Update instruction MMU.
 139         move    1, $srs
 140         nop
 141         nop
 142         nop
 143         move    $r0, $s2        ; kbase_hi.
 144         move    $r1, $s1        ; kbase_lo.
 145         move    $r2, $s0        ; mm_cfg, virtual memory configuration.
 146
 147         ;; Update data MMU.
 148         move    2, $srs
 149         nop
 150         nop
 151         nop
 152         move    $r0, $s2        ; kbase_hi.
 153         move    $r1, $s1        ; kbase_lo
 154         move    $r2, $s0        ; mm_cfg, virtual memory configuration.
 155
 156         ;; Enable data and instruction MMU.
 157         move    0, $srs
 158         moveq   0xf, $r0        ;  IMMU, DMMU, DCache, Icache on
 159         nop
 160         nop
 161         nop
 162         move    $r0, $s0
 163         nop
 164         nop
 165         nop
 166
 167 #ifdef CONFIG_SMP
 168         ;; Read CPU ID
 169         move    0, $srs
 170         nop
 171         nop
 172         nop
 173         move    $s12, $r0
 174         cmpq    0, $r0
 175         beq     master_cpu
 176         nop
 177 slave_cpu:
 178         ; Time to boot-up. Get stack location provided by master CPU.
 179         move.d  smp_init_current_idle_thread, $r1
 180         move.d  [$r1], $sp
 181         add.d   8192, $sp
 182         move.d  ebp_start, $r0  ; Defined in linker-script.
 183         move    $r0, $ebp
 184         jsr     smp_callin
 185         nop
 186 master_cpu:
 187         /* Set up entry point for secondary CPUs. The boot ROM has set up
 188          * EBP at start of internal memory. The CPU will get there
 189          * later when we issue an IPI to them... */
 190         move.d MEM_INTMEM_START + IPI_INTR_VECT * 4, $r0
 191         move.d secondary_cpu_entry, $r1
 192         move.d $r1, [$r0]
 193 #endif
 194         ; Check if starting from DRAM (network->RAM boot or unpacked
 195         ; compressed kernel), or directly from flash.
 196         lapcq   ., $r0
 197         and.d   0x7fffffff, $r0 ; Mask off the non-cache bit.
 198         cmp.d   0x10000, $r0    ; Arbitrary, something above this code.
 199         blo     _inflash0
 200         nop
 201
 202         jump    _inram          ; Jump to cached RAM.
 203         nop
 204
 205         ;; Jumpgate.
 206 _inflash0:
 207         jump _inflash
 208         nop
 209
 210         ;; Put the following in a section so that storage for it can be
 211         ;; reclaimed after init is finished.
 212         .section ".init.text", "ax"
 213
 214 _inflash:
 215
 216         ;; Initialize DRAM.
 217         cmp.d   RAM_INIT_MAGIC, $r8 ; Already initialized?
 218         beq     _dram_initialized
 219         nop
 220
 221 #if defined CONFIG_ETRAXFS
 222 #include "../mach-fs/dram_init.S"
 223 #elif defined CONFIG_CRIS_MACH_ARTPEC3
 224 #include "../mach-a3/dram_init.S"
 225 #else
 226 #error Only ETRAXFS and ARTPEC-3 supported!
 227 #endif
 228
 229
 230 _dram_initialized:
 231         ;; Copy the text and data section to DRAM. This depends on that the
 232         ;; variables used below are correctly set up by the linker script.
 233         ;; The calculated value stored in R4 is used below.
 234         ;; Leave the cramfs file system (piggybacked after the kernel) in flash.
 235         moveq   0, $r0          ; Source.
 236         move.d  text_start, $r1 ; Destination.
 237         move.d  __vmlinux_end, $r2
 238         move.d  $r2, $r4
 239         sub.d   $r1, $r4
 240 1:      move.w  [$r0+], $r3
 241         move.w  $r3, [$r1+]
 242         cmp.d   $r2, $r1
 243         blo     1b
 244         nop
 245
 246         ;; Check for cramfs.
 247         moveq   0, $r0
 248         move.d  romfs_length, $r1
 249         move.d  $r0, [$r1]
 250         move.d  [$r4], $r0      ; cramfs_super.magic
 251         cmp.d   CRAMFS_MAGIC, $r0
 252         bne 1f
 253         nop
 254
 255         ;; Set length and start of cramfs, set romfs_in_flash flag
 256         addoq   +4, $r4, $acr
 257         move.d  [$acr], $r0
 258         move.d  romfs_length, $r1
 259         move.d  $r0, [$r1]
 260         add.d   0xf0000000, $r4 ; Add cached flash start in virtual memory.
 261         move.d  romfs_start, $r1
 262         move.d  $r4, [$r1]
 263 1:      moveq   1, $r0
 264         move.d  romfs_in_flash, $r1
 265         move.d  $r0, [$r1]
 266
 267         jump    _start_it       ; Jump to cached code.
 268         nop
 269
 270 _inram:
 271         ;; Check if booting from NAND flash; if so, set appropriate flags
 272         ;; and move on.
 273         cmp.d   NAND_BOOT_MAGIC, $r12
 274         bne     move_cramfs     ; not nand, jump
 275         moveq   1, $r0
 276         move.d  nand_boot, $r1  ; tell axisflashmap we're booting from NAND
 277         move.d  $r0, [$r1]
 278         moveq   0, $r0          ; tell axisflashmap romfs is not in
 279         move.d  romfs_in_flash, $r1 ; (directly accessed) flash
 280         move.d  $r0, [$r1]
 281         jump    _start_it       ; continue with boot
 282         nop
 283
 284 move_cramfs:
 285         ;; kernel is in DRAM.
 286         ;; Must figure out if there is a piggybacked rootfs image or not.
 287         ;; Set romfs_length to 0 => no rootfs image available by default.
 288         moveq   0, $r0
 289         move.d  romfs_length, $r1
 290         move.d  $r0, [$r1]
 291
 292         ;; The kernel could have been unpacked to DRAM by the loader, but
 293         ;; the cramfs image could still be in the flash immediately
 294         ;; following the compressed kernel image. The loader passes the address
 295         ;; of the byte succeeding the last compressed byte in the flash in
 296         ;; register R9 when starting the kernel.
 297         cmp.d   0x0ffffff8, $r9
 298         bhs     _no_romfs_in_flash ; R9 points outside the flash area.
 299         nop
 300         ;; cramfs rootfs might to be in flash. Check for it.
 301         move.d  [$r9], $r0      ; cramfs_super.magic
 302         cmp.d   CRAMFS_MAGIC, $r0
 303         bne     _no_romfs_in_flash
 304         nop
 305
 306         ;; found cramfs in flash. set address and size, and romfs_in_flash flag.
 307         addoq   +4, $r9, $acr
 308         move.d  [$acr], $r0
 309         move.d  romfs_length, $r1
 310         move.d  $r0, [$r1]
 311         add.d   0xf0000000, $r9 ; Add cached flash start in virtual memory.
 312         move.d  romfs_start, $r1
 313         move.d  $r9, [$r1]
 314         moveq   1, $r0
 315         move.d  romfs_in_flash, $r1
 316         move.d  $r0, [$r1]
 317
 318         jump    _start_it       ; Jump to cached code.
 319         nop
 320
 321 _no_romfs_in_flash:
 322         ;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
 323         ;; after kernel in RAM, as is the case with network->RAM boot.
 324         ;; For cramfs, partition starts with magic and length.
 325         ;; For jffs2, a jhead is prepended which contains with magic and length.
 326         ;; The jhead is not part of the jffs2 partition however.
 327 #ifndef CONFIG_ETRAXFS_SIM
 328         move.d  __bss_start, $r0
 329 #else
 330         move.d  __end, $r0
 331 #endif
 332         move.d  [$r0], $r1
 333         cmp.d   CRAMFS_MAGIC, $r1 ; cramfs magic?
 334         beq     2f                ; yes, jump
 335         nop
 336         cmp.d   JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
 337         bne     4f              ; no, skip copy
 338         nop
 339         addq    4, $r0          ; location of jffs2 size
 340         move.d  [$r0+], $r2     ; fetch jffs2 size -> r2
 341                                 ; r0 now points to start of jffs2
 342         ba      3f
 343         nop
 344 2:
 345         addoq   +4, $r0, $acr   ; location of cramfs size
 346         move.d  [$acr], $r2     ; fetch cramfs size -> r2
 347                                 ; r0 still points to start of cramfs
 348 3:
 349         ;; Now, move the root fs to after kernel's BSS
 350
 351         move.d  _end, $r1       ; start of cramfs -> r1
 352         move.d  romfs_start, $r3
 353         move.d  $r1, [$r3]      ; store at romfs_start (for axisflashmap)
 354         move.d  romfs_length, $r3
 355         move.d  $r2, [$r3]      ; store size at romfs_length
 356
 357         add.d   $r2, $r0        ; copy from end and downwards
 358         add.d   $r2, $r1
 359
 360         lsrq    1, $r2          ; Size is in bytes, we copy words.
 361         addq    1, $r2
 362 1:
 363         move.w  [$r0], $r3
 364         move.w  $r3, [$r1]
 365         subq    2, $r0
 366         subq    2, $r1
 367         subq    1, $r2
 368         bne     1b
 369         nop
 370
 371 4:
 372         ;; BSS move done.
 373         ;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
 374         ;; Also clear nand_boot flag; if we got here, we know we've not
 375         ;; booted from NAND flash.
 376         moveq   0, $r0
 377         move.d  romfs_in_flash, $r1
 378         move.d  $r0, [$r1]
 379         moveq   0, $r0
 380         move.d  nand_boot, $r1
 381         move.d  $r0, [$r1]
 382
 383         jump    _start_it       ; Jump to cached code.
 384         nop
 385
 386 _start_it:
 387
 388         ;; Check if kernel command line is supplied
 389         cmp.d   COMMAND_LINE_MAGIC, $r10
 390         bne     no_command_line
 391         nop
 392
 393         move.d  256, $r13
 394         move.d  cris_command_line, $r10
 395         or.d    0x80000000, $r11 ; Make it virtual
 396 1:
 397         move.b  [$r11+], $r1
 398         move.b  $r1, [$r10+]
 399         subq    1, $r13
 400         bne     1b
 401         nop
 402
 403 no_command_line:
 404
 405         ;; The kernel stack contains a task structure for each task. This
 406         ;; the initial kernel stack is in the same page as the init_task,
 407         ;; but starts at the top of the page, i.e. + 8192 bytes.
 408         move.d  init_thread_union + 8192, $sp
 409         move.d  ebp_start, $r0  ; Defined in linker-script.
 410         move    $r0, $ebp
 411         move.d  etrax_irv, $r1  ; Set the exception base register and pointer.
 412         move.d  $r0, [$r1]
 413
 414         ;; Clear the BSS region from _bss_start to _end.
 415         move.d  __bss_start, $r0
 416         move.d  _end, $r1
 417 1:      clear.d [$r0+]
 418         cmp.d   $r1, $r0
 419         blo 1b
 420         nop
 421
 422         ; Initialize registers to increase determinism
 423         move.d __bss_start, $r0
 424         movem [$r0], $r13
 425
 426 #ifdef CONFIG_ETRAX_L2CACHE
 427         jsr     l2cache_init
 428         nop
 429 #endif
 430
 431         jump    start_kernel    ; Jump to start_kernel() in init/main.c.
 432         nop
 433
 434         .data
 435 etrax_irv:
 436         .dword 0
 437
 438 ; Variables for communication with the Axis flash map driver (axisflashmap),
 439 ; and for setting up memory in arch/cris/kernel/setup.c .
 440
 441 ; romfs_start is set to the start of the root file system, if it exists
 442 ; in directly accessible memory (i.e. NOR Flash when booting from Flash,
 443 ; or RAM when booting directly from a network-downloaded RAM image)
 444 romfs_start:
 445         .dword 0
 446
 447 ; romfs_length is set to the size of the root file system image, if it exists
 448 ; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
 449 romfs_length:
 450         .dword 0
 451
 452 ; romfs_in_flash is set to 1 if the root file system resides in directly
 453 ; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
 454 ; or NAND flash boot.
 455 romfs_in_flash:
 456         .dword 0
 457
 458 ; nand_boot is set to 1 when the kernel has been booted from NAND flash
 459 nand_boot:
 460         .dword 0
 461
 462 swapper_pg_dir = 0xc0002000
 463
 464         .section ".init.data", "aw"
 465
 466 #if defined CONFIG_ETRAXFS
 467 #include "../mach-fs/hw_settings.S"
 468 #elif defined CONFIG_CRIS_MACH_ARTPEC3
 469 #include "../mach-a3/hw_settings.S"
 470 #else
 471 #error Only ETRAXFS and ARTPEC-3 supported!
 472 #endif