arch/cris/include/arch-v32/arch/hwregs/asm/irq_nmi_defs_asm.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __irq_nmi_defs_asm_h
   3 #define __irq_nmi_defs_asm_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           ../../mod/irq_nmi.r
   8  *     id:           <not found>
   9  *     last modfied: Thu Jan 22 09:22:43 2004
  10  *
  11  *   by /n/asic/design/tools/rdesc/src/rdes2c -asm --outfile asm/irq_nmi_defs_asm.h ../../mod/irq_nmi.r
  12  *      id: $Id: irq_nmi_defs_asm.h,v 1.1 2005/04/24 18:31:04 starvik Exp $
  13  * Any changes here will be lost.
  14  *
  15  * -*- buffer-read-only: t -*-
  16  */
  17
  18 #ifndef REG_FIELD
  19 #define REG_FIELD( scope, reg, field, value ) \
  20   REG_FIELD_X_( value, reg_##scope##_##reg##___##field##___lsb )
  21 #define REG_FIELD_X_( value, shift ) ((value) << shift)
  22 #endif
  23
  24 #ifndef REG_STATE
  25 #define REG_STATE( scope, reg, field, symbolic_value ) \
  26   REG_STATE_X_( regk_##scope##_##symbolic_value, reg_##scope##_##reg##___##field##___lsb )
  27 #define REG_STATE_X_( k, shift ) (k << shift)
  28 #endif
  29
  30 #ifndef REG_MASK
  31 #define REG_MASK( scope, reg, field ) \
  32   REG_MASK_X_( reg_##scope##_##reg##___##field##___width, reg_##scope##_##reg##___##field##___lsb )
  33 #define REG_MASK_X_( width, lsb ) (((1 << width)-1) << lsb)
  34 #endif
  35
  36 #ifndef REG_LSB
  37 #define REG_LSB( scope, reg, field ) reg_##scope##_##reg##___##field##___lsb
  38 #endif
  39
  40 #ifndef REG_BIT
  41 #define REG_BIT( scope, reg, field ) reg_##scope##_##reg##___##field##___bit
  42 #endif
  43
  44 #ifndef REG_ADDR
  45 #define REG_ADDR( scope, inst, reg ) REG_ADDR_X_(inst, reg_##scope##_##reg##_offset)
  46 #define REG_ADDR_X_( inst, offs ) ((inst) + offs)
  47 #endif
  48
  49 #ifndef REG_ADDR_VECT
  50 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  51          REG_ADDR_VECT_X_(inst, reg_##scope##_##reg##_offset, index, \
  52                          STRIDE_##scope##_##reg )
  53 #define REG_ADDR_VECT_X_( inst, offs, index, stride ) \
  54                           ((inst) + offs + (index) * stride)
  55 #endif
  56
  57 /* Register rw_cmd, scope irq_nmi, type rw */
  58 #define reg_irq_nmi_rw_cmd___delay___lsb 0
  59 #define reg_irq_nmi_rw_cmd___delay___width 16
  60 #define reg_irq_nmi_rw_cmd___op___lsb 16
  61 #define reg_irq_nmi_rw_cmd___op___width 2
  62 #define reg_irq_nmi_rw_cmd_offset 0
  63
  64
  65 /* Constants */
  66 #define regk_irq_nmi_ack_irq                      0x00000002
  67 #define regk_irq_nmi_ack_nmi                      0x00000003
  68 #define regk_irq_nmi_irq                          0x00000000
  69 #define regk_irq_nmi_nmi                          0x00000001
  70 #endif /* __irq_nmi_defs_asm_h */