arch/cris/include/arch-v32/arch/hwregs/iop/iop_fifo_in_extra_defs.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef __iop_fifo_in_extra_defs_h
   3 #define __iop_fifo_in_extra_defs_h
   4
   5 /*
   6  * This file is autogenerated from
   7  *   file:           ../../inst/io_proc/rtl/iop_fifo_in_extra.r
   8  *     id:           <not found>
   9  *     last modfied: Mon Apr 11 16:10:08 2005
  10  *
  11  *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile iop_fifo_in_extra_defs.h ../../inst/io_proc/rtl/iop_fifo_in_extra.r
  12  *      id: $Id: iop_fifo_in_extra_defs.h,v 1.1 2005/04/24 18:31:05 starvik Exp $
  13  * Any changes here will be lost.
  14  *
  15  * -*- buffer-read-only: t -*-
  16  */
  17 /* Main access macros */
  18 #ifndef REG_RD
  19 #define REG_RD( scope, inst, reg ) \
  20   REG_READ( reg_##scope##_##reg, \
  21             (inst) + REG_RD_ADDR_##scope##_##reg )
  22 #endif
  23
  24 #ifndef REG_WR
  25 #define REG_WR( scope, inst, reg, val ) \
  26   REG_WRITE( reg_##scope##_##reg, \
  27              (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  28 #endif
  29
  30 #ifndef REG_RD_VECT
  31 #define REG_RD_VECT( scope, inst, reg, index ) \
  32   REG_READ( reg_##scope##_##reg, \
  33             (inst) + REG_RD_ADDR_##scope##_##reg + \
  34             (index) * STRIDE_##scope##_##reg )
  35 #endif
  36
  37 #ifndef REG_WR_VECT
  38 #define REG_WR_VECT( scope, inst, reg, index, val ) \
  39   REG_WRITE( reg_##scope##_##reg, \
  40              (inst) + REG_WR_ADDR_##scope##_##reg + \
  41              (index) * STRIDE_##scope##_##reg, (val) )
  42 #endif
  43
  44 #ifndef REG_RD_INT
  45 #define REG_RD_INT( scope, inst, reg ) \
  46   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
  47 #endif
  48
  49 #ifndef REG_WR_INT
  50 #define REG_WR_INT( scope, inst, reg, val ) \
  51   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
  52 #endif
  53
  54 #ifndef REG_RD_INT_VECT
  55 #define REG_RD_INT_VECT( scope, inst, reg, index ) \
  56   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
  57             (index) * STRIDE_##scope##_##reg )
  58 #endif
  59
  60 #ifndef REG_WR_INT_VECT
  61 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
  62   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
  63              (index) * STRIDE_##scope##_##reg, (val) )
  64 #endif
  65
  66 #ifndef REG_TYPE_CONV
  67 #define REG_TYPE_CONV( type, orgtype, val ) \
  68   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
  69 #endif
  70
  71 #ifndef reg_page_size
  72 #define reg_page_size 8192
  73 #endif
  74
  75 #ifndef REG_ADDR
  76 #define REG_ADDR( scope, inst, reg ) \
  77   ( (inst) + REG_RD_ADDR_##scope##_##reg )
  78 #endif
  79
  80 #ifndef REG_ADDR_VECT
  81 #define REG_ADDR_VECT( scope, inst, reg, index ) \
  82   ( (inst) + REG_RD_ADDR_##scope##_##reg + \
  83     (index) * STRIDE_##scope##_##reg )
  84 #endif
  85
  86 /* C-code for register scope iop_fifo_in_extra */
  87
  88 /* Register rw_wr_data, scope iop_fifo_in_extra, type rw */
  89 typedef unsigned int reg_iop_fifo_in_extra_rw_wr_data;
  90 #define REG_RD_ADDR_iop_fifo_in_extra_rw_wr_data 0
  91 #define REG_WR_ADDR_iop_fifo_in_extra_rw_wr_data 0
  92
  93 /* Register r_stat, scope iop_fifo_in_extra, type r */
  94 typedef struct {
  95   unsigned int avail_bytes : 4;
  96   unsigned int last        : 8;
  97   unsigned int dif_in_en   : 1;
  98   unsigned int dif_out_en  : 1;
  99   unsigned int dummy1      : 18;
 100 } reg_iop_fifo_in_extra_r_stat;
 101 #define REG_RD_ADDR_iop_fifo_in_extra_r_stat 4
 102
 103 /* Register rw_strb_dif_in, scope iop_fifo_in_extra, type rw */
 104 typedef struct {
 105   unsigned int last : 2;
 106   unsigned int dummy1 : 30;
 107 } reg_iop_fifo_in_extra_rw_strb_dif_in;
 108 #define REG_RD_ADDR_iop_fifo_in_extra_rw_strb_dif_in 8
 109 #define REG_WR_ADDR_iop_fifo_in_extra_rw_strb_dif_in 8
 110
 111 /* Register rw_intr_mask, scope iop_fifo_in_extra, type rw */
 112 typedef struct {
 113   unsigned int urun      : 1;
 114   unsigned int last_data : 1;
 115   unsigned int dav       : 1;
 116   unsigned int avail     : 1;
 117   unsigned int orun      : 1;
 118   unsigned int dummy1    : 27;
 119 } reg_iop_fifo_in_extra_rw_intr_mask;
 120 #define REG_RD_ADDR_iop_fifo_in_extra_rw_intr_mask 12
 121 #define REG_WR_ADDR_iop_fifo_in_extra_rw_intr_mask 12
 122
 123 /* Register rw_ack_intr, scope iop_fifo_in_extra, type rw */
 124 typedef struct {
 125   unsigned int urun      : 1;
 126   unsigned int last_data : 1;
 127   unsigned int dav       : 1;
 128   unsigned int avail     : 1;
 129   unsigned int orun      : 1;
 130   unsigned int dummy1    : 27;
 131 } reg_iop_fifo_in_extra_rw_ack_intr;
 132 #define REG_RD_ADDR_iop_fifo_in_extra_rw_ack_intr 16
 133 #define REG_WR_ADDR_iop_fifo_in_extra_rw_ack_intr 16
 134
 135 /* Register r_intr, scope iop_fifo_in_extra, type r */
 136 typedef struct {
 137   unsigned int urun      : 1;
 138   unsigned int last_data : 1;
 139   unsigned int dav       : 1;
 140   unsigned int avail     : 1;
 141   unsigned int orun      : 1;
 142   unsigned int dummy1    : 27;
 143 } reg_iop_fifo_in_extra_r_intr;
 144 #define REG_RD_ADDR_iop_fifo_in_extra_r_intr 20
 145
 146 /* Register r_masked_intr, scope iop_fifo_in_extra, type r */
 147 typedef struct {
 148   unsigned int urun      : 1;
 149   unsigned int last_data : 1;
 150   unsigned int dav       : 1;
 151   unsigned int avail     : 1;
 152   unsigned int orun      : 1;
 153   unsigned int dummy1    : 27;
 154 } reg_iop_fifo_in_extra_r_masked_intr;
 155 #define REG_RD_ADDR_iop_fifo_in_extra_r_masked_intr 24
 156
 157
 158 /* Constants */
 159 enum {
 160   regk_iop_fifo_in_extra_fifo_in           = 0x00000002,
 161   regk_iop_fifo_in_extra_no                = 0x00000000,
 162   regk_iop_fifo_in_extra_rw_intr_mask_default = 0x00000000,
 163   regk_iop_fifo_in_extra_yes               = 0x00000001
 164 };
 165 #endif /* __iop_fifo_in_extra_defs_h */