arch/cris/include/arch-v32/arch/tlb.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _CRIS_ARCH_TLB_H
   3 #define _CRIS_ARCH_TLB_H
   4
   5 /*
   6  * The TLB is a 64-entry cache. Each entry has a 8-bit page_id that is used
   7  * to store the "process" it belongs to (=> fast mm context switch). The
   8  * last page_id is never used so we can make TLB entries that never matches.
   9  */
  10 #define NUM_TLB_ENTRIES 64
  11 #define NUM_PAGEID 256
  12 #define INVALID_PAGEID 255
  13 #define NO_CONTEXT -1
  14
  15 #endif /* _CRIS_ARCH_TLB_H */