5 select HAVE_ARCH_TRACEHOOK
6 select HAVE_PERF_EVENTS
9 select GENERIC_IRQ_SHOW
10 select HAVE_DEBUG_BUGVERBOSE
11 select ARCH_HAVE_NMI_SAFE_CMPXCHG
12 select GENERIC_CPU_DEVICES
13 select ARCH_HAS_DEVMEM_IS_ALLOWED
14 select ARCH_WANT_IPC_PARSE_VERSION
15 select OLD_SIGSUSPEND3
17 select HAVE_DEBUG_STACKOVERFLOW
18 select ARCH_NO_COHERENT_DMA_MMAP
27 config RWSEM_GENERIC_SPINLOCK
31 config RWSEM_XCHGADD_ALGORITHM
34 config GENERIC_HWEIGHT
38 config GENERIC_CALIBRATE_DELAY
50 config ARCH_HAS_ILOG2_U32
54 config ARCH_HAS_ILOG2_U64
64 source "kernel/Kconfig.freezer"
67 menu "Fujitsu FR-V system setup"
72 This options switches on and off support for the FR-V MMU
73 (effectively switching between vmlinux and uClinux). Not all FR-V
74 CPUs support this. Currently only the FR451 has a sufficiently
77 config FRV_OUTOFLINE_ATOMIC_OPS
78 bool "Out-of-line the FRV atomic operations"
81 Setting this option causes the FR-V atomic operations to be mostly
82 implemented out-of-line.
84 See Documentation/frv/atomic-ops.txt for more information.
87 bool "High memory support"
91 If you wish to use more than 256MB of memory with your MMU based
92 system, you will need to select this option. The kernel can only see
93 the memory between 0xC0000000 and 0xD0000000 directly... everything
96 The arch is, however, capable of supporting up to 3GB of SDRAM.
99 bool "Allocate page tables in highmem"
103 The VM uses one page of memory for each page table. For systems
104 with a lot of RAM, this can be wasteful of precious low memory.
105 Setting this option will put user-space page tables in high memory.
110 prompt "uClinux kernel load address"
112 default UCPAGE_OFFSET_C0000000
114 This option sets the base address for the uClinux kernel. The kernel
115 will rearrange the SDRAM layout to start at this address, and move
116 itself to start there. It must be greater than 0, and it must be
117 sufficiently less than 0xE0000000 that the SDRAM does not intersect
120 The base address must also be aligned such that the SDRAM controller
121 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
123 config UCPAGE_OFFSET_20000000
126 config UCPAGE_OFFSET_40000000
129 config UCPAGE_OFFSET_60000000
132 config UCPAGE_OFFSET_80000000
135 config UCPAGE_OFFSET_A0000000
138 config UCPAGE_OFFSET_C0000000
139 bool "0xC0000000 (Recommended)"
145 default 0x20000000 if UCPAGE_OFFSET_20000000
146 default 0x40000000 if UCPAGE_OFFSET_40000000
147 default 0x60000000 if UCPAGE_OFFSET_60000000
148 default 0x80000000 if UCPAGE_OFFSET_80000000
149 default 0xA0000000 if UCPAGE_OFFSET_A0000000
152 config PROTECT_KERNEL
153 bool "Protect core kernel against userspace"
157 Selecting this option causes the uClinux kernel to change the
158 permittivity of DAMPR register covering the core kernel image to
159 prevent userspace accessing the underlying memory directly.
162 prompt "CPU Caching mode"
163 default FRV_DEFL_CACHE_WBACK
165 This option determines the default caching mode for the kernel.
167 Write-Back caching mode involves the all reads and writes causing
168 the affected cacheline to be read into the cache first before being
169 operated upon. Memory is not then updated by a write until the cache
170 is filled and a cacheline needs to be displaced from the cache to
171 make room. Only at that point is it written back.
173 Write-Behind caching is similar to Write-Back caching, except that a
174 write won't fetch a cacheline into the cache if there isn't already
175 one there; it will write directly to memory instead.
177 Write-Through caching only fetches cachelines from memory on a
178 read. Writes always get written directly to memory. If the affected
179 cacheline is also in cache, it will be updated too.
181 The final option is to turn of caching entirely.
183 Note that not all CPUs support Write-Behind caching. If the CPU on
184 which the kernel is running doesn't, it'll fall back to Write-Back
187 config FRV_DEFL_CACHE_WBACK
190 config FRV_DEFL_CACHE_WBEHIND
193 config FRV_DEFL_CACHE_WTHRU
196 config FRV_DEFL_CACHE_DISABLED
201 menu "CPU core support"
204 bool "Include FR401 core support"
208 This enables support for the FR401, FR401A and FR403 CPUs
211 bool "Include FR405 core support"
215 This enables support for the FR405 CPU
218 bool "Include FR451 core support"
221 This enables support for the FR451 CPU
223 config CPU_FR451_COMPILE
224 bool "Specifically compile for FR451 core"
225 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
228 This causes appropriate flags to be passed to the compiler to
229 optimise for the FR451 CPU
232 bool "Include FR551 core support"
236 This enables support for the FR555 CPU
238 config CPU_FR551_COMPILE
239 bool "Specifically compile for FR551 core"
240 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
243 This causes appropriate flags to be passed to the compiler to
244 optimise for the FR555 CPU
246 config FRV_L1_CACHE_SHIFT
248 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
249 default "6" if CPU_FR551
254 prompt "System support"
258 bool "MB93091 CPU board with or without motherboard"
261 bool "MB93093 PDK unit"
267 prompt "Motherboard support"
271 bool "Use the MB93090-MB00 motherboard"
273 Select this option if the MB93091 CPU board is going to be used with
274 a MB93090-MB00 VDK motherboard
277 bool "Use standalone"
279 Select this option if the MB93091 CPU board is going to be used
280 without a motherboard
285 config FUJITSU_MB93493
286 bool "MB93493 Multimedia chip"
288 Select this option if the MB93493 multimedia chip is going to be
292 prompt "GP-Relative data support"
295 This option controls what data, if any, should be placed in the GP
296 relative data sections. Using this means that the compiler can
297 generate accesses to the data using GR16-relative addressing which
298 is faster than absolute instructions and saves space (2 instructions
301 However, the GPREL region is limited in size because the immediate
302 value used in the load and store instructions is limited to a 12-bit
305 So if the linker starts complaining that accesses to GPREL data are
306 out of range, try changing this option from the default.
308 Note that modules will always be compiled with this feature disabled
309 as the module data will not be in range of the GP base address.
312 bool "Put data objects of up to 8 bytes into GP-REL"
315 bool "Put data objects of up to 4 bytes into GP-REL"
317 config GPREL_DATA_NONE
318 bool "Don't use GP-REL"
322 config FRV_ONCPU_SERIAL
323 bool "Use on-CPU serial ports"
329 depends on MB93090_MB00
331 select GENERIC_PCI_IOMAP
333 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
334 onboard. If you have one of these boards and you wish to use the PCI
335 facilities, say Y here.
337 config RESERVE_DMA_COHERENT
338 bool "Reserve DMA coherent memory"
339 depends on PCI && !MMU
342 Many PCI drivers require access to uncached memory for DMA device
343 communications (such as is done with some Ethernet buffer rings). If
344 a fully featured MMU is available, this can be done through page
345 table settings, but if not, a region has to be set aside and marked
346 with a special DAMPR register.
348 Setting this option causes uClinux to set aside a portion of the
349 available memory for use in this manner. The memory will then be
350 unavailable for normal kernel use.
352 source "drivers/pci/Kconfig"
354 source "drivers/pcmcia/Kconfig"
356 menu "Power management options"
358 config ARCH_SUSPEND_POSSIBLE
361 source kernel/power/Kconfig
367 menu "Executable formats"
369 source "fs/Kconfig.binfmt"
375 source "drivers/Kconfig"
379 source "arch/frv/Kconfig.debug"
381 source "security/Kconfig"
383 source "crypto/Kconfig"