5 select HAVE_ARCH_TRACEHOOK
6 select HAVE_PERF_EVENTS
9 select GENERIC_IRQ_SHOW
10 select HAVE_DEBUG_BUGVERBOSE
11 select ARCH_HAVE_NMI_SAFE_CMPXCHG
12 select GENERIC_CPU_DEVICES
13 select ARCH_HAS_DEVMEM_IS_ALLOWED
14 select ARCH_WANT_IPC_PARSE_VERSION
15 select OLD_SIGSUSPEND3
17 select HAVE_DEBUG_STACKOVERFLOW
18 select ARCH_NO_COHERENT_DMA_MMAP
24 config RWSEM_GENERIC_SPINLOCK
28 config RWSEM_XCHGADD_ALGORITHM
31 config GENERIC_HWEIGHT
35 config GENERIC_CALIBRATE_DELAY
47 config ARCH_HAS_ILOG2_U32
51 config ARCH_HAS_ILOG2_U64
61 source "kernel/Kconfig.freezer"
64 menu "Fujitsu FR-V system setup"
69 This options switches on and off support for the FR-V MMU
70 (effectively switching between vmlinux and uClinux). Not all FR-V
71 CPUs support this. Currently only the FR451 has a sufficiently
74 config FRV_OUTOFLINE_ATOMIC_OPS
75 bool "Out-of-line the FRV atomic operations"
78 Setting this option causes the FR-V atomic operations to be mostly
79 implemented out-of-line.
81 See Documentation/frv/atomic-ops.txt for more information.
84 bool "High memory support"
88 If you wish to use more than 256MB of memory with your MMU based
89 system, you will need to select this option. The kernel can only see
90 the memory between 0xC0000000 and 0xD0000000 directly... everything
93 The arch is, however, capable of supporting up to 3GB of SDRAM.
96 bool "Allocate page tables in highmem"
100 The VM uses one page of memory for each page table. For systems
101 with a lot of RAM, this can be wasteful of precious low memory.
102 Setting this option will put user-space page tables in high memory.
107 prompt "uClinux kernel load address"
109 default UCPAGE_OFFSET_C0000000
111 This option sets the base address for the uClinux kernel. The kernel
112 will rearrange the SDRAM layout to start at this address, and move
113 itself to start there. It must be greater than 0, and it must be
114 sufficiently less than 0xE0000000 that the SDRAM does not intersect
117 The base address must also be aligned such that the SDRAM controller
118 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
120 config UCPAGE_OFFSET_20000000
123 config UCPAGE_OFFSET_40000000
126 config UCPAGE_OFFSET_60000000
129 config UCPAGE_OFFSET_80000000
132 config UCPAGE_OFFSET_A0000000
135 config UCPAGE_OFFSET_C0000000
136 bool "0xC0000000 (Recommended)"
142 default 0x20000000 if UCPAGE_OFFSET_20000000
143 default 0x40000000 if UCPAGE_OFFSET_40000000
144 default 0x60000000 if UCPAGE_OFFSET_60000000
145 default 0x80000000 if UCPAGE_OFFSET_80000000
146 default 0xA0000000 if UCPAGE_OFFSET_A0000000
149 config PROTECT_KERNEL
150 bool "Protect core kernel against userspace"
154 Selecting this option causes the uClinux kernel to change the
155 permittivity of DAMPR register covering the core kernel image to
156 prevent userspace accessing the underlying memory directly.
159 prompt "CPU Caching mode"
160 default FRV_DEFL_CACHE_WBACK
162 This option determines the default caching mode for the kernel.
164 Write-Back caching mode involves the all reads and writes causing
165 the affected cacheline to be read into the cache first before being
166 operated upon. Memory is not then updated by a write until the cache
167 is filled and a cacheline needs to be displaced from the cache to
168 make room. Only at that point is it written back.
170 Write-Behind caching is similar to Write-Back caching, except that a
171 write won't fetch a cacheline into the cache if there isn't already
172 one there; it will write directly to memory instead.
174 Write-Through caching only fetches cachelines from memory on a
175 read. Writes always get written directly to memory. If the affected
176 cacheline is also in cache, it will be updated too.
178 The final option is to turn of caching entirely.
180 Note that not all CPUs support Write-Behind caching. If the CPU on
181 which the kernel is running doesn't, it'll fall back to Write-Back
184 config FRV_DEFL_CACHE_WBACK
187 config FRV_DEFL_CACHE_WBEHIND
190 config FRV_DEFL_CACHE_WTHRU
193 config FRV_DEFL_CACHE_DISABLED
198 menu "CPU core support"
201 bool "Include FR401 core support"
205 This enables support for the FR401, FR401A and FR403 CPUs
208 bool "Include FR405 core support"
212 This enables support for the FR405 CPU
215 bool "Include FR451 core support"
218 This enables support for the FR451 CPU
220 config CPU_FR451_COMPILE
221 bool "Specifically compile for FR451 core"
222 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
225 This causes appropriate flags to be passed to the compiler to
226 optimise for the FR451 CPU
229 bool "Include FR551 core support"
233 This enables support for the FR555 CPU
235 config CPU_FR551_COMPILE
236 bool "Specifically compile for FR551 core"
237 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
240 This causes appropriate flags to be passed to the compiler to
241 optimise for the FR555 CPU
243 config FRV_L1_CACHE_SHIFT
245 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
246 default "6" if CPU_FR551
251 prompt "System support"
255 bool "MB93091 CPU board with or without motherboard"
258 bool "MB93093 PDK unit"
264 prompt "Motherboard support"
268 bool "Use the MB93090-MB00 motherboard"
270 Select this option if the MB93091 CPU board is going to be used with
271 a MB93090-MB00 VDK motherboard
274 bool "Use standalone"
276 Select this option if the MB93091 CPU board is going to be used
277 without a motherboard
282 config FUJITSU_MB93493
283 bool "MB93493 Multimedia chip"
285 Select this option if the MB93493 multimedia chip is going to be
289 prompt "GP-Relative data support"
292 This option controls what data, if any, should be placed in the GP
293 relative data sections. Using this means that the compiler can
294 generate accesses to the data using GR16-relative addressing which
295 is faster than absolute instructions and saves space (2 instructions
298 However, the GPREL region is limited in size because the immediate
299 value used in the load and store instructions is limited to a 12-bit
302 So if the linker starts complaining that accesses to GPREL data are
303 out of range, try changing this option from the default.
305 Note that modules will always be compiled with this feature disabled
306 as the module data will not be in range of the GP base address.
309 bool "Put data objects of up to 8 bytes into GP-REL"
312 bool "Put data objects of up to 4 bytes into GP-REL"
314 config GPREL_DATA_NONE
315 bool "Don't use GP-REL"
319 config FRV_ONCPU_SERIAL
320 bool "Use on-CPU serial ports"
326 depends on MB93090_MB00
328 select GENERIC_PCI_IOMAP
330 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
331 onboard. If you have one of these boards and you wish to use the PCI
332 facilities, say Y here.
334 config RESERVE_DMA_COHERENT
335 bool "Reserve DMA coherent memory"
336 depends on PCI && !MMU
339 Many PCI drivers require access to uncached memory for DMA device
340 communications (such as is done with some Ethernet buffer rings). If
341 a fully featured MMU is available, this can be done through page
342 table settings, but if not, a region has to be set aside and marked
343 with a special DAMPR register.
345 Setting this option causes uClinux to set aside a portion of the
346 available memory for use in this manner. The memory will then be
347 unavailable for normal kernel use.
349 source "drivers/pci/Kconfig"
351 source "drivers/pcmcia/Kconfig"
353 menu "Power management options"
355 config ARCH_SUSPEND_POSSIBLE
358 source kernel/power/Kconfig
364 menu "Executable formats"
366 source "fs/Kconfig.binfmt"
372 source "drivers/Kconfig"
376 source "arch/frv/Kconfig.debug"
378 source "security/Kconfig"
380 source "crypto/Kconfig"