arch/i386/kernel/cpu/changelog

   1 /*
   2  *  Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
   3  *  and Martin Mares, November 1997.
   4  *
   5  *  Force Cyrix 6x86(MX) and M II processors to report MTRR capability
   6  *  and Cyrix "coma bug" recognition by
   7  *  Zoltán Böszörményi <zboszor@mail.externet.hu> February 1999.
   8  *
   9  *  Force Centaur C6 processors to report MTRR capability.
  10  *  Bart Hartgers <bart@etpmod.phys.tue.nl>, May 1999.
  11  *
  12  *  Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
  13  *
  14  *  IDT Winchip tweaks, misc clean ups.
  15  *  Dave Jones <davej@suse.de>, August 1999
  16  *
  17  *  Better detection of Centaur/IDT WinChip models.
  18  *  Bart Hartgers <bart@etpmod.phys.tue.nl>, August 1999.
  19  *
  20  *  Cleaned up cache-detection code
  21  *  Dave Jones <davej@suse.de>, October 1999
  22  *
  23  *  Added proper L2 cache detection for Coppermine
  24  *  Dragan Stancevic <visitor@valinux.com>, October 1999
  25  *
  26  *  Added the original array for capability flags but forgot to credit
  27  *  myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
  28  *  Jauder Ho <jauderho@carumba.com>, January 2000
  29  *
  30  *  Detection for Celeron coppermine, identify_cpu() overhauled,
  31  *  and a few other clean ups.
  32  *  Dave Jones <davej@suse.de>, April 2000
  33  *
  34  *  Pentium III FXSR, SSE support
  35  *  General FPU state handling cleanups
  36  *  Gareth Hughes <gareth@valinux.com>, May 2000
  37  *
  38  *  Added proper Cascades CPU and L2 cache detection for Cascades
  39  *  and 8-way type cache happy bunch from Intel:^)
  40  *  Dragan Stancevic <visitor@valinux.com>, May 2000
  41  *
  42  *  Forward port AMD Duron errata T13 from 2.2.17pre
  43  *  Dave Jones <davej@suse.de>, August 2000
  44  *
  45  *  Forward port lots of fixes/improvements from 2.2.18pre
  46  *  Cyrix III, Pentium IV support.
  47  *  Dave Jones <davej@suse.de>, October 2000
  48  *
  49  *  Massive cleanup of CPU detection and bug handling;
  50  *  Transmeta CPU detection,
  51  *  H. Peter Anvin <hpa@zytor.com>, November 2000
  52  *
  53  *  VIA C3 Support.
  54  *  Dave Jones <davej@suse.de>, March 2001
  55  *
  56  *  AMD Athlon/Duron/Thunderbird bluesmoke support.
  57  *  Dave Jones <davej@suse.de>, April 2001.
  58  *
  59  *  CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
  60  *  Dave Jones <davej@suse.de>, September, October 2001.
  61  *
  62  */
  63