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1 /*
2 * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
28 #include <linux/kernel.h>
29 #include <linux/module.h>
30 #include <linux/init.h>
31 #include <linux/smp.h>
32 #include <linux/sched.h>
33 #include <linux/cpufreq.h>
34 #include <linux/compiler.h>
35 #include <linux/dmi.h>
36
37 #include <linux/acpi.h>
38 #include <acpi/processor.h>
39
40 #include <asm/io.h>
41 #include <asm/msr.h>
42 #include <asm/processor.h>
43 #include <asm/cpufeature.h>
44 #include <asm/delay.h>
45 #include <asm/uaccess.h>
46
47 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
48
49 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51 MODULE_LICENSE("GPL");
52
53 enum {
54 UNDEFINED_CAPABLE = 0,
55 SYSTEM_INTEL_MSR_CAPABLE,
56 SYSTEM_IO_CAPABLE,
57 };
58
59 #define INTEL_MSR_RANGE (0xffff)
60 #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
61
62 struct acpi_cpufreq_data {
63 struct acpi_processor_performance *acpi_data;
64 struct cpufreq_frequency_table *freq_table;
65 unsigned int max_freq;
66 unsigned int resume;
67 unsigned int cpu_feature;
68 };
69
70 static struct acpi_cpufreq_data *drv_data[NR_CPUS];
71 static struct acpi_processor_performance *acpi_perf_data[NR_CPUS];
72
73 static struct cpufreq_driver acpi_cpufreq_driver;
74
75 static unsigned int acpi_pstate_strict;
76
77 static int check_est_cpu(unsigned int cpuid)
78 {
79 struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
80
81 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
82 !cpu_has(cpu, X86_FEATURE_EST))
83 return 0;
84
85 return 1;
86 }
87
88 static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
89 {
90 struct acpi_processor_performance *perf;
91 int i;
92
93 perf = data->acpi_data;
94
95 for (i=0; i<perf->state_count; i++) {
96 if (value == perf->states[i].status)
97 return data->freq_table[i].frequency;
98 }
99 return 0;
100 }
101
102 static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
103 {
104 int i;
105 struct acpi_processor_performance *perf;
106
107 msr &= INTEL_MSR_RANGE;
108 perf = data->acpi_data;
109
110 for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
111 if (msr == perf->states[data->freq_table[i].index].status)
112 return data->freq_table[i].frequency;
113 }
114 return data->freq_table[0].frequency;
115 }
116
117 static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
118 {
119 switch (data->cpu_feature) {
120 case SYSTEM_INTEL_MSR_CAPABLE:
121 return extract_msr(val, data);
122 case SYSTEM_IO_CAPABLE:
123 return extract_io(val, data);
124 default:
125 return 0;
126 }
127 }
128
129 struct msr_addr {
130 u32 reg;
131 };
132
133 struct io_addr {
134 u16 port;
135 u8 bit_width;
136 };
137
138 typedef union {
139 struct msr_addr msr;
140 struct io_addr io;
141 } drv_addr_union;
142
143 struct drv_cmd {
144 unsigned int type;
145 cpumask_t mask;
146 drv_addr_union addr;
147 u32 val;
148 };
149
150 static void do_drv_read(struct drv_cmd *cmd)
151 {
152 u32 h;
153
154 switch (cmd->type) {
155 case SYSTEM_INTEL_MSR_CAPABLE:
156 rdmsr(cmd->addr.msr.reg, cmd->val, h);
157 break;
158 case SYSTEM_IO_CAPABLE:
159 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
160 &cmd->val,
161 (u32)cmd->addr.io.bit_width);
162 break;
163 default:
164 break;
165 }
166 }
167
168 static void do_drv_write(struct drv_cmd *cmd)
169 {
170 u32 h = 0;
171
172 switch (cmd->type) {
173 case SYSTEM_INTEL_MSR_CAPABLE:
174 wrmsr(cmd->addr.msr.reg, cmd->val, h);
175 break;
176 case SYSTEM_IO_CAPABLE:
177 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
178 cmd->val,
179 (u32)cmd->addr.io.bit_width);
180 break;
181 default:
182 break;
183 }
184 }
185
186 static void drv_read(struct drv_cmd *cmd)
187 {
188 cpumask_t saved_mask = current->cpus_allowed;
189 cmd->val = 0;
190
191 set_cpus_allowed(current, cmd->mask);
192 do_drv_read(cmd);
193 set_cpus_allowed(current, saved_mask);
194 }
195
196 static void drv_write(struct drv_cmd *cmd)
197 {
198 cpumask_t saved_mask = current->cpus_allowed;
199 unsigned int i;
200
201 for_each_cpu_mask(i, cmd->mask) {
202 set_cpus_allowed(current, cpumask_of_cpu(i));
203 do_drv_write(cmd);
204 }
205
206 set_cpus_allowed(current, saved_mask);
207 return;
208 }
209
210 static u32 get_cur_val(cpumask_t mask)
211 {
212 struct acpi_processor_performance *perf;
213 struct drv_cmd cmd;
214
215 if (unlikely(cpus_empty(mask)))
216 return 0;
217
218 switch (drv_data[first_cpu(mask)]->cpu_feature) {
219 case SYSTEM_INTEL_MSR_CAPABLE:
220 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
221 cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
222 break;
223 case SYSTEM_IO_CAPABLE:
224 cmd.type = SYSTEM_IO_CAPABLE;
225 perf = drv_data[first_cpu(mask)]->acpi_data;
226 cmd.addr.io.port = perf->control_register.address;
227 cmd.addr.io.bit_width = perf->control_register.bit_width;
228 break;
229 default:
230 return 0;
231 }
232
233 cmd.mask = mask;
234
235 drv_read(&cmd);
236
237 dprintk("get_cur_val = %u\n", cmd.val);
238
239 return cmd.val;
240 }
241
242 /*
243 * Return the measured active (C0) frequency on this CPU since last call
244 * to this function.
245 * Input: cpu number
246 * Return: Average CPU frequency in terms of max frequency (zero on error)
247 *
248 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
249 * over a period of time, while CPU is in C0 state.
250 * IA32_MPERF counts at the rate of max advertised frequency
251 * IA32_APERF counts at the rate of actual CPU frequency
252 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
253 * no meaning should be associated with absolute values of these MSRs.
254 */
255 static unsigned int get_measured_perf(unsigned int cpu)
256 {
257 union {
258 struct {
259 u32 lo;
260 u32 hi;
261 } split;
262 u64 whole;
263 } aperf_cur, mperf_cur;
264
265 cpumask_t saved_mask;
266 unsigned int perf_percent;
267 unsigned int retval;
268
269 saved_mask = current->cpus_allowed;
270 set_cpus_allowed(current, cpumask_of_cpu(cpu));
271 if (get_cpu() != cpu) {
272 /* We were not able to run on requested processor */
273 put_cpu();
274 return 0;
275 }
276
277 rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
278 rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
279
280 wrmsr(MSR_IA32_APERF, 0,0);
281 wrmsr(MSR_IA32_MPERF, 0,0);
282
283 #ifdef __i386__
284 /*
285 * We dont want to do 64 bit divide with 32 bit kernel
286 * Get an approximate value. Return failure in case we cannot get
287 * an approximate value.
288 */
289 if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
290 int shift_count;
291 u32 h;
292
293 h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
294 shift_count = fls(h);
295
296 aperf_cur.whole >>= shift_count;
297 mperf_cur.whole >>= shift_count;
298 }
299
300 if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
301 int shift_count = 7;
302 aperf_cur.split.lo >>= shift_count;
303 mperf_cur.split.lo >>= shift_count;
304 }
305
306 if (aperf_cur.split.lo && mperf_cur.split.lo)
307 perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
308 else
309 perf_percent = 0;
310
311 #else
312 if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
313 int shift_count = 7;
314 aperf_cur.whole >>= shift_count;
315 mperf_cur.whole >>= shift_count;
316 }
317
318 if (aperf_cur.whole && mperf_cur.whole)
319 perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
320 else
321 perf_percent = 0;
322
323 #endif
324
325 retval = drv_data[cpu]->max_freq * perf_percent / 100;
326
327 put_cpu();
328 set_cpus_allowed(current, saved_mask);
329
330 dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
331 return retval;
332 }
333
334 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
335 {
336 struct acpi_cpufreq_data *data = drv_data[cpu];
337 unsigned int freq;
338
339 dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
340
341 if (unlikely(data == NULL ||
342 data->acpi_data == NULL || data->freq_table == NULL)) {
343 return 0;
344 }
345
346 freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
347 dprintk("cur freq = %u\n", freq);
348
349 return freq;
350 }
351
352 static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
353 struct acpi_cpufreq_data *data)
354 {
355 unsigned int cur_freq;
356 unsigned int i;
357
358 for (i=0; i<100; i++) {
359 cur_freq = extract_freq(get_cur_val(mask), data);
360 if (cur_freq == freq)
361 return 1;
362 udelay(10);
363 }
364 return 0;
365 }
366
367 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
368 unsigned int target_freq, unsigned int relation)
369 {
370 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
371 struct acpi_processor_performance *perf;
372 struct cpufreq_freqs freqs;
373 cpumask_t online_policy_cpus;
374 struct drv_cmd cmd;
375 unsigned int msr;
376 unsigned int next_state = 0; /* Index into freq_table */
377 unsigned int next_perf_state = 0; /* Index into perf table */
378 unsigned int i;
379 int result = 0;
380
381 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
382
383 if (unlikely(data == NULL ||
384 data->acpi_data == NULL || data->freq_table == NULL)) {
385 return -ENODEV;
386 }
387
388 perf = data->acpi_data;
389 result = cpufreq_frequency_table_target(policy,
390 data->freq_table,
391 target_freq,
392 relation, &next_state);
393 if (unlikely(result))
394 return -ENODEV;
395
396 #ifdef CONFIG_HOTPLUG_CPU
397 /* cpufreq holds the hotplug lock, so we are safe from here on */
398 cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
399 #else
400 online_policy_cpus = policy->cpus;
401 #endif
402
403 next_perf_state = data->freq_table[next_state].index;
404 if (perf->state == next_perf_state) {
405 if (unlikely(data->resume)) {
406 dprintk("Called after resume, resetting to P%d\n",
407 next_perf_state);
408 data->resume = 0;
409 } else {
410 dprintk("Already at target state (P%d)\n",
411 next_perf_state);
412 return 0;
413 }
414 }
415
416 switch (data->cpu_feature) {
417 case SYSTEM_INTEL_MSR_CAPABLE:
418 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
419 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
420 msr =
421 (u32) perf->states[next_perf_state].
422 control & INTEL_MSR_RANGE;
423 cmd.val = get_cur_val(online_policy_cpus);
424 cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr;
425 break;
426 case SYSTEM_IO_CAPABLE:
427 cmd.type = SYSTEM_IO_CAPABLE;
428 cmd.addr.io.port = perf->control_register.address;
429 cmd.addr.io.bit_width = perf->control_register.bit_width;
430 cmd.val = (u32) perf->states[next_perf_state].control;
431 break;
432 default:
433 return -ENODEV;
434 }
435
436 cpus_clear(cmd.mask);
437
438 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
439 cmd.mask = online_policy_cpus;
440 else
441 cpu_set(policy->cpu, cmd.mask);
442
443 freqs.old = perf->states[perf->state].core_frequency * 1000;
444 freqs.new = data->freq_table[next_state].frequency;
445 for_each_cpu_mask(i, cmd.mask) {
446 freqs.cpu = i;
447 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
448 }
449
450 drv_write(&cmd);
451
452 if (acpi_pstate_strict) {
453 if (!check_freqs(cmd.mask, freqs.new, data)) {
454 dprintk("acpi_cpufreq_target failed (%d)\n",
455 policy->cpu);
456 return -EAGAIN;
457 }
458 }
459
460 for_each_cpu_mask(i, cmd.mask) {
461 freqs.cpu = i;
462 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
463 }
464 perf->state = next_perf_state;
465
466 return result;
467 }
468
469 static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
470 {
471 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
472
473 dprintk("acpi_cpufreq_verify\n");
474
475 return cpufreq_frequency_table_verify(policy, data->freq_table);
476 }
477
478 static unsigned long
479 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
480 {
481 struct acpi_processor_performance *perf = data->acpi_data;
482
483 if (cpu_khz) {
484 /* search the closest match to cpu_khz */
485 unsigned int i;
486 unsigned long freq;
487 unsigned long freqn = perf->states[0].core_frequency * 1000;
488
489 for (i=0; i<(perf->state_count-1); i++) {
490 freq = freqn;
491 freqn = perf->states[i+1].core_frequency * 1000;
492 if ((2 * cpu_khz) > (freqn + freq)) {
493 perf->state = i;
494 return freq;
495 }
496 }
497 perf->state = perf->state_count-1;
498 return freqn;
499 } else {
500 /* assume CPU is at P0... */
501 perf->state = 0;
502 return perf->states[0].core_frequency * 1000;
503 }
504 }
505
506 /*
507 * acpi_cpufreq_early_init - initialize ACPI P-States library
508 *
509 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
510 * in order to determine correct frequency and voltage pairings. We can
511 * do _PDC and _PSD and find out the processor dependency for the
512 * actual init that will happen later...
513 */
514 static int acpi_cpufreq_early_init(void)
515 {
516 struct acpi_processor_performance *data;
517 cpumask_t covered;
518 unsigned int i, j;
519
520 dprintk("acpi_cpufreq_early_init\n");
521
522 for_each_possible_cpu(i) {
523 data = kzalloc(sizeof(struct acpi_processor_performance),
524 GFP_KERNEL);
525 if (!data) {
526 for_each_cpu_mask(j, covered) {
527 kfree(acpi_perf_data[j]);
528 acpi_perf_data[j] = NULL;
529 }
530 return -ENOMEM;
531 }
532 acpi_perf_data[i] = data;
533 cpu_set(i, covered);
534 }
535
536 /* Do initialization in ACPI core */
537 acpi_processor_preregister_performance(acpi_perf_data);
538 return 0;
539 }
540
541 #ifdef CONFIG_SMP
542 /*
543 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
544 * or do it in BIOS firmware and won't inform about it to OS. If not
545 * detected, this has a side effect of making CPU run at a different speed
546 * than OS intended it to run at. Detect it and handle it cleanly.
547 */
548 static int bios_with_sw_any_bug;
549
550 static int sw_any_bug_found(struct dmi_system_id *d)
551 {
552 bios_with_sw_any_bug = 1;
553 return 0;
554 }
555
556 static struct dmi_system_id sw_any_bug_dmi_table[] = {
557 {
558 .callback = sw_any_bug_found,
559 .ident = "Supermicro Server X6DLP",
560 .matches = {
561 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
562 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
563 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
564 },
565 },
566 { }
567 };
568 #endif
569
570 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
571 {
572 unsigned int i;
573 unsigned int valid_states = 0;
574 unsigned int cpu = policy->cpu;
575 struct acpi_cpufreq_data *data;
576 unsigned int result = 0;
577 struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
578 struct acpi_processor_performance *perf;
579
580 dprintk("acpi_cpufreq_cpu_init\n");
581
582 if (!acpi_perf_data[cpu])
583 return -ENODEV;
584
585 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
586 if (!data)
587 return -ENOMEM;
588
589 data->acpi_data = acpi_perf_data[cpu];
590 drv_data[cpu] = data;
591
592 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
593 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
594
595 result = acpi_processor_register_performance(data->acpi_data, cpu);
596 if (result)
597 goto err_free;
598
599 perf = data->acpi_data;
600 policy->shared_type = perf->shared_type;
601
602 /*
603 * Will let policy->cpus know about dependency only when software
604 * coordination is required.
605 */
606 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
607 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
608 policy->cpus = perf->shared_cpu_map;
609 }
610
611 #ifdef CONFIG_SMP
612 dmi_check_system(sw_any_bug_dmi_table);
613 if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
614 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
615 policy->cpus = cpu_core_map[cpu];
616 }
617 #endif
618
619 /* capability check */
620 if (perf->state_count <= 1) {
621 dprintk("No P-States\n");
622 result = -ENODEV;
623 goto err_unreg;
624 }
625
626 if (perf->control_register.space_id != perf->status_register.space_id) {
627 result = -ENODEV;
628 goto err_unreg;
629 }
630
631 switch (perf->control_register.space_id) {
632 case ACPI_ADR_SPACE_SYSTEM_IO:
633 dprintk("SYSTEM IO addr space\n");
634 data->cpu_feature = SYSTEM_IO_CAPABLE;
635 break;
636 case ACPI_ADR_SPACE_FIXED_HARDWARE:
637 dprintk("HARDWARE addr space\n");
638 if (!check_est_cpu(cpu)) {
639 result = -ENODEV;
640 goto err_unreg;
641 }
642 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
643 break;
644 default:
645 dprintk("Unknown addr space %d\n",
646 (u32) (perf->control_register.space_id));
647 result = -ENODEV;
648 goto err_unreg;
649 }
650
651 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
652 (perf->state_count+1), GFP_KERNEL);
653 if (!data->freq_table) {
654 result = -ENOMEM;
655 goto err_unreg;
656 }
657
658 /* detect transition latency */
659 policy->cpuinfo.transition_latency = 0;
660 for (i=0; i<perf->state_count; i++) {
661 if ((perf->states[i].transition_latency * 1000) >
662 policy->cpuinfo.transition_latency)
663 policy->cpuinfo.transition_latency =
664 perf->states[i].transition_latency * 1000;
665 }
666 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
667
668 data->max_freq = perf->states[0].core_frequency * 1000;
669 /* table init */
670 for (i=0; i<perf->state_count; i++) {
671 if (i>0 && perf->states[i].core_frequency ==
672 perf->states[i-1].core_frequency)
673 continue;
674
675 data->freq_table[valid_states].index = i;
676 data->freq_table[valid_states].frequency =
677 perf->states[i].core_frequency * 1000;
678 valid_states++;
679 }
680 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
681 perf->state = 0;
682
683 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
684 if (result)
685 goto err_freqfree;
686
687 switch (perf->control_register.space_id) {
688 case ACPI_ADR_SPACE_SYSTEM_IO:
689 /* Current speed is unknown and not detectable by IO port */
690 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
691 break;
692 case ACPI_ADR_SPACE_FIXED_HARDWARE:
693 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
694 policy->cur = get_cur_freq_on_cpu(cpu);
695 break;
696 default:
697 break;
698 }
699
700 /* notify BIOS that we exist */
701 acpi_processor_notify_smm(THIS_MODULE);
702
703 /* Check for APERF/MPERF support in hardware */
704 if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
705 unsigned int ecx;
706 ecx = cpuid_ecx(6);
707 if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
708 acpi_cpufreq_driver.getavg = get_measured_perf;
709 }
710
711 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
712 for (i = 0; i < perf->state_count; i++)
713 dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
714 (i == perf->state ? '*' : ' '), i,
715 (u32) perf->states[i].core_frequency,
716 (u32) perf->states[i].power,
717 (u32) perf->states[i].transition_latency);
718
719 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
720
721 /*
722 * the first call to ->target() should result in us actually
723 * writing something to the appropriate registers.
724 */
725 data->resume = 1;
726
727 return result;
728
729 err_freqfree:
730 kfree(data->freq_table);
731 err_unreg:
732 acpi_processor_unregister_performance(perf, cpu);
733 err_free:
734 kfree(data);
735 drv_data[cpu] = NULL;
736
737 return result;
738 }
739
740 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
741 {
742 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
743
744 dprintk("acpi_cpufreq_cpu_exit\n");
745
746 if (data) {
747 cpufreq_frequency_table_put_attr(policy->cpu);
748 drv_data[policy->cpu] = NULL;
749 acpi_processor_unregister_performance(data->acpi_data,
750 policy->cpu);
751 kfree(data);
752 }
753
754 return 0;
755 }
756
757 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
758 {
759 struct acpi_cpufreq_data *data = drv_data[policy->cpu];
760
761 dprintk("acpi_cpufreq_resume\n");
762
763 data->resume = 1;
764
765 return 0;
766 }
767
768 static struct freq_attr *acpi_cpufreq_attr[] = {
769 &cpufreq_freq_attr_scaling_available_freqs,
770 NULL,
771 };
772
773 static struct cpufreq_driver acpi_cpufreq_driver = {
774 .verify = acpi_cpufreq_verify,
775 .target = acpi_cpufreq_target,
776 .init = acpi_cpufreq_cpu_init,
777 .exit = acpi_cpufreq_cpu_exit,
778 .resume = acpi_cpufreq_resume,
779 .name = "acpi-cpufreq",
780 .owner = THIS_MODULE,
781 .attr = acpi_cpufreq_attr,
782 };
783
784 static int __init acpi_cpufreq_init(void)
785 {
786 dprintk("acpi_cpufreq_init\n");
787
788 acpi_cpufreq_early_init();
789
790 return cpufreq_register_driver(&acpi_cpufreq_driver);
791 }
792
793 static void __exit acpi_cpufreq_exit(void)
794 {
795 unsigned int i;
796 dprintk("acpi_cpufreq_exit\n");
797
798 cpufreq_unregister_driver(&acpi_cpufreq_driver);
799
800 for_each_possible_cpu(i) {
801 kfree(acpi_perf_data[i]);
802 acpi_perf_data[i] = NULL;
803 }
804 return;
805 }
806
807 module_param(acpi_pstate_strict, uint, 0644);
808 MODULE_PARM_DESC(acpi_pstate_strict,
809 "value 0 or non-zero. non-zero -> strict ACPI checks are "
810 "performed during frequency changes.");
811
812 late_initcall(acpi_cpufreq_init);
813 module_exit(acpi_cpufreq_exit);
814
815 MODULE_ALIAS("acpi");