arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c

   1 /*
   2  * cpufreq driver for Enhanced SpeedStep, as found in Intel's Pentium
   3  * M (part of the Centrino chipset).
   4  *
   5  * Despite the "SpeedStep" in the name, this is almost entirely unlike
   6  * traditional SpeedStep.
   7  *
   8  * Modelled on speedstep.c
   9  *
  10  * Copyright (C) 2003 Jeremy Fitzhardinge <jeremy@goop.org>
  11  *
  12  * WARNING WARNING WARNING
  13  *
  14  * This driver manipulates the PERF_CTL MSR, which is only somewhat
  15  * documented.  While it seems to work on my laptop, it has not been
  16  * tested anywhere else, and it may not work for you, do strange
  17  * things or simply crash.
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/module.h>
  22 #include <linux/init.h>
  23 #include <linux/cpufreq.h>
  24 #include <linux/config.h>
  25 #include <linux/delay.h>
  26 #include <linux/compiler.h>
  27
  28 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
  29 #include <linux/acpi.h>
  30 #include <acpi/processor.h>
  31 #endif
  32
  33 #include <asm/msr.h>
  34 #include <asm/processor.h>
  35 #include <asm/cpufeature.h>
  36
  37 #include "speedstep-est-common.h"
  38
  39 #define PFX             "speedstep-centrino: "
  40 #define MAINTAINER      "Jeremy Fitzhardinge <jeremy@goop.org>"
  41
  42 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-centrino", msg)
  43
  44
  45 struct cpu_id
  46 {
  47         __u8    x86;            /* CPU family */
  48         __u8    x86_model;      /* model */
  49         __u8    x86_mask;       /* stepping */
  50 };
  51
  52 enum {
  53         CPU_BANIAS,
  54         CPU_DOTHAN_A1,
  55         CPU_DOTHAN_A2,
  56         CPU_DOTHAN_B0,
  57 };
  58
  59 static const struct cpu_id cpu_ids[] = {
  60         [CPU_BANIAS]    = { 6,  9, 5 },
  61         [CPU_DOTHAN_A1] = { 6, 13, 1 },
  62         [CPU_DOTHAN_A2] = { 6, 13, 2 },
  63         [CPU_DOTHAN_B0] = { 6, 13, 6 },
  64 };
  65 #define N_IDS   (sizeof(cpu_ids)/sizeof(cpu_ids[0]))
  66
  67 struct cpu_model
  68 {
  69         const struct cpu_id *cpu_id;
  70         const char      *model_name;
  71         unsigned        max_freq; /* max clock in kHz */
  72
  73         struct cpufreq_frequency_table *op_points; /* clock/voltage pairs */
  74 };
  75 static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x);
  76
  77 /* Operating points for current CPU */
  78 static struct cpu_model *centrino_model[NR_CPUS];
  79 static const struct cpu_id *centrino_cpu[NR_CPUS];
  80
  81 static struct cpufreq_driver centrino_driver;
  82
  83 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE
  84
  85 /* Computes the correct form for IA32_PERF_CTL MSR for a particular
  86    frequency/voltage operating point; frequency in MHz, volts in mV.
  87    This is stored as "index" in the structure. */
  88 #define OP(mhz, mv)                                                     \
  89         {                                                               \
  90                 .frequency = (mhz) * 1000,                              \
  91                 .index = (((mhz)/100) << 8) | ((mv - 700) / 16)         \
  92         }
  93
  94 /*
  95  * These voltage tables were derived from the Intel Pentium M
  96  * datasheet, document 25261202.pdf, Table 5.  I have verified they
  97  * are consistent with my IBM ThinkPad X31, which has a 1.3GHz Pentium
  98  * M.
  99  */
 100
 101 /* Ultra Low Voltage Intel Pentium M processor 900MHz (Banias) */
 102 static struct cpufreq_frequency_table banias_900[] =
 103 {
 104         OP(600,  844),
 105         OP(800,  988),
 106         OP(900, 1004),
 107         { .frequency = CPUFREQ_TABLE_END }
 108 };
 109
 110 /* Ultra Low Voltage Intel Pentium M processor 1000MHz (Banias) */
 111 static struct cpufreq_frequency_table banias_1000[] =
 112 {
 113         OP(600,   844),
 114         OP(800,   972),
 115         OP(900,   988),
 116         OP(1000, 1004),
 117         { .frequency = CPUFREQ_TABLE_END }
 118 };
 119
 120 /* Low Voltage Intel Pentium M processor 1.10GHz (Banias) */
 121 static struct cpufreq_frequency_table banias_1100[] =
 122 {
 123         OP( 600,  956),
 124         OP( 800, 1020),
 125         OP( 900, 1100),
 126         OP(1000, 1164),
 127         OP(1100, 1180),
 128         { .frequency = CPUFREQ_TABLE_END }
 129 };
 130
 131
 132 /* Low Voltage Intel Pentium M processor 1.20GHz (Banias) */
 133 static struct cpufreq_frequency_table banias_1200[] =
 134 {
 135         OP( 600,  956),
 136         OP( 800, 1004),
 137         OP( 900, 1020),
 138         OP(1000, 1100),
 139         OP(1100, 1164),
 140         OP(1200, 1180),
 141         { .frequency = CPUFREQ_TABLE_END }
 142 };
 143
 144 /* Intel Pentium M processor 1.30GHz (Banias) */
 145 static struct cpufreq_frequency_table banias_1300[] =
 146 {
 147         OP( 600,  956),
 148         OP( 800, 1260),
 149         OP(1000, 1292),
 150         OP(1200, 1356),
 151         OP(1300, 1388),
 152         { .frequency = CPUFREQ_TABLE_END }
 153 };
 154
 155 /* Intel Pentium M processor 1.40GHz (Banias) */
 156 static struct cpufreq_frequency_table banias_1400[] =
 157 {
 158         OP( 600,  956),
 159         OP( 800, 1180),
 160         OP(1000, 1308),
 161         OP(1200, 1436),
 162         OP(1400, 1484),
 163         { .frequency = CPUFREQ_TABLE_END }
 164 };
 165
 166 /* Intel Pentium M processor 1.50GHz (Banias) */
 167 static struct cpufreq_frequency_table banias_1500[] =
 168 {
 169         OP( 600,  956),
 170         OP( 800, 1116),
 171         OP(1000, 1228),
 172         OP(1200, 1356),
 173         OP(1400, 1452),
 174         OP(1500, 1484),
 175         { .frequency = CPUFREQ_TABLE_END }
 176 };
 177
 178 /* Intel Pentium M processor 1.60GHz (Banias) */
 179 static struct cpufreq_frequency_table banias_1600[] =
 180 {
 181         OP( 600,  956),
 182         OP( 800, 1036),
 183         OP(1000, 1164),
 184         OP(1200, 1276),
 185         OP(1400, 1420),
 186         OP(1600, 1484),
 187         { .frequency = CPUFREQ_TABLE_END }
 188 };
 189
 190 /* Intel Pentium M processor 1.70GHz (Banias) */
 191 static struct cpufreq_frequency_table banias_1700[] =
 192 {
 193         OP( 600,  956),
 194         OP( 800, 1004),
 195         OP(1000, 1116),
 196         OP(1200, 1228),
 197         OP(1400, 1308),
 198         OP(1700, 1484),
 199         { .frequency = CPUFREQ_TABLE_END }
 200 };
 201 #undef OP
 202
 203 #define _BANIAS(cpuid, max, name)       \
 204 {       .cpu_id         = cpuid,        \
 205         .model_name     = "Intel(R) Pentium(R) M processor " name "MHz", \
 206         .max_freq       = (max)*1000,   \
 207         .op_points      = banias_##max, \
 208 }
 209 #define BANIAS(max)     _BANIAS(&cpu_ids[CPU_BANIAS], max, #max)
 210
 211 /* CPU models, their operating frequency range, and freq/voltage
 212    operating points */
 213 static struct cpu_model models[] =
 214 {
 215         _BANIAS(&cpu_ids[CPU_BANIAS], 900, " 900"),
 216         BANIAS(1000),
 217         BANIAS(1100),
 218         BANIAS(1200),
 219         BANIAS(1300),
 220         BANIAS(1400),
 221         BANIAS(1500),
 222         BANIAS(1600),
 223         BANIAS(1700),
 224
 225         /* NULL model_name is a wildcard */
 226         { &cpu_ids[CPU_DOTHAN_A1], NULL, 0, NULL },
 227         { &cpu_ids[CPU_DOTHAN_A2], NULL, 0, NULL },
 228         { &cpu_ids[CPU_DOTHAN_B0], NULL, 0, NULL },
 229
 230         { NULL, }
 231 };
 232 #undef _BANIAS
 233 #undef BANIAS
 234
 235 static int centrino_cpu_init_table(struct cpufreq_policy *policy)
 236 {
 237         struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu];
 238         struct cpu_model *model;
 239
 240         for(model = models; model->cpu_id != NULL; model++)
 241                 if (centrino_verify_cpu_id(cpu, model->cpu_id) &&
 242                     (model->model_name == NULL ||
 243                      strcmp(cpu->x86_model_id, model->model_name) == 0))
 244                         break;
 245
 246         if (model->cpu_id == NULL) {
 247                 /* No match at all */
 248                 dprintk(KERN_INFO PFX "no support for CPU model \"%s\": "
 249                        "send /proc/cpuinfo to " MAINTAINER "\n",
 250                        cpu->x86_model_id);
 251                 return -ENOENT;
 252         }
 253
 254         if (model->op_points == NULL) {
 255                 /* Matched a non-match */
 256                 dprintk(KERN_INFO PFX "no table support for CPU model \"%s\": \n",
 257                        cpu->x86_model_id);
 258 #ifndef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
 259                 dprintk(KERN_INFO PFX "try compiling with CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI enabled\n");
 260 #endif
 261                 return -ENOENT;
 262         }
 263
 264         centrino_model[policy->cpu] = model;
 265
 266         dprintk("found \"%s\": max frequency: %dkHz\n",
 267                model->model_name, model->max_freq);
 268
 269         return 0;
 270 }
 271
 272 #else
 273 static inline int centrino_cpu_init_table(struct cpufreq_policy *policy) { return -ENODEV; }
 274 #endif /* CONFIG_X86_SPEEDSTEP_CENTRINO_TABLE */
 275
 276 static int centrino_verify_cpu_id(const struct cpuinfo_x86 *c, const struct cpu_id *x)
 277 {
 278         if ((c->x86 == x->x86) &&
 279             (c->x86_model == x->x86_model) &&
 280             (c->x86_mask == x->x86_mask))
 281                 return 1;
 282         return 0;
 283 }
 284
 285 /* To be called only after centrino_model is initialized */
 286 static unsigned extract_clock(unsigned msr, unsigned int cpu, int failsafe)
 287 {
 288         int i;
 289
 290         /*
 291          * Extract clock in kHz from PERF_CTL value
 292          * for centrino, as some DSDTs are buggy.
 293          * Ideally, this can be done using the acpi_data structure.
 294          */
 295         if ((centrino_cpu[cpu] == &cpu_ids[CPU_BANIAS]) ||
 296             (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_A1]) ||
 297             (centrino_cpu[cpu] == &cpu_ids[CPU_DOTHAN_B0])) {
 298                 msr = (msr >> 8) & 0xff;
 299                 return msr * 100000;
 300         }
 301
 302         if ((!centrino_model[cpu]) || (!centrino_model[cpu]->op_points))
 303                 return 0;
 304
 305         msr &= 0xffff;
 306         for (i=0;centrino_model[cpu]->op_points[i].frequency != CPUFREQ_TABLE_END; i++) {
 307                 if (msr == centrino_model[cpu]->op_points[i].index)
 308                         return centrino_model[cpu]->op_points[i].frequency;
 309         }
 310         if (failsafe)
 311                 return centrino_model[cpu]->op_points[i-1].frequency;
 312         else
 313                 return 0;
 314 }
 315
 316 /* Return the current CPU frequency in kHz */
 317 static unsigned int get_cur_freq(unsigned int cpu)
 318 {
 319         unsigned l, h;
 320         unsigned clock_freq;
 321         cpumask_t saved_mask;
 322
 323         saved_mask = current->cpus_allowed;
 324         set_cpus_allowed(current, cpumask_of_cpu(cpu));
 325         if (smp_processor_id() != cpu)
 326                 return 0;
 327
 328         rdmsr(MSR_IA32_PERF_STATUS, l, h);
 329         clock_freq = extract_clock(l, cpu, 0);
 330
 331         if (unlikely(clock_freq == 0)) {
 332                 /*
 333                  * On some CPUs, we can see transient MSR values (which are
 334                  * not present in _PSS), while CPU is doing some automatic
 335                  * P-state transition (like TM2). Get the last freq set
 336                  * in PERF_CTL.
 337                  */
 338                 rdmsr(MSR_IA32_PERF_CTL, l, h);
 339                 clock_freq = extract_clock(l, cpu, 1);
 340         }
 341
 342         set_cpus_allowed(current, saved_mask);
 343         return clock_freq;
 344 }
 345
 346
 347 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
 348
 349 static struct acpi_processor_performance p;
 350
 351 /*
 352  * centrino_cpu_init_acpi - register with ACPI P-States library
 353  *
 354  * Register with the ACPI P-States library (part of drivers/acpi/processor.c)
 355  * in order to determine correct frequency and voltage pairings by reading
 356  * the _PSS of the ACPI DSDT or SSDT tables.
 357  */
 358 static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
 359 {
 360         union acpi_object               arg0 = {ACPI_TYPE_BUFFER};
 361         u32                             arg0_buf[3];
 362         struct acpi_object_list         arg_list = {1, &arg0};
 363         unsigned long                   cur_freq;
 364         int                             result = 0, i;
 365         unsigned int                    cpu = policy->cpu;
 366
 367         /* _PDC settings */
 368         arg0.buffer.length = 12;
 369         arg0.buffer.pointer = (u8 *) arg0_buf;
 370         arg0_buf[0] = ACPI_PDC_REVISION_ID;
 371         arg0_buf[1] = 1;
 372         arg0_buf[2] = ACPI_PDC_EST_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_MSR;
 373
 374         p.pdc = &arg_list;
 375
 376         /* register with ACPI core */
 377         if (acpi_processor_register_performance(&p, cpu)) {
 378                 dprintk(KERN_INFO PFX "obtaining ACPI data failed\n");
 379                 return -EIO;
 380         }
 381
 382         /* verify the acpi_data */
 383         if (p.state_count <= 1) {
 384                 dprintk("No P-States\n");
 385                 result = -ENODEV;
 386                 goto err_unreg;
 387         }
 388
 389         if ((p.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
 390             (p.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
 391                 dprintk("Invalid control/status registers (%x - %x)\n",
 392                         p.control_register.space_id, p.status_register.space_id);
 393                 result = -EIO;
 394                 goto err_unreg;
 395         }
 396
 397         for (i=0; i<p.state_count; i++) {
 398                 if (p.states[i].control != p.states[i].status) {
 399                         dprintk("Different control (%x) and status values (%x)\n",
 400                                 p.states[i].control, p.states[i].status);
 401                         result = -EINVAL;
 402                         goto err_unreg;
 403                 }
 404
 405                 if (!p.states[i].core_frequency) {
 406                         dprintk("Zero core frequency for state %u\n", i);
 407                         result = -EINVAL;
 408                         goto err_unreg;
 409                 }
 410
 411                 if (p.states[i].core_frequency > p.states[0].core_frequency) {
 412                         dprintk("P%u has larger frequency (%u) than P0 (%u), skipping\n", i,
 413                                 p.states[i].core_frequency, p.states[0].core_frequency);
 414                         p.states[i].core_frequency = 0;
 415                         continue;
 416                 }
 417         }
 418
 419         centrino_model[cpu] = kmalloc(sizeof(struct cpu_model), GFP_KERNEL);
 420         if (!centrino_model[cpu]) {
 421                 result = -ENOMEM;
 422                 goto err_unreg;
 423         }
 424         memset(centrino_model[cpu], 0, sizeof(struct cpu_model));
 425
 426         centrino_model[cpu]->model_name=NULL;
 427         centrino_model[cpu]->max_freq = p.states[0].core_frequency * 1000;
 428         centrino_model[cpu]->op_points =  kmalloc(sizeof(struct cpufreq_frequency_table) *
 429                                              (p.state_count + 1), GFP_KERNEL);
 430         if (!centrino_model[cpu]->op_points) {
 431                 result = -ENOMEM;
 432                 goto err_kfree;
 433         }
 434
 435         for (i=0; i<p.state_count; i++) {
 436                 centrino_model[cpu]->op_points[i].index = p.states[i].control;
 437                 centrino_model[cpu]->op_points[i].frequency = p.states[i].core_frequency * 1000;
 438                 dprintk("adding state %i with frequency %u and control value %04x\n",
 439                         i, centrino_model[cpu]->op_points[i].frequency, centrino_model[cpu]->op_points[i].index);
 440         }
 441         centrino_model[cpu]->op_points[p.state_count].frequency = CPUFREQ_TABLE_END;
 442
 443         cur_freq = get_cur_freq(cpu);
 444
 445         for (i=0; i<p.state_count; i++) {
 446                 if (!p.states[i].core_frequency) {
 447                         dprintk("skipping state %u\n", i);
 448                         centrino_model[cpu]->op_points[i].frequency = CPUFREQ_ENTRY_INVALID;
 449                         continue;
 450                 }
 451
 452                 if (extract_clock(centrino_model[cpu]->op_points[i].index, cpu, 0) !=
 453                     (centrino_model[cpu]->op_points[i].frequency)) {
 454                         dprintk("Invalid encoded frequency (%u vs. %u)\n",
 455                                 extract_clock(centrino_model[cpu]->op_points[i].index, cpu, 0),
 456                                 centrino_model[cpu]->op_points[i].frequency);
 457                         result = -EINVAL;
 458                         goto err_kfree_all;
 459                 }
 460
 461                 if (cur_freq == centrino_model[cpu]->op_points[i].frequency)
 462                         p.state = i;
 463         }
 464
 465         /* notify BIOS that we exist */
 466         acpi_processor_notify_smm(THIS_MODULE);
 467
 468         return 0;
 469
 470  err_kfree_all:
 471         kfree(centrino_model[cpu]->op_points);
 472  err_kfree:
 473         kfree(centrino_model[cpu]);
 474  err_unreg:
 475         acpi_processor_unregister_performance(&p, cpu);
 476         dprintk(KERN_INFO PFX "invalid ACPI data\n");
 477         return (result);
 478 }
 479 #else
 480 static inline int centrino_cpu_init_acpi(struct cpufreq_policy *policy) { return -ENODEV; }
 481 #endif
 482
 483 static int centrino_cpu_init(struct cpufreq_policy *policy)
 484 {
 485         struct cpuinfo_x86 *cpu = &cpu_data[policy->cpu];
 486         unsigned freq;
 487         unsigned l, h;
 488         int ret;
 489         int i;
 490
 491         /* Only Intel makes Enhanced Speedstep-capable CPUs */
 492         if (cpu->x86_vendor != X86_VENDOR_INTEL || !cpu_has(cpu, X86_FEATURE_EST))
 493                 return -ENODEV;
 494
 495         for (i = 0; i < N_IDS; i++)
 496                 if (centrino_verify_cpu_id(cpu, &cpu_ids[i]))
 497                         break;
 498
 499         if (i != N_IDS)
 500                 centrino_cpu[policy->cpu] = &cpu_ids[i];
 501
 502         if (is_const_loops_cpu(policy->cpu)) {
 503                 centrino_driver.flags |= CPUFREQ_CONST_LOOPS;
 504         }
 505
 506         if (centrino_cpu_init_acpi(policy)) {
 507                 if (policy->cpu != 0)
 508                         return -ENODEV;
 509
 510                 if (!centrino_cpu[policy->cpu]) {
 511                         dprintk(KERN_INFO PFX "found unsupported CPU with "
 512                         "Enhanced SpeedStep: send /proc/cpuinfo to "
 513                         MAINTAINER "\n");
 514                         return -ENODEV;
 515                 }
 516
 517                 if (centrino_cpu_init_table(policy)) {
 518                         return -ENODEV;
 519                 }
 520         }
 521
 522         /* Check to see if Enhanced SpeedStep is enabled, and try to
 523            enable it if not. */
 524         rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 525
 526         if (!(l & (1<<16))) {
 527                 l |= (1<<16);
 528                 dprintk("trying to enable Enhanced SpeedStep (%x)\n", l);
 529                 wrmsr(MSR_IA32_MISC_ENABLE, l, h);
 530
 531                 /* check to see if it stuck */
 532                 rdmsr(MSR_IA32_MISC_ENABLE, l, h);
 533                 if (!(l & (1<<16))) {
 534                         printk(KERN_INFO PFX "couldn't enable Enhanced SpeedStep\n");
 535                         return -ENODEV;
 536                 }
 537         }
 538
 539         freq = get_cur_freq(policy->cpu);
 540
 541         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 542         policy->cpuinfo.transition_latency = 10000; /* 10uS transition latency */
 543         policy->cur = freq;
 544
 545         dprintk("centrino_cpu_init: cur=%dkHz\n", policy->cur);
 546
 547         ret = cpufreq_frequency_table_cpuinfo(policy, centrino_model[policy->cpu]->op_points);
 548         if (ret)
 549                 return (ret);
 550
 551         cpufreq_frequency_table_get_attr(centrino_model[policy->cpu]->op_points, policy->cpu);
 552
 553         return 0;
 554 }
 555
 556 static int centrino_cpu_exit(struct cpufreq_policy *policy)
 557 {
 558         unsigned int cpu = policy->cpu;
 559
 560         if (!centrino_model[cpu])
 561                 return -ENODEV;
 562
 563         cpufreq_frequency_table_put_attr(cpu);
 564
 565 #ifdef CONFIG_X86_SPEEDSTEP_CENTRINO_ACPI
 566         if (!centrino_model[cpu]->model_name) {
 567                 dprintk("unregistering and freeing ACPI data\n");
 568                 acpi_processor_unregister_performance(&p, cpu);
 569                 kfree(centrino_model[cpu]->op_points);
 570                 kfree(centrino_model[cpu]);
 571         }
 572 #endif
 573
 574         centrino_model[cpu] = NULL;
 575
 576         return 0;
 577 }
 578
 579 /**
 580  * centrino_verify - verifies a new CPUFreq policy
 581  * @policy: new policy
 582  *
 583  * Limit must be within this model's frequency range at least one
 584  * border included.
 585  */
 586 static int centrino_verify (struct cpufreq_policy *policy)
 587 {
 588         return cpufreq_frequency_table_verify(policy, centrino_model[policy->cpu]->op_points);
 589 }
 590
 591 /**
 592  * centrino_setpolicy - set a new CPUFreq policy
 593  * @policy: new policy
 594  * @target_freq: the target frequency
 595  * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
 596  *
 597  * Sets a new CPUFreq policy.
 598  */
 599 static int centrino_target (struct cpufreq_policy *policy,
 600                             unsigned int target_freq,
 601                             unsigned int relation)
 602 {
 603         unsigned int    newstate = 0;
 604         unsigned int    msr, oldmsr, h, cpu = policy->cpu;
 605         struct cpufreq_freqs    freqs;
 606         cpumask_t               saved_mask;
 607         int                     retval;
 608
 609         if (centrino_model[cpu] == NULL)
 610                 return -ENODEV;
 611
 612         /*
 613          * Support for SMP systems.
 614          * Make sure we are running on the CPU that wants to change frequency
 615          */
 616         saved_mask = current->cpus_allowed;
 617         set_cpus_allowed(current, policy->cpus);
 618         if (!cpu_isset(smp_processor_id(), policy->cpus)) {
 619                 dprintk("couldn't limit to CPUs in this domain\n");
 620                 return(-EAGAIN);
 621         }
 622
 623         if (cpufreq_frequency_table_target(policy, centrino_model[cpu]->op_points, target_freq,
 624                                            relation, &newstate)) {
 625                 retval = -EINVAL;
 626                 goto migrate_end;
 627         }
 628
 629         msr = centrino_model[cpu]->op_points[newstate].index;
 630         rdmsr(MSR_IA32_PERF_CTL, oldmsr, h);
 631
 632         if (msr == (oldmsr & 0xffff)) {
 633                 retval = 0;
 634                 dprintk("no change needed - msr was and needs to be %x\n", oldmsr);
 635                 goto migrate_end;
 636         }
 637
 638         freqs.cpu = cpu;
 639         freqs.old = extract_clock(oldmsr, cpu, 0);
 640         freqs.new = extract_clock(msr, cpu, 0);
 641
 642         dprintk("target=%dkHz old=%d new=%d msr=%04x\n",
 643                 target_freq, freqs.old, freqs.new, msr);
 644
 645         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 646
 647         /* all but 16 LSB are "reserved", so treat them with
 648            care */
 649         oldmsr &= ~0xffff;
 650         msr &= 0xffff;
 651         oldmsr |= msr;
 652
 653         wrmsr(MSR_IA32_PERF_CTL, oldmsr, h);
 654
 655         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 656
 657         retval = 0;
 658 migrate_end:
 659         set_cpus_allowed(current, saved_mask);
 660         return (retval);
 661 }
 662
 663 static struct freq_attr* centrino_attr[] = {
 664         &cpufreq_freq_attr_scaling_available_freqs,
 665         NULL,
 666 };
 667
 668 static struct cpufreq_driver centrino_driver = {
 669         .name           = "centrino", /* should be speedstep-centrino,
 670                                          but there's a 16 char limit */
 671         .init           = centrino_cpu_init,
 672         .exit           = centrino_cpu_exit,
 673         .verify         = centrino_verify,
 674         .target         = centrino_target,
 675         .get            = get_cur_freq,
 676         .attr           = centrino_attr,
 677         .owner          = THIS_MODULE,
 678 };
 679
 680
 681 /**
 682  * centrino_init - initializes the Enhanced SpeedStep CPUFreq driver
 683  *
 684  * Initializes the Enhanced SpeedStep support. Returns -ENODEV on
 685  * unsupported devices, -ENOENT if there's no voltage table for this
 686  * particular CPU model, -EINVAL on problems during initiatization,
 687  * and zero on success.
 688  *
 689  * This is quite picky.  Not only does the CPU have to advertise the
 690  * "est" flag in the cpuid capability flags, we look for a specific
 691  * CPU model and stepping, and we need to have the exact model name in
 692  * our voltage tables.  That is, be paranoid about not releasing
 693  * someone's valuable magic smoke.
 694  */
 695 static int __init centrino_init(void)
 696 {
 697         struct cpuinfo_x86 *cpu = cpu_data;
 698
 699         if (!cpu_has(cpu, X86_FEATURE_EST))
 700                 return -ENODEV;
 701
 702         return cpufreq_register_driver(&centrino_driver);
 703 }
 704
 705 static void __exit centrino_exit(void)
 706 {
 707         cpufreq_unregister_driver(&centrino_driver);
 708 }
 709
 710 MODULE_AUTHOR ("Jeremy Fitzhardinge <jeremy@goop.org>");
 711 MODULE_DESCRIPTION ("Enhanced SpeedStep driver for Intel Pentium M processors.");
 712 MODULE_LICENSE ("GPL");
 713
 714 late_initcall(centrino_init);
 715 module_exit(centrino_exit);