2 * linux/arch/i386/kernel/irq.c
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
6 * This file contains the lowest level x86-specific interrupt
7 * entry, irq-stacks and irq statistics code. All the remaining
8 * irq logic is done by the generic kernel/irq/ code and
9 * by the x86-specific irq controller code. (e.g. i8259.c and
13 #include <asm/uaccess.h>
14 #include <linux/module.h>
15 #include <linux/seq_file.h>
16 #include <linux/interrupt.h>
17 #include <linux/kernel_stat.h>
18 #include <linux/notifier.h>
19 #include <linux/cpu.h>
20 #include <linux/delay.h>
22 DEFINE_PER_CPU(irq_cpustat_t
, irq_stat
) ____cacheline_internodealigned_in_smp
;
23 EXPORT_PER_CPU_SYMBOL(irq_stat
);
25 #ifndef CONFIG_X86_LOCAL_APIC
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
30 void ack_bad_irq(unsigned int irq
)
32 printk("unexpected IRQ trap at vector %02x\n", irq
);
36 #ifdef CONFIG_4KSTACKS
38 * per-CPU IRQ handling contexts (thread information and stack)
41 struct thread_info tinfo
;
42 u32 stack
[THREAD_SIZE
/sizeof(u32
)];
45 static union irq_ctx
*hardirq_ctx
[NR_CPUS
] __read_mostly
;
46 static union irq_ctx
*softirq_ctx
[NR_CPUS
] __read_mostly
;
50 * do_IRQ handles all normal device IRQ's (the special
51 * SMP cross-CPU interrupts have their own specific
54 fastcall
unsigned int do_IRQ(struct pt_regs
*regs
)
56 /* high bit used in ret_from_ code */
57 int irq
= ~regs
->orig_eax
;
58 #ifdef CONFIG_4KSTACKS
59 union irq_ctx
*curctx
, *irqctx
;
63 if (unlikely((unsigned)irq
>= NR_IRQS
)) {
64 printk(KERN_EMERG
"%s: cannot handle IRQ %d\n",
70 #ifdef CONFIG_DEBUG_STACKOVERFLOW
71 /* Debugging check for stack overflow: is there less than 1KB free? */
75 __asm__
__volatile__("andl %%esp,%0" :
76 "=r" (esp
) : "0" (THREAD_SIZE
- 1));
77 if (unlikely(esp
< (sizeof(struct thread_info
) + STACK_WARN
))) {
78 printk("do_IRQ: stack overflow: %ld\n",
79 esp
- sizeof(struct thread_info
));
85 if (!irq_desc
[irq
].handle_irq
) {
89 #ifdef CONFIG_4KSTACKS
91 curctx
= (union irq_ctx
*) current_thread_info();
92 irqctx
= hardirq_ctx
[smp_processor_id()];
95 * this is where we switch to the IRQ stack. However, if we are
96 * already using the IRQ stack (because we interrupted a hardirq
97 * handler) we can't do that and just have to keep using the
98 * current stack (which is the irq stack already after all)
100 if (curctx
!= irqctx
) {
103 /* build the stack frame on the IRQ stack */
104 isp
= (u32
*) ((char*)irqctx
+ sizeof(*irqctx
));
105 irqctx
->tinfo
.task
= curctx
->tinfo
.task
;
106 irqctx
->tinfo
.previous_esp
= current_stack_pointer
;
109 * Copy the softirq bits in preempt_count so that the
110 * softirq checks work in the hardirq context.
112 irqctx
->tinfo
.preempt_count
=
113 (irqctx
->tinfo
.preempt_count
& ~SOFTIRQ_MASK
) |
114 (curctx
->tinfo
.preempt_count
& SOFTIRQ_MASK
);
117 " xchgl %%ebx,%%esp \n"
119 " movl %%ebx,%%esp \n"
120 : "=a" (arg1
), "=d" (arg2
), "=b" (ebx
)
121 : "0" (irq
), "1" (regs
), "2" (isp
)
122 : "memory", "cc", "ecx"
134 #ifdef CONFIG_4KSTACKS
137 * These should really be __section__(".bss.page_aligned") as well, but
138 * gcc's 3.0 and earlier don't handle that correctly.
140 static char softirq_stack
[NR_CPUS
* THREAD_SIZE
]
141 __attribute__((__aligned__(THREAD_SIZE
)));
143 static char hardirq_stack
[NR_CPUS
* THREAD_SIZE
]
144 __attribute__((__aligned__(THREAD_SIZE
)));
147 * allocate per-cpu stacks for hardirq and for softirq processing
149 void irq_ctx_init(int cpu
)
151 union irq_ctx
*irqctx
;
153 if (hardirq_ctx
[cpu
])
156 irqctx
= (union irq_ctx
*) &hardirq_stack
[cpu
*THREAD_SIZE
];
157 irqctx
->tinfo
.task
= NULL
;
158 irqctx
->tinfo
.exec_domain
= NULL
;
159 irqctx
->tinfo
.cpu
= cpu
;
160 irqctx
->tinfo
.preempt_count
= HARDIRQ_OFFSET
;
161 irqctx
->tinfo
.addr_limit
= MAKE_MM_SEG(0);
163 hardirq_ctx
[cpu
] = irqctx
;
165 irqctx
= (union irq_ctx
*) &softirq_stack
[cpu
*THREAD_SIZE
];
166 irqctx
->tinfo
.task
= NULL
;
167 irqctx
->tinfo
.exec_domain
= NULL
;
168 irqctx
->tinfo
.cpu
= cpu
;
169 irqctx
->tinfo
.preempt_count
= SOFTIRQ_OFFSET
;
170 irqctx
->tinfo
.addr_limit
= MAKE_MM_SEG(0);
172 softirq_ctx
[cpu
] = irqctx
;
174 printk("CPU %u irqstacks, hard=%p soft=%p\n",
175 cpu
,hardirq_ctx
[cpu
],softirq_ctx
[cpu
]);
178 void irq_ctx_exit(int cpu
)
180 hardirq_ctx
[cpu
] = NULL
;
183 extern asmlinkage
void __do_softirq(void);
185 asmlinkage
void do_softirq(void)
188 struct thread_info
*curctx
;
189 union irq_ctx
*irqctx
;
195 local_irq_save(flags
);
197 if (local_softirq_pending()) {
198 curctx
= current_thread_info();
199 irqctx
= softirq_ctx
[smp_processor_id()];
200 irqctx
->tinfo
.task
= curctx
->task
;
201 irqctx
->tinfo
.previous_esp
= current_stack_pointer
;
203 /* build the stack frame on the softirq stack */
204 isp
= (u32
*) ((char*)irqctx
+ sizeof(*irqctx
));
207 " xchgl %%ebx,%%esp \n"
208 " call __do_softirq \n"
209 " movl %%ebx,%%esp \n"
212 : "memory", "cc", "edx", "ecx", "eax"
216 local_irq_restore(flags
);
219 EXPORT_SYMBOL(do_softirq
);
223 * Interrupt statistics:
226 atomic_t irq_err_count
;
229 * /proc/interrupts printing:
232 int show_interrupts(struct seq_file
*p
, void *v
)
234 int i
= *(loff_t
*) v
, j
;
235 struct irqaction
* action
;
240 for_each_online_cpu(j
)
241 seq_printf(p
, "CPU%-8d",j
);
246 spin_lock_irqsave(&irq_desc
[i
].lock
, flags
);
247 action
= irq_desc
[i
].action
;
250 seq_printf(p
, "%3d: ",i
);
252 seq_printf(p
, "%10u ", kstat_irqs(i
));
254 for_each_online_cpu(j
)
255 seq_printf(p
, "%10u ", kstat_cpu(j
).irqs
[i
]);
257 seq_printf(p
, " %14s", irq_desc
[i
].chip
->typename
);
258 seq_printf(p
, " %s", action
->name
);
260 for (action
=action
->next
; action
; action
= action
->next
)
261 seq_printf(p
, ", %s", action
->name
);
265 spin_unlock_irqrestore(&irq_desc
[i
].lock
, flags
);
266 } else if (i
== NR_IRQS
) {
267 seq_printf(p
, "NMI: ");
268 for_each_online_cpu(j
)
269 seq_printf(p
, "%10u ", nmi_count(j
));
271 #ifdef CONFIG_X86_LOCAL_APIC
272 seq_printf(p
, "LOC: ");
273 for_each_online_cpu(j
)
274 seq_printf(p
, "%10u ",
275 per_cpu(irq_stat
,j
).apic_timer_irqs
);
278 seq_printf(p
, "ERR: %10u\n", atomic_read(&irq_err_count
));
279 #if defined(CONFIG_X86_IO_APIC)
280 seq_printf(p
, "MIS: %10u\n", atomic_read(&irq_mis_count
));
286 #ifdef CONFIG_HOTPLUG_CPU
287 #include <mach_apic.h>
289 void fixup_irqs(cpumask_t map
)
294 for (irq
= 0; irq
< NR_IRQS
; irq
++) {
299 cpus_and(mask
, irq_desc
[irq
].affinity
, map
);
300 if (any_online_cpu(mask
) == NR_CPUS
) {
301 printk("Breaking affinity for irq %i\n", irq
);
304 if (irq_desc
[irq
].chip
->set_affinity
)
305 irq_desc
[irq
].chip
->set_affinity(irq
, mask
);
306 else if (irq_desc
[irq
].action
&& !(warned
++))
307 printk("Cannot set affinity for irq %i\n", irq
);
312 /* Ingo Molnar says: "after the IO-APIC masks have been redirected
313 [note the nop - the interrupt-enable boundary on x86 is two
314 instructions from sti] - to flush out pending hardirqs and
315 IPIs. After this point nothing is supposed to reach this CPU." */
316 __asm__
__volatile__("sti; nop; cli");
319 /* That doesn't seem sufficient. Give it 1ms. */