2 * arch/ia64/kernel/entry.S
6 * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
7 * David Mosberger-Tang <davidm@hpl.hp.com>
8 * Copyright (C) 1999, 2002-2003
9 * Asit Mallick <Asit.K.Mallick@intel.com>
10 * Don Dugger <Don.Dugger@intel.com>
11 * Suresh Siddha <suresh.b.siddha@intel.com>
12 * Fenghua Yu <fenghua.yu@intel.com>
13 * Copyright (C) 1999 VA Linux Systems
14 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
17 * ia64_switch_to now places correct virtual mapping in in TR2 for
18 * kernel stack. This allows us to handle interrupts without changing
21 * Jonathan Nicklin <nicklin@missioncriticallinux.com>
22 * Patrick O'Rourke <orourke@missioncriticallinux.com>
26 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
27 * VA Linux Systems Japan K.K.
31 * Global (preserved) predicate usage on syscall entry/exit path:
40 #include <asm/asmmacro.h>
41 #include <asm/cache.h>
42 #include <asm/errno.h>
43 #include <asm/kregs.h>
44 #include <asm/asm-offsets.h>
45 #include <asm/pgtable.h>
46 #include <asm/percpu.h>
47 #include <asm/processor.h>
48 #include <asm/thread_info.h>
49 #include <asm/unistd.h>
50 #include <asm/ftrace.h>
54 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
56 * execve() is special because in case of success, we need to
57 * setup a null register window frame.
61 * Allocate 8 input registers since ptrace() may clobber them
63 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
64 alloc loc1=ar.pfs,8,2,3,0
67 mov out0=in0 // filename
68 ;; // stop bit between alloc and call
71 br.call.sptk.many rp=sys_execve
74 mov ar.pfs=loc1 // restore ar.pfs
75 sxt4 r8=r8 // return 64-bit result
79 (p6) mov ar.pfs=r0 // clear ar.pfs on success
80 (p7) br.ret.sptk.many rp
83 * In theory, we'd have to zap this state only to prevent leaking of
84 * security sensitive state (e.g., if current->mm->dumpable is zero). However,
85 * this executes in less than 20 cycles even on Itanium, so it's not worth
88 mov ar.unat=0; mov ar.lc=0
89 mov r4=0; mov f2=f0; mov b1=r0
90 mov r5=0; mov f3=f0; mov b2=r0
91 mov r6=0; mov f4=f0; mov b3=r0
92 mov r7=0; mov f5=f0; mov b4=r0
93 ldf.fill f12=[sp]; mov f13=f0; mov b5=r0
94 ldf.fill f14=[sp]; ldf.fill f15=[sp]; mov f16=f0
95 ldf.fill f17=[sp]; ldf.fill f18=[sp]; mov f19=f0
96 ldf.fill f20=[sp]; ldf.fill f21=[sp]; mov f22=f0
97 ldf.fill f23=[sp]; ldf.fill f24=[sp]; mov f25=f0
98 ldf.fill f26=[sp]; ldf.fill f27=[sp]; mov f28=f0
99 ldf.fill f29=[sp]; ldf.fill f30=[sp]; mov f31=f0
104 * sys_clone2(u64 flags, u64 ustack_base, u64 ustack_size, u64 parent_tidptr, u64 child_tidptr,
107 GLOBAL_ENTRY(sys_clone2)
109 * Allocate 8 input registers since ptrace() may clobber them
111 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
112 alloc r16=ar.pfs,8,2,6,0
114 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
116 mov loc1=r16 // save ar.pfs across do_fork
120 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
121 mov out4=in3 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
123 (p6) st8 [r2]=in5 // store TLS in r16 for copy_thread()
124 mov out5=in4 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
125 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s
126 mov out0=in0 // out0 = clone_flags
127 br.call.sptk.many rp=do_fork
129 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
136 * sys_clone(u64 flags, u64 ustack_base, u64 parent_tidptr, u64 child_tidptr, u64 tls)
137 * Deprecated. Use sys_clone2() instead.
139 GLOBAL_ENTRY(sys_clone)
141 * Allocate 8 input registers since ptrace() may clobber them
143 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
144 alloc r16=ar.pfs,8,2,6,0
146 adds r2=PT(R16)+IA64_SWITCH_STACK_SIZE+16,sp
148 mov loc1=r16 // save ar.pfs across do_fork
151 mov out3=16 // stacksize (compensates for 16-byte scratch area)
152 tbit.nz p6,p0=in0,CLONE_SETTLS_BIT
153 mov out4=in2 // parent_tidptr: valid only w/CLONE_PARENT_SETTID
155 (p6) st8 [r2]=in4 // store TLS in r13 (tp)
156 mov out5=in3 // child_tidptr: valid only w/CLONE_CHILD_SETTID or CLONE_CHILD_CLEARTID
157 adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = ®s
158 mov out0=in0 // out0 = clone_flags
159 br.call.sptk.many rp=do_fork
161 adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
166 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
169 * prev_task <- ia64_switch_to(struct task_struct *next)
170 * With Ingo's new scheduler, interrupts are disabled when this routine gets
171 * called. The code starting at .map relies on this. The rest of the code
172 * doesn't care about the interrupt masking status.
174 GLOBAL_ENTRY(__paravirt_switch_to)
176 alloc r16=ar.pfs,1,0,0,0
180 adds r22=IA64_TASK_THREAD_KSP_OFFSET,r13
182 mov r27=IA64_KR(CURRENT_STACK)
183 adds r21=IA64_TASK_THREAD_KSP_OFFSET,in0
184 dep r20=0,in0,61,3 // physical address of "next"
186 st8 [r22]=sp // save kernel stack pointer of old task
187 shr.u r26=r20,IA64_GRANULE_SHIFT
191 * If we've already mapped this task's page, we can skip doing it again.
193 (p6) cmp.eq p7,p6=r26,r27
194 (p6) br.cond.dpnt .map
197 ld8 sp=[r21] // load kernel stack pointer of new task
198 MOV_TO_KR(CURRENT, in0, r8, r9) // update "current" application register
199 mov r8=r13 // return pointer to previously running task
200 mov r13=in0 // set "current" pointer
205 sync.i // ensure "fc"s done by this CPU are visible on other CPUs
207 br.ret.sptk.many rp // boogie on out in new context
210 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
214 or r23=r25,r20 // construct PA | page properties
215 mov r25=IA64_GRANULE_SHIFT<<2
217 MOV_TO_ITIR(p0, r25, r8)
218 MOV_TO_IFA(in0, r8) // VA of next task...
220 mov r25=IA64_TR_CURRENT_STACK
221 MOV_TO_KR(CURRENT_STACK, r26, r8, r9) // remember last page we mapped...
223 itr.d dtr[r25]=r23 // wire in new mapping...
224 SSM_PSR_IC_AND_SRLZ_D(r8, r9) // reenable the psr.ic bit
226 END(__paravirt_switch_to)
228 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
230 * Note that interrupts are enabled during save_switch_stack and load_switch_stack. This
231 * means that we may get an interrupt with "sp" pointing to the new kernel stack while
232 * ar.bspstore is still pointing to the old kernel backing store area. Since ar.rsc,
233 * ar.rnat, ar.bsp, and ar.bspstore are all preserved by interrupts, this is not a
234 * problem. Also, we don't need to specify unwind information for preserved registers
235 * that are not modified in save_switch_stack as the right unwind information is already
236 * specified at the call-site of save_switch_stack.
242 * - b7 holds address to return to
243 * - rp (b0) holds return address to save
245 GLOBAL_ENTRY(save_switch_stack)
248 flushrs // flush dirty regs to backing store (must be first in insn group)
250 mov r17=ar.unat // preserve caller's
252 #ifdef CONFIG_ITANIUM
255 adds r14=SW(R4)+16,sp
257 st8.spill [r14]=r4,16 // spill r4
258 lfetch.fault.excl.nt1 [r3],128
260 lfetch.fault.excl.nt1 [r2],128
261 lfetch.fault.excl.nt1 [r3],128
263 lfetch.fault.excl [r2]
264 lfetch.fault.excl [r3]
265 adds r15=SW(R5)+16,sp
271 st8.spill [r14]=r4,SW(R6)-SW(R4) // spill r4 and prefetch offset 0x1c0
272 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x010
274 lfetch.fault.excl.nt1 [r3],128 // prefetch offset 0x090
275 lfetch.fault.excl.nt1 [r2],128 // prefetch offset 0x190
277 lfetch.fault.excl.nt1 [r3] // prefetch offset 0x110
278 lfetch.fault.excl.nt1 [r2] // prefetch offset 0x210
279 adds r15=SW(R5)+16,sp
282 st8.spill [r15]=r5,SW(R7)-SW(R5) // spill r5
283 mov.m ar.rsc=0 // put RSE in mode: enforced lazy, little endian, pl 0
284 add r2=SW(F2)+16,sp // r2 = &sw->f2
286 st8.spill [r14]=r6,SW(B0)-SW(R6) // spill r6
287 mov.m r18=ar.fpsr // preserve fpsr
288 add r3=SW(F3)+16,sp // r3 = &sw->f3
295 st8.spill [r15]=r7,SW(B2)-SW(R7) // spill r7
298 // since we're done with the spills, read and save ar.unat:
300 mov.m r20=ar.bspstore
306 st8 [r14]=r21,SW(B1)-SW(B0) // save b0
307 st8 [r15]=r23,SW(B3)-SW(B2) // save b2
311 st8 [r14]=r22,SW(B4)-SW(B1) // save b1
312 st8 [r15]=r24,SW(AR_PFS)-SW(B3) // save b3
313 mov r21=ar.lc // I-unit
314 stf.spill [r2]=f12,32
315 stf.spill [r3]=f13,32
317 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
318 st8 [r15]=r16,SW(AR_LC)-SW(AR_PFS) // save ar.pfs
319 stf.spill [r2]=f14,32
320 stf.spill [r3]=f15,32
322 st8 [r14]=r26 // save b5
323 st8 [r15]=r21 // save ar.lc
324 stf.spill [r2]=f16,32
325 stf.spill [r3]=f17,32
327 stf.spill [r2]=f18,32
328 stf.spill [r3]=f19,32
330 stf.spill [r2]=f20,32
331 stf.spill [r3]=f21,32
333 stf.spill [r2]=f22,32
334 stf.spill [r3]=f23,32
336 stf.spill [r2]=f24,32
337 stf.spill [r3]=f25,32
339 stf.spill [r2]=f26,32
340 stf.spill [r3]=f27,32
342 stf.spill [r2]=f28,32
343 stf.spill [r3]=f29,32
345 stf.spill [r2]=f30,SW(AR_UNAT)-SW(F30)
346 stf.spill [r3]=f31,SW(PR)-SW(F31)
347 add r14=SW(CALLER_UNAT)+16,sp
349 st8 [r2]=r29,SW(AR_RNAT)-SW(AR_UNAT) // save ar.unat
350 st8 [r14]=r17,SW(AR_FPSR)-SW(CALLER_UNAT) // save caller_unat
353 st8 [r2]=r19,SW(AR_BSPSTORE)-SW(AR_RNAT) // save ar.rnat
354 st8 [r3]=r21 // save predicate registers
356 st8 [r2]=r20 // save ar.bspstore
357 st8 [r14]=r18 // save fpsr
358 mov ar.rsc=3 // put RSE back into eager mode, pl 0
360 END(save_switch_stack)
364 * - "invala" MUST be done at call site (normally in DO_LOAD_SWITCH_STACK)
365 * - b7 holds address to return to
366 * - must not touch r8-r11
368 GLOBAL_ENTRY(load_switch_stack)
373 lfetch.fault.nt1 [sp]
374 adds r2=SW(AR_BSPSTORE)+16,sp
375 adds r3=SW(AR_UNAT)+16,sp
376 mov ar.rsc=0 // put RSE into enforced lazy mode
377 adds r14=SW(CALLER_UNAT)+16,sp
378 adds r15=SW(AR_FPSR)+16,sp
380 ld8 r27=[r2],(SW(B0)-SW(AR_BSPSTORE)) // bspstore
381 ld8 r29=[r3],(SW(B1)-SW(AR_UNAT)) // unat
383 ld8 r21=[r2],16 // restore b0
384 ld8 r22=[r3],16 // restore b1
386 ld8 r23=[r2],16 // restore b2
387 ld8 r24=[r3],16 // restore b3
389 ld8 r25=[r2],16 // restore b4
390 ld8 r26=[r3],16 // restore b5
392 ld8 r16=[r2],(SW(PR)-SW(AR_PFS)) // ar.pfs
393 ld8 r17=[r3],(SW(AR_RNAT)-SW(AR_LC)) // ar.lc
395 ld8 r28=[r2] // restore pr
396 ld8 r30=[r3] // restore rnat
398 ld8 r18=[r14],16 // restore caller's unat
399 ld8 r19=[r15],24 // restore fpsr
407 ldf.fill f12=[r14],32
408 ldf.fill f13=[r15],32
410 ldf.fill f14=[r14],32
411 ldf.fill f15=[r15],32
413 ldf.fill f16=[r14],32
414 ldf.fill f17=[r15],32
416 ldf.fill f18=[r14],32
417 ldf.fill f19=[r15],32
420 ldf.fill f20=[r14],32
421 ldf.fill f21=[r15],32
424 ldf.fill f22=[r14],32
425 ldf.fill f23=[r15],32
429 mov ar.unat=r29 // establish unat holding the NaT bits for r4-r7
432 ldf.fill f24=[r14],32
433 ldf.fill f25=[r15],32
436 ldf.fill f26=[r14],32
437 ldf.fill f27=[r15],32
440 ldf.fill f28=[r14],32
441 ldf.fill f29=[r15],32
444 ldf.fill f30=[r14],32
445 ldf.fill f31=[r15],24
455 mov ar.unat=r18 // restore caller's unat
456 mov ar.rnat=r30 // must restore after bspstore but before rsc!
457 mov ar.fpsr=r19 // restore fpsr
458 mov ar.rsc=3 // put RSE back into eager mode, pl 0
460 END(load_switch_stack)
462 GLOBAL_ENTRY(prefetch_stack)
463 add r14 = -IA64_SWITCH_STACK_SIZE, sp
464 add r15 = IA64_TASK_THREAD_KSP_OFFSET, in0
466 ld8 r16 = [r15] // load next's stack pointer
467 lfetch.fault.excl [r14], 128
469 lfetch.fault.excl [r14], 128
470 lfetch.fault [r16], 128
472 lfetch.fault.excl [r14], 128
473 lfetch.fault [r16], 128
475 lfetch.fault.excl [r14], 128
476 lfetch.fault [r16], 128
478 lfetch.fault.excl [r14], 128
479 lfetch.fault [r16], 128
481 lfetch.fault [r16], 128
486 * Invoke a system call, but do some tracing before and after the call.
487 * We MUST preserve the current register frame throughout this routine
488 * because some system calls (such as ia64_execve) directly
491 GLOBAL_ENTRY(ia64_trace_syscall)
492 PT_REGS_UNWIND_INFO(0)
494 * We need to preserve the scratch registers f6-f11 in case the system
497 adds r16=PT(F6)+16,sp
498 adds r17=PT(F7)+16,sp
500 stf.spill [r16]=f6,32
501 stf.spill [r17]=f7,32
503 stf.spill [r16]=f8,32
504 stf.spill [r17]=f9,32
508 br.call.sptk.many rp=syscall_trace_enter // give parent a chance to catch syscall args
509 cmp.lt p6,p0=r8,r0 // check tracehook
510 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
511 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
513 (p6) br.cond.sptk strace_error // syscall failed ->
514 adds r16=PT(F6)+16,sp
515 adds r17=PT(F7)+16,sp
525 // the syscall number may have changed, so re-load it and re-calculate the
526 // syscall entry-point:
527 adds r15=PT(R15)+16,sp // r15 = &pt_regs.r15 (syscall #)
530 mov r3=NR_syscalls - 1
533 movl r16=sys_call_table
535 shladd r20=r15,3,r16 // r20 = sys_call_table + 8*(syscall-1024)
538 (p6) ld8 r20=[r20] // load address of syscall entry point
539 (p7) movl r20=sys_ni_syscall
542 br.call.sptk.many rp=b6 // do the syscall
543 .strace_check_retval:
544 cmp.lt p6,p0=r8,r0 // syscall failed?
545 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
546 adds r3=PT(R10)+16,sp // r3 = &pt_regs.r10
548 (p6) br.cond.sptk strace_error // syscall failed ->
549 ;; // avoid RAW on r10
551 .mem.offset 0,0; st8.spill [r2]=r8 // store return value in slot for r8
552 .mem.offset 8,0; st8.spill [r3]=r10 // clear error indication in slot for r10
553 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
555 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
556 (pUStk) rsm psr.i // disable interrupts
557 br.cond.sptk ia64_work_pending_syscall_end
560 ld8 r3=[r2] // load pt_regs.r8
561 sub r9=0,r8 // negate return value to get errno value
563 cmp.ne p6,p0=r3,r0 // is pt_regs.r8!=0?
564 adds r3=16,r2 // r3=&pt_regs.r10
568 br.cond.sptk .strace_save_retval
569 END(ia64_trace_syscall)
572 * When traced and returning from sigreturn, we invoke syscall_trace but then
573 * go straight to ia64_leave_kernel rather than ia64_leave_syscall.
575 GLOBAL_ENTRY(ia64_strace_leave_kernel)
576 PT_REGS_UNWIND_INFO(0)
578 * Some versions of gas generate bad unwind info if the first instruction of a
579 * procedure doesn't go into the first slot of a bundle. This is a workaround.
583 br.call.sptk.many rp=syscall_trace_leave // give parent a chance to catch return value
585 .ret4: br.cond.sptk ia64_leave_kernel
586 END(ia64_strace_leave_kernel)
589 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(0)
590 /* call the kernel_thread payload; fn is in r4, arg - in r5 */
591 alloc loc1=ar.pfs,0,3,1,0
595 ld8 r14 = [r4], 8 // fn.address
598 ld8 gp = [r4] // fn.gp
600 br.call.sptk.many rp=b6 // fn(arg)
604 /* ... and if it has returned, we are going to userland */
605 cmp.ne pKStk,pUStk=r0,r0
609 GLOBAL_ENTRY(ia64_ret_from_clone)
610 PT_REGS_UNWIND_INFO(0)
612 * Some versions of gas generate bad unwind info if the first instruction of a
613 * procedure doesn't go into the first slot of a bundle. This is a workaround.
618 * We need to call schedule_tail() to complete the scheduling process.
619 * Called by ia64_switch_to() after do_fork()->copy_thread(). r8 contains the
620 * address of the previously executing task.
622 br.call.sptk.many rp=ia64_invoke_schedule_tail
625 (pKStk) br.call.sptk.many rp=call_payload
626 adds r2=TI_FLAGS+IA64_TASK_SIZE,r13
631 and r2=_TIF_SYSCALL_TRACEAUDIT,r2
634 (p6) br.cond.spnt .strace_check_retval
635 ;; // added stop bits to prevent r8 dependency
636 END(ia64_ret_from_clone)
638 GLOBAL_ENTRY(ia64_ret_from_syscall)
639 PT_REGS_UNWIND_INFO(0)
640 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
641 adds r2=PT(R8)+16,sp // r2 = &pt_regs.r8
642 mov r10=r0 // clear error indication in r10
643 (p7) br.cond.spnt handle_syscall_error // handle potential syscall failure
644 #ifdef CONFIG_PARAVIRT
646 br.cond.sptk.few ia64_leave_syscall
648 #endif /* CONFIG_PARAVIRT */
649 END(ia64_ret_from_syscall)
650 #ifndef CONFIG_PARAVIRT
653 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */
656 * ia64_leave_syscall(): Same as ia64_leave_kernel, except that it doesn't
657 * need to switch to bank 0 and doesn't restore the scratch registers.
658 * To avoid leaking kernel bits, the scratch registers are set to
659 * the following known-to-be-safe values:
661 * r1: restored (global pointer)
663 * r3: 1 (when returning to user-level)
664 * r8-r11: restored (syscall return value(s))
665 * r12: restored (user-level stack pointer)
666 * r13: restored (user-level thread pointer)
667 * r14: set to __kernel_syscall_via_epc
668 * r15: restored (syscall #)
672 * r20: user-level ar.fpsr
675 * r23: user-level ar.bspstore
676 * r24: user-level ar.rnat
677 * r25: user-level ar.unat
678 * r26: user-level ar.pfs
679 * r27: user-level ar.rsc
681 * r29: user-level psr
682 * r30: user-level cfm
685 * pr: restored (user-level pr)
686 * b0: restored (user-level rp)
688 * b7: set to __kernel_syscall_via_epc
689 * ar.unat: restored (user-level ar.unat)
690 * ar.pfs: restored (user-level ar.pfs)
691 * ar.rsc: restored (user-level ar.rsc)
692 * ar.rnat: restored (user-level ar.rnat)
693 * ar.bspstore: restored (user-level ar.bspstore)
694 * ar.fpsr: restored (user-level ar.fpsr)
699 GLOBAL_ENTRY(__paravirt_leave_syscall)
700 PT_REGS_UNWIND_INFO(0)
702 * work.need_resched etc. mustn't get changed by this CPU before it returns to
703 * user- or fsys-mode, hence we disable interrupts early on.
705 * p6 controls whether current_thread_info()->flags needs to be check for
706 * extra work. We always check for extra work when returning to user-level.
707 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
708 * is 0. After extra work processing has been completed, execution
709 * resumes at ia64_work_processed_syscall with p6 set to 1 if the extra-work-check
710 * needs to be redone.
712 #ifdef CONFIG_PREEMPT
713 RSM_PSR_I(p0, r2, r18) // disable interrupts
714 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
715 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
717 .pred.rel.mutex pUStk,pKStk
718 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
719 (pUStk) mov r21=0 // r21 <- 0
721 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
722 #else /* !CONFIG_PREEMPT */
723 RSM_PSR_I(pUStk, r2, r18)
724 cmp.eq pLvSys,p0=r0,r0 // pLvSys=1: leave from syscall
725 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
727 .global __paravirt_work_processed_syscall;
728 __paravirt_work_processed_syscall:
729 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
730 adds r2=PT(LOADRS)+16,r12
731 MOV_FROM_ITC(pUStk, p9, r22, r19) // fetch time at leave
732 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
734 (p6) ld4 r31=[r18] // load current_thread_info()->flags
735 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
736 adds r3=PT(AR_BSPSTORE)+16,r12 // deferred
739 adds r2=PT(LOADRS)+16,r12
740 adds r3=PT(AR_BSPSTORE)+16,r12
741 adds r18=TI_FLAGS+IA64_TASK_SIZE,r13
743 (p6) ld4 r31=[r18] // load current_thread_info()->flags
744 ld8 r19=[r2],PT(B6)-PT(LOADRS) // load ar.rsc value for "loadrs"
748 mov r16=ar.bsp // M2 get existing backing store pointer
749 ld8 r18=[r2],PT(R9)-PT(B6) // load b6
750 (p6) and r15=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
752 ld8 r23=[r3],PT(R11)-PT(AR_BSPSTORE) // load ar.bspstore (may be garbage)
753 (p6) cmp4.ne.unc p6,p0=r15, r0 // any special work pending?
754 (p6) br.cond.spnt .work_pending_syscall
756 // start restoring the state saved on the kernel stack (struct pt_regs):
757 ld8 r9=[r2],PT(CR_IPSR)-PT(R9)
758 ld8 r11=[r3],PT(CR_IIP)-PT(R11)
759 (pNonSys) break 0 // bug check: we shouldn't be here if pNonSys is TRUE!
761 invala // M0|1 invalidate ALAT
762 RSM_PSR_I_IC(r28, r29, r30) // M2 turn off interrupts and interruption collection
763 cmp.eq p9,p0=r0,r0 // A set p9 to indicate that we should restore cr.ifs
765 ld8 r29=[r2],16 // M0|1 load cr.ipsr
766 ld8 r28=[r3],16 // M0|1 load cr.iip
767 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
768 (pUStk) add r14=TI_AC_LEAVE+IA64_TASK_SIZE,r13
770 ld8 r30=[r2],16 // M0|1 load cr.ifs
771 ld8 r25=[r3],16 // M0|1 load ar.unat
772 (pUStk) add r15=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
775 mov r22=r0 // A clear r22
777 ld8 r30=[r2],16 // M0|1 load cr.ifs
778 ld8 r25=[r3],16 // M0|1 load ar.unat
779 (pUStk) add r14=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
782 ld8 r26=[r2],PT(B0)-PT(AR_PFS) // M0|1 load ar.pfs
783 MOV_FROM_PSR(pKStk, r22, r21) // M2 read PSR now that interrupts are disabled
786 ld8 r21=[r2],PT(AR_RNAT)-PT(B0) // M0|1 load b0
787 ld8 r27=[r3],PT(PR)-PT(AR_RSC) // M0|1 load ar.rsc
788 mov f6=f0 // F clear f6
790 ld8 r24=[r2],PT(AR_FPSR)-PT(AR_RNAT) // M0|1 load ar.rnat (may be garbage)
791 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
792 mov f7=f0 // F clear f7
794 ld8 r20=[r2],PT(R12)-PT(AR_FPSR) // M0|1 load ar.fpsr
795 ld8.fill r1=[r3],16 // M0|1 load r1
796 (pUStk) mov r17=1 // A
798 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
799 (pUStk) st1 [r15]=r17 // M2|3
801 (pUStk) st1 [r14]=r17 // M2|3
803 ld8.fill r13=[r3],16 // M0|1
804 mov f8=f0 // F clear f8
806 ld8.fill r12=[r2] // M0|1 restore r12 (sp)
807 ld8.fill r15=[r3] // M0|1 restore r15
808 mov b6=r18 // I0 restore b6
810 LOAD_PHYS_STACK_REG_SIZE(r17)
811 mov f9=f0 // F clear f9
812 (pKStk) br.cond.dpnt.many skip_rbs_switch // B
814 srlz.d // M0 ensure interruption collection is off (for cover)
815 shr.u r18=r19,16 // I0|1 get byte size of existing "dirty" partition
816 COVER // B add current frame into dirty partition & set cr.ifs
818 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
819 mov r19=ar.bsp // M2 get new backing store pointer
820 st8 [r14]=r22 // M save time at leave
821 mov f10=f0 // F clear f10
823 mov r22=r0 // A clear r22
824 movl r14=__kernel_syscall_via_epc // X
827 mov r19=ar.bsp // M2 get new backing store pointer
828 mov f10=f0 // F clear f10
831 movl r14=__kernel_syscall_via_epc // X
834 mov.m ar.csd=r0 // M2 clear ar.csd
835 mov.m ar.ccv=r0 // M2 clear ar.ccv
836 mov b7=r14 // I0 clear b7 (hint with __kernel_syscall_via_epc)
838 mov.m ar.ssd=r0 // M2 clear ar.ssd
839 mov f11=f0 // F clear f11
840 br.cond.sptk.many rbs_switch // B
841 END(__paravirt_leave_syscall)
843 GLOBAL_ENTRY(__paravirt_leave_kernel)
844 PT_REGS_UNWIND_INFO(0)
846 * work.need_resched etc. mustn't get changed by this CPU before it returns to
847 * user- or fsys-mode, hence we disable interrupts early on.
849 * p6 controls whether current_thread_info()->flags needs to be check for
850 * extra work. We always check for extra work when returning to user-level.
851 * With CONFIG_PREEMPT, we also check for extra work when the preempt_count
852 * is 0. After extra work processing has been completed, execution
853 * resumes at .work_processed_syscall with p6 set to 1 if the extra-work-check
854 * needs to be redone.
856 #ifdef CONFIG_PREEMPT
857 RSM_PSR_I(p0, r17, r31) // disable interrupts
858 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
859 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
861 .pred.rel.mutex pUStk,pKStk
862 (pKStk) ld4 r21=[r20] // r21 <- preempt_count
863 (pUStk) mov r21=0 // r21 <- 0
865 cmp.eq p6,p0=r21,r0 // p6 <- pUStk || (preempt_count == 0)
867 RSM_PSR_I(pUStk, r17, r31)
868 cmp.eq p0,pLvSys=r0,r0 // pLvSys=0: leave from kernel
869 (pUStk) cmp.eq.unc p6,p0=r0,r0 // p6 <- pUStk
871 .work_processed_kernel:
872 adds r17=TI_FLAGS+IA64_TASK_SIZE,r13
874 (p6) ld4 r31=[r17] // load current_thread_info()->flags
875 adds r21=PT(PR)+16,r12
878 lfetch [r21],PT(CR_IPSR)-PT(PR)
879 adds r2=PT(B6)+16,r12
880 adds r3=PT(R16)+16,r12
883 ld8 r28=[r2],8 // load b6
884 adds r29=PT(R24)+16,r12
886 ld8.fill r16=[r3],PT(AR_CSD)-PT(R16)
887 adds r30=PT(AR_CCV)+16,r12
888 (p6) and r19=TIF_WORK_MASK,r31 // any work other than TIF_SYSCALL_TRACE?
891 ld8 r15=[r30] // load ar.ccv
892 (p6) cmp4.ne.unc p6,p0=r19, r0 // any special work pending?
894 ld8 r29=[r2],16 // load b7
895 ld8 r30=[r3],16 // load ar.csd
896 (p6) br.cond.spnt .work_pending
898 ld8 r31=[r2],16 // load ar.ssd
902 ld8.fill r10=[r3],PT(R17)-PT(R10)
904 ld8.fill r11=[r2],PT(R18)-PT(R11)
915 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
916 invala // invalidate ALAT
932 ld8.fill r31=[r2],PT(F9)-PT(R31)
933 adds r3=PT(F10)-PT(F6),r3
935 ldf.fill f9=[r2],PT(F6)-PT(F9)
936 ldf.fill f10=[r3],PT(F8)-PT(F10)
938 ldf.fill f6=[r2],PT(F7)-PT(F6)
940 ldf.fill f7=[r2],PT(F11)-PT(F7)
943 srlz.d // ensure that inter. collection is off (VHPT is don't care, since text is pinned)
947 BSW_0(r2, r3, r15) // switch back to bank 0 (no stop bit required beforehand...)
949 (pUStk) mov r18=IA64_KR(CURRENT)// M2 (12 cycle read latency)
950 adds r16=PT(CR_IPSR)+16,r12
951 adds r17=PT(CR_IIP)+16,r12
953 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
954 .pred.rel.mutex pUStk,pKStk
955 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
956 MOV_FROM_ITC(pUStk, p9, r22, r29) // M fetch time at leave
960 MOV_FROM_PSR(pKStk, r22, r29) // M2 read PSR now that interrupts are disabled
965 ld8 r29=[r16],16 // load cr.ipsr
966 ld8 r28=[r17],16 // load cr.iip
968 ld8 r30=[r16],16 // load cr.ifs
969 ld8 r25=[r17],16 // load ar.unat
971 ld8 r26=[r16],16 // load ar.pfs
972 ld8 r27=[r17],16 // load ar.rsc
973 cmp.eq p9,p0=r0,r0 // set p9 to indicate that we should restore cr.ifs
975 ld8 r24=[r16],16 // load ar.rnat (may be garbage)
976 ld8 r23=[r17],16 // load ar.bspstore (may be garbage)
978 ld8 r31=[r16],16 // load predicates
979 ld8 r21=[r17],16 // load b0
981 ld8 r19=[r16],16 // load ar.rsc value for "loadrs"
982 ld8.fill r1=[r17],16 // load r1
984 ld8.fill r12=[r16],16
985 ld8.fill r13=[r17],16
986 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
987 (pUStk) adds r3=TI_AC_LEAVE+IA64_TASK_SIZE,r18
989 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18
992 ld8 r20=[r16],16 // ar.fpsr
993 ld8.fill r15=[r17],16
994 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
995 (pUStk) adds r18=IA64_TASK_THREAD_ON_USTACK_OFFSET,r18 // deferred
998 ld8.fill r14=[r16],16
1002 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1003 // mmi_ : ld8 st1 shr;; mmi_ : st8 st1 shr;;
1004 // mib : mov add br -> mib : ld8 add br
1005 // bbb_ : br nop cover;; mbb_ : mov br cover;;
1007 // no one require bsp in r16 if (pKStk) branch is selected.
1008 (pUStk) st8 [r3]=r22 // save time at leave
1009 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1010 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1012 ld8.fill r3=[r16] // deferred
1013 LOAD_PHYS_STACK_REG_SIZE(r17)
1014 (pKStk) br.cond.dpnt skip_rbs_switch
1015 mov r16=ar.bsp // get existing backing store pointer
1018 (pUStk) st1 [r18]=r17 // restore current->thread.on_ustack
1019 shr.u r18=r19,16 // get byte size of existing "dirty" partition
1021 mov r16=ar.bsp // get existing backing store pointer
1022 LOAD_PHYS_STACK_REG_SIZE(r17)
1023 (pKStk) br.cond.dpnt skip_rbs_switch
1027 * Restore user backing store.
1029 * NOTE: alloc, loadrs, and cover can't be predicated.
1031 (pNonSys) br.cond.dpnt dont_preserve_current_frame
1032 COVER // add current frame into dirty partition and set cr.ifs
1034 mov r19=ar.bsp // get new backing store pointer
1036 sub r16=r16,r18 // krbs = old bsp - size of dirty partition
1037 cmp.ne p9,p0=r0,r0 // clear p9 to skip restore of cr.ifs
1039 sub r19=r19,r16 // calculate total byte size of dirty partition
1040 add r18=64,r18 // don't force in0-in7 into memory...
1042 shl r19=r19,16 // shift size of dirty partition into loadrs position
1044 dont_preserve_current_frame:
1046 * To prevent leaking bits between the kernel and user-space,
1047 * we must clear the stacked registers in the "invalid" partition here.
1048 * Not pretty, but at least it's fast (3.34 registers/cycle on Itanium,
1049 * 5 registers/cycle on McKinley).
1051 # define pRecurse p6
1053 #ifdef CONFIG_ITANIUM
1058 alloc loc0=ar.pfs,2,Nregs-2,2,0
1059 shr.u loc1=r18,9 // RNaTslots <= floor(dirtySize / (64*8))
1060 sub r17=r17,r18 // r17 = (physStackedSize + 8) - dirtySize
1062 mov ar.rsc=r19 // load ar.rsc to be used for "loadrs"
1063 shladd in0=loc1,3,r17
1068 #ifdef CONFIG_ITANIUM
1071 alloc loc0=ar.pfs,2,Nregs-2,2,0
1072 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1073 add out0=-Nregs*8,in0
1075 add out1=1,in1 // increment recursion count
1077 nop.b 0 // can't do br.call here because of alloc (WAW on CFM)
1086 (pRecurse) br.call.sptk.many b0=rse_clear_invalid
1091 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1095 (pReturn) br.ret.sptk.many b0
1097 #else /* !CONFIG_ITANIUM */
1098 alloc loc0=ar.pfs,2,Nregs-2,2,0
1099 cmp.lt pRecurse,p0=Nregs*8,in0 // if more than Nregs regs left to clear, (re)curse
1100 add out0=-Nregs*8,in0
1101 add out1=1,in1 // increment recursion count
1110 (pRecurse) br.call.dptk.few b0=rse_clear_invalid
1114 cmp.ne pReturn,p0=r0,in1 // if recursion count != 0, we need to do a br.ret
1117 (pReturn) br.ret.dptk.many b0
1118 #endif /* !CONFIG_ITANIUM */
1122 alloc r17=ar.pfs,0,0,0,0 // drop current register frame
1127 mov ar.unat=r25 // M2
1128 (pKStk) extr.u r22=r22,21,1 // I0 extract current value of psr.pp from r22
1129 (pLvSys)mov r19=r0 // A clear r19 for leave_syscall, no-op otherwise
1131 (pUStk) mov ar.bspstore=r23 // M2
1132 (pKStk) dep r29=r22,r29,21,1 // I0 update ipsr.pp with psr.pp
1133 (pLvSys)mov r16=r0 // A clear r16 for leave_syscall, no-op otherwise
1135 MOV_TO_IPSR(p0, r29, r25) // M2
1136 mov ar.pfs=r26 // I0
1137 (pLvSys)mov r17=r0 // A clear r17 for leave_syscall, no-op otherwise
1139 MOV_TO_IFS(p9, r30, r25)// M2
1141 (pLvSys)mov r18=r0 // A clear r18 for leave_syscall, no-op otherwise
1143 mov ar.fpsr=r20 // M2
1144 MOV_TO_IIP(r28, r25) // M2
1147 (pUStk) mov ar.rnat=r24 // M2 must happen with RSE in lazy mode
1151 mov ar.rsc=r27 // M2
1157 * r20 = ¤t->thread_info->pre_count (if CONFIG_PREEMPT)
1158 * r31 = current->thread_info->flags
1160 * p6 = TRUE if work-pending-check needs to be redone
1162 * Interrupts are disabled on entry, reenabled depend on work, and
1165 .work_pending_syscall:
1172 tbit.z p6,p0=r31,TIF_NEED_RESCHED // is resched not needed?
1173 (p6) br.cond.sptk.few .notify
1174 #ifdef CONFIG_PREEMPT
1175 (pKStk) dep r21=-1,r0,PREEMPT_ACTIVE_BIT,1
1177 (pKStk) st4 [r20]=r21
1179 SSM_PSR_I(p0, p6, r2) // enable interrupts
1180 br.call.spnt.many rp=schedule
1181 .ret9: cmp.eq p6,p0=r0,r0 // p6 <- 1 (re-check)
1182 RSM_PSR_I(p0, r2, r20) // disable interrupts
1184 #ifdef CONFIG_PREEMPT
1185 (pKStk) adds r20=TI_PRE_COUNT+IA64_TASK_SIZE,r13
1187 (pKStk) st4 [r20]=r0 // preempt_count() <- 0
1189 (pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1190 br.cond.sptk.many .work_processed_kernel
1193 (pUStk) br.call.spnt.many rp=notify_resume_user
1194 .ret10: cmp.ne p6,p0=r0,r0 // p6 <- 0 (don't re-check)
1195 (pLvSys)br.cond.sptk.few __paravirt_pending_syscall_end
1196 br.cond.sptk.many .work_processed_kernel
1198 .global __paravirt_pending_syscall_end;
1199 __paravirt_pending_syscall_end:
1200 adds r2=PT(R8)+16,r12
1201 adds r3=PT(R10)+16,r12
1205 br.cond.sptk.many __paravirt_work_processed_syscall_target
1206 END(__paravirt_leave_kernel)
1208 #ifdef __IA64_ASM_PARAVIRTUALIZED_NATIVE
1209 ENTRY(handle_syscall_error)
1211 * Some system calls (e.g., ptrace, mmap) can return arbitrary values which could
1212 * lead us to mistake a negative return value as a failed syscall. Those syscall
1213 * must deposit a non-zero value in pt_regs.r8 to indicate an error. If
1214 * pt_regs.r8 is zero, we assume that the call completed successfully.
1216 PT_REGS_UNWIND_INFO(0)
1217 ld8 r3=[r2] // load pt_regs.r8
1219 cmp.eq p6,p7=r3,r0 // is pt_regs.r8==0?
1222 (p7) sub r8=0,r8 // negate return value to get errno
1223 br.cond.sptk ia64_leave_syscall
1224 END(handle_syscall_error)
1227 * Invoke schedule_tail(task) while preserving in0-in7, which may be needed
1228 * in case a system call gets restarted.
1230 GLOBAL_ENTRY(ia64_invoke_schedule_tail)
1231 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1232 alloc loc1=ar.pfs,8,2,1,0
1234 mov out0=r8 // Address of previous task
1236 br.call.sptk.many rp=schedule_tail
1237 .ret11: mov ar.pfs=loc1
1240 END(ia64_invoke_schedule_tail)
1243 * Setup stack and call do_notify_resume_user(), keeping interrupts
1246 * Note that pSys and pNonSys need to be set up by the caller.
1247 * We declare 8 input registers so the system call args get preserved,
1248 * in case we need to restart a system call.
1250 GLOBAL_ENTRY(notify_resume_user)
1251 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(8)
1252 alloc loc1=ar.pfs,8,2,3,0 // preserve all eight input regs in case of syscall restart!
1254 mov loc0=rp // save return address
1255 mov out0=0 // there is no "oldset"
1256 adds out1=8,sp // out1=&sigscratch->ar_pfs
1257 (pSys) mov out2=1 // out2==1 => we're in a syscall
1259 (pNonSys) mov out2=0 // out2==0 => not a syscall
1261 .spillsp ar.unat, 16
1262 st8 [sp]=r9,-16 // allocate space for ar.unat and save it
1263 st8 [out1]=loc1,-8 // save ar.pfs, out1=&sigscratch
1265 br.call.sptk.many rp=do_notify_resume_user
1267 adds sp=16,sp // pop scratch stack space
1269 ld8 r9=[sp] // load new unat from sigscratch->scratch_unat
1275 END(notify_resume_user)
1277 ENTRY(sys_rt_sigreturn)
1278 PT_REGS_UNWIND_INFO(0)
1280 * Allocate 8 input registers since ptrace() may clobber them
1282 alloc r2=ar.pfs,8,0,1,0
1287 cmp.eq pNonSys,pSys=r0,r0 // sigreturn isn't a normal syscall...
1290 * leave_kernel() restores f6-f11 from pt_regs, but since the streamlined
1291 * syscall-entry path does not save them we save them here instead. Note: we
1292 * don't need to save any other registers that are not saved by the stream-lined
1293 * syscall path, because restore_sigcontext() restores them.
1295 adds r16=PT(F6)+32,sp
1296 adds r17=PT(F7)+32,sp
1298 stf.spill [r16]=f6,32
1299 stf.spill [r17]=f7,32
1301 stf.spill [r16]=f8,32
1302 stf.spill [r17]=f9,32
1306 adds out0=16,sp // out0 = &sigscratch
1307 br.call.sptk.many rp=ia64_rt_sigreturn
1308 .ret19: .restore sp,0
1311 ld8 r9=[sp] // load new ar.unat
1312 mov.sptk b7=r8,ia64_native_leave_kernel
1316 END(sys_rt_sigreturn)
1318 GLOBAL_ENTRY(ia64_prepare_handle_unaligned)
1321 * r16 = fake ar.pfs, we simply need to make sure privilege is still 0
1324 DO_SAVE_SWITCH_STACK
1325 br.call.sptk.many rp=ia64_handle_unaligned // stack frame setup in ivt
1327 DO_LOAD_SWITCH_STACK
1328 br.cond.sptk.many rp // goes to ia64_leave_kernel
1329 END(ia64_prepare_handle_unaligned)
1332 // unw_init_running(void (*callback)(info, arg), void *arg)
1334 # define EXTRA_FRAME_SIZE ((UNW_FRAME_INFO_SIZE+15)&~15)
1336 GLOBAL_ENTRY(unw_init_running)
1337 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1338 alloc loc1=ar.pfs,2,3,3,0
1343 DO_SAVE_SWITCH_STACK
1346 .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
1347 .fframe IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE
1348 SWITCH_STACK_SAVES(EXTRA_FRAME_SIZE)
1349 adds sp=-EXTRA_FRAME_SIZE,sp
1352 adds out0=16,sp // &info
1353 mov out1=r13 // current
1354 adds out2=16+EXTRA_FRAME_SIZE,sp // &switch_stack
1355 br.call.sptk.many rp=unw_init_frame_info
1356 1: adds out0=16,sp // &info
1358 mov loc2=gp // save gp across indirect function call
1362 br.call.sptk.many rp=b6 // invoke the callback function
1363 1: mov gp=loc2 // restore gp
1365 // For now, we don't allow changing registers from within
1366 // unw_init_running; if we ever want to allow that, we'd
1367 // have to do a load_switch_stack here:
1369 adds sp=IA64_SWITCH_STACK_SIZE+EXTRA_FRAME_SIZE,sp
1374 END(unw_init_running)
1376 #ifdef CONFIG_FUNCTION_TRACER
1377 #ifdef CONFIG_DYNAMIC_FTRACE
1378 GLOBAL_ENTRY(_mcount)
1385 GLOBAL_ENTRY(ftrace_caller)
1386 alloc out0 = ar.pfs, 8, 0, 4, 0
1392 br.call.sptk.many b0 = ftrace_patch_gp
1393 //this might be called from module, so we must patch gp
1398 .global ftrace_call;
1405 alloc loc0 = ar.pfs, 4, 4, 2, 0
1412 adds out0 = -MCOUNT_INSN_SIZE, out0
1416 br.call.sptk.many b0 = b6
1427 GLOBAL_ENTRY(_mcount)
1428 movl r2 = ftrace_stub
1429 movl r3 = ftrace_trace_function;;
1432 cmp.eq p7,p0 = r2, r3
1433 (p7) br.sptk.many ftrace_stub
1436 alloc loc0 = ar.pfs, 4, 4, 2, 0
1443 adds out0 = -MCOUNT_INSN_SIZE, out0
1447 br.call.sptk.many b0 = b6
1458 GLOBAL_ENTRY(ftrace_stub)
1460 movl r2 = _mcount_ret_helper
1473 #endif /* CONFIG_FUNCTION_TRACER */
1477 .globl sys_call_table
1479 data8 sys_ni_syscall // This must be sys_ni_syscall! See ivt.S.
1480 data8 sys_exit // 1025
1485 data8 sys_creat // 1030
1490 data8 sys_fchdir // 1035
1495 data8 sys_lseek // 1040
1500 data8 sys_setuid // 1045
1505 data8 sys_sync // 1050
1510 data8 sys_mkdir // 1055
1515 data8 ia64_brk // 1060
1520 data8 sys_ioctl // 1065
1525 data8 sys_dup2 // 1070
1530 data8 sys_getresgid // 1075
1535 data8 sys_setpgid // 1080
1538 data8 sys_sethostname
1540 data8 sys_getrlimit // 1085
1542 data8 sys_gettimeofday
1543 data8 sys_settimeofday
1545 data8 sys_poll // 1090
1550 data8 sys_swapoff // 1095
1555 data8 sys_fchown // 1100
1556 data8 ia64_getpriority
1557 data8 sys_setpriority
1560 data8 sys_gettid // 1105
1565 data8 sys_msgsnd // 1110
1570 data8 sys_shmdt // 1115
1575 data8 sys_ni_syscall // 1120 /* was: ia64_oldstat */
1576 data8 sys_ni_syscall /* was: ia64_oldlstat */
1577 data8 sys_ni_syscall /* was: ia64_oldfstat */
1580 data8 sys_remap_file_pages // 1125
1584 data8 sys_setdomainname
1585 data8 sys_newuname // 1130
1587 data8 sys_ni_syscall /* was: ia64_create_module */
1588 data8 sys_init_module
1589 data8 sys_delete_module
1590 data8 sys_ni_syscall // 1135 /* was: sys_get_kernel_syms */
1591 data8 sys_ni_syscall /* was: sys_query_module */
1595 data8 sys_personality // 1140
1596 data8 sys_ni_syscall // sys_afs_syscall
1600 data8 sys_flock // 1145
1605 data8 sys_sysctl // 1150
1610 data8 sys_mprotect // 1155
1614 data8 sys_munlockall
1615 data8 sys_sched_getparam // 1160
1616 data8 sys_sched_setparam
1617 data8 sys_sched_getscheduler
1618 data8 sys_sched_setscheduler
1619 data8 sys_sched_yield
1620 data8 sys_sched_get_priority_max // 1165
1621 data8 sys_sched_get_priority_min
1622 data8 sys_sched_rr_get_interval
1624 data8 sys_ni_syscall // old nfsservctl
1625 data8 sys_prctl // 1170
1626 data8 sys_getpagesize
1628 data8 sys_pciconfig_read
1629 data8 sys_pciconfig_write
1630 data8 sys_perfmonctl // 1175
1631 data8 sys_sigaltstack
1632 data8 sys_rt_sigaction
1633 data8 sys_rt_sigpending
1634 data8 sys_rt_sigprocmask
1635 data8 sys_rt_sigqueueinfo // 1180
1636 data8 sys_rt_sigreturn
1637 data8 sys_rt_sigsuspend
1638 data8 sys_rt_sigtimedwait
1640 data8 sys_capget // 1185
1642 data8 sys_sendfile64
1643 data8 sys_ni_syscall // sys_getpmsg (STREAMS)
1644 data8 sys_ni_syscall // sys_putpmsg (STREAMS)
1645 data8 sys_socket // 1190
1650 data8 sys_getsockname // 1195
1651 data8 sys_getpeername
1652 data8 sys_socketpair
1655 data8 sys_recv // 1200
1658 data8 sys_setsockopt
1659 data8 sys_getsockopt
1660 data8 sys_sendmsg // 1205
1662 data8 sys_pivot_root
1665 data8 sys_newstat // 1210
1669 data8 sys_getdents64
1670 data8 sys_getunwind // 1215
1675 data8 sys_getxattr // 1220
1679 data8 sys_llistxattr
1680 data8 sys_flistxattr // 1225
1681 data8 sys_removexattr
1682 data8 sys_lremovexattr
1683 data8 sys_fremovexattr
1685 data8 sys_futex // 1230
1686 data8 sys_sched_setaffinity
1687 data8 sys_sched_getaffinity
1688 data8 sys_set_tid_address
1689 data8 sys_fadvise64_64
1690 data8 sys_tgkill // 1235
1691 data8 sys_exit_group
1692 data8 sys_lookup_dcookie
1694 data8 sys_io_destroy
1695 data8 sys_io_getevents // 1240
1698 data8 sys_epoll_create
1700 data8 sys_epoll_wait // 1245
1701 data8 sys_restart_syscall
1702 data8 sys_semtimedop
1703 data8 sys_timer_create
1704 data8 sys_timer_settime
1705 data8 sys_timer_gettime // 1250
1706 data8 sys_timer_getoverrun
1707 data8 sys_timer_delete
1708 data8 sys_clock_settime
1709 data8 sys_clock_gettime
1710 data8 sys_clock_getres // 1255
1711 data8 sys_clock_nanosleep
1715 data8 sys_get_mempolicy // 1260
1716 data8 sys_set_mempolicy
1719 data8 sys_mq_timedsend
1720 data8 sys_mq_timedreceive // 1265
1722 data8 sys_mq_getsetattr
1723 data8 sys_kexec_load
1724 data8 sys_ni_syscall // reserved for vserver
1725 data8 sys_waitid // 1270
1727 data8 sys_request_key
1729 data8 sys_ioprio_set
1730 data8 sys_ioprio_get // 1275
1731 data8 sys_move_pages
1732 data8 sys_inotify_init
1733 data8 sys_inotify_add_watch
1734 data8 sys_inotify_rm_watch
1735 data8 sys_migrate_pages // 1280
1740 data8 sys_futimesat // 1285
1741 data8 sys_newfstatat
1745 data8 sys_symlinkat // 1290
1746 data8 sys_readlinkat
1750 data8 sys_ppoll // 1295
1753 data8 sys_set_robust_list
1754 data8 sys_get_robust_list
1755 data8 sys_sync_file_range // 1300
1760 data8 sys_epoll_pwait // 1305
1763 data8 sys_ni_syscall
1765 data8 sys_timerfd_create // 1310
1766 data8 sys_timerfd_settime
1767 data8 sys_timerfd_gettime
1770 data8 sys_epoll_create1 // 1315
1773 data8 sys_inotify_init1
1775 data8 sys_pwritev // 1320
1776 data8 sys_rt_tgsigqueueinfo
1778 data8 sys_fanotify_init
1779 data8 sys_fanotify_mark
1780 data8 sys_prlimit64 // 1325
1781 data8 sys_name_to_handle_at
1782 data8 sys_open_by_handle_at
1783 data8 sys_clock_adjtime
1785 data8 sys_setns // 1330
1787 data8 sys_process_vm_readv
1788 data8 sys_process_vm_writev
1791 .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls
1792 #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */