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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
7 */
8
9 #include <linux/config.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/kernel.h>
14 #include <linux/kdev_t.h>
15 #include <linux/string.h>
16 #include <linux/tty.h>
17 #include <linux/console.h>
18 #include <linux/timex.h>
19 #include <linux/sched.h>
20 #include <linux/ioport.h>
21 #include <linux/mm.h>
22 #include <linux/serial.h>
23 #include <linux/irq.h>
24 #include <linux/bootmem.h>
25 #include <linux/mmzone.h>
26 #include <linux/interrupt.h>
27 #include <linux/acpi.h>
28 #include <linux/compiler.h>
29 #include <linux/sched.h>
30 #include <linux/root_dev.h>
31 #include <linux/nodemask.h>
32 #include <linux/pm.h>
33
34 #include <asm/io.h>
35 #include <asm/sal.h>
36 #include <asm/machvec.h>
37 #include <asm/system.h>
38 #include <asm/processor.h>
39 #include <asm/vga.h>
40 #include <asm/sn/arch.h>
41 #include <asm/sn/addrs.h>
42 #include <asm/sn/pda.h>
43 #include <asm/sn/nodepda.h>
44 #include <asm/sn/sn_cpuid.h>
45 #include <asm/sn/simulator.h>
46 #include <asm/sn/leds.h>
47 #include <asm/sn/bte.h>
48 #include <asm/sn/shub_mmr.h>
49 #include <asm/sn/clksupport.h>
50 #include <asm/sn/sn_sal.h>
51 #include <asm/sn/geo.h>
52 #include "xtalk/xwidgetdev.h"
53 #include "xtalk/hubdev.h"
54 #include <asm/sn/klconfig.h>
55
56
57 DEFINE_PER_CPU(struct pda_s, pda_percpu);
58
59 #define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
60
61 lboard_t *root_lboard[MAX_COMPACT_NODES];
62
63 extern void bte_init_node(nodepda_t *, cnodeid_t);
64
65 extern void sn_timer_init(void);
66 extern unsigned long last_time_offset;
67 extern void (*ia64_mark_idle) (int);
68 extern void snidle(int);
69 extern unsigned char acpi_kbd_controller_present;
70
71 unsigned long sn_rtc_cycles_per_second;
72 EXPORT_SYMBOL(sn_rtc_cycles_per_second);
73
74 DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
75 EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
76
77 DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
78 EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
79
80 DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
81 EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
82
83 char sn_system_serial_number_string[128];
84 EXPORT_SYMBOL(sn_system_serial_number_string);
85 u64 sn_partition_serial_number;
86 EXPORT_SYMBOL(sn_partition_serial_number);
87 u8 sn_partition_id;
88 EXPORT_SYMBOL(sn_partition_id);
89 u8 sn_system_size;
90 EXPORT_SYMBOL(sn_system_size);
91 u8 sn_sharing_domain_size;
92 EXPORT_SYMBOL(sn_sharing_domain_size);
93 u8 sn_coherency_id;
94 EXPORT_SYMBOL(sn_coherency_id);
95 u8 sn_region_size;
96 EXPORT_SYMBOL(sn_region_size);
97 int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
98
99 short physical_node_map[MAX_PHYSNODE_ID];
100
101 EXPORT_SYMBOL(physical_node_map);
102
103 int numionodes;
104
105 static void sn_init_pdas(char **);
106 static void scan_for_ionodes(void);
107
108 static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
109
110 /*
111 * The format of "screen_info" is strange, and due to early i386-setup
112 * code. This is just enough to make the console code think we're on a
113 * VGA color display.
114 */
115 struct screen_info sn_screen_info = {
116 .orig_x = 0,
117 .orig_y = 0,
118 .orig_video_mode = 3,
119 .orig_video_cols = 80,
120 .orig_video_ega_bx = 3,
121 .orig_video_lines = 25,
122 .orig_video_isVGA = 1,
123 .orig_video_points = 16
124 };
125
126 /*
127 * This is here so we can use the CMOS detection in ide-probe.c to
128 * determine what drives are present. In theory, we don't need this
129 * as the auto-detection could be done via ide-probe.c:do_probe() but
130 * in practice that would be much slower, which is painful when
131 * running in the simulator. Note that passing zeroes in DRIVE_INFO
132 * is sufficient (the IDE driver will autodetect the drive geometry).
133 */
134 #ifdef CONFIG_IA64_GENERIC
135 extern char drive_info[4 * 16];
136 #else
137 char drive_info[4 * 16];
138 #endif
139
140 /*
141 * Get nasid of current cpu early in boot before nodepda is initialized
142 */
143 static int
144 boot_get_nasid(void)
145 {
146 int nasid;
147
148 if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
149 BUG();
150 return nasid;
151 }
152
153 /*
154 * This routine can only be used during init, since
155 * smp_boot_data is an init data structure.
156 * We have to use smp_boot_data.cpu_phys_id to find
157 * the physical id of the processor because the normal
158 * cpu_physical_id() relies on data structures that
159 * may not be initialized yet.
160 */
161
162 static int __init pxm_to_nasid(int pxm)
163 {
164 int i;
165 int nid;
166
167 nid = pxm_to_nid_map[pxm];
168 for (i = 0; i < num_node_memblks; i++) {
169 if (node_memblk[i].nid == nid) {
170 return NASID_GET(node_memblk[i].start_paddr);
171 }
172 }
173 return -1;
174 }
175
176 /**
177 * early_sn_setup - early setup routine for SN platforms
178 *
179 * Sets up an initial console to aid debugging. Intended primarily
180 * for bringup. See start_kernel() in init/main.c.
181 */
182
183 void __init early_sn_setup(void)
184 {
185 efi_system_table_t *efi_systab;
186 efi_config_table_t *config_tables;
187 struct ia64_sal_systab *sal_systab;
188 struct ia64_sal_desc_entry_point *ep;
189 char *p;
190 int i, j;
191
192 /*
193 * Parse enough of the SAL tables to locate the SAL entry point. Since, console
194 * IO on SN2 is done via SAL calls, early_printk won't work without this.
195 *
196 * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
197 * Any changes to those file may have to be made hereas well.
198 */
199 efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
200 config_tables = __va(efi_systab->tables);
201 for (i = 0; i < efi_systab->nr_tables; i++) {
202 if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
203 0) {
204 sal_systab = __va(config_tables[i].table);
205 p = (char *)(sal_systab + 1);
206 for (j = 0; j < sal_systab->entry_count; j++) {
207 if (*p == SAL_DESC_ENTRY_POINT) {
208 ep = (struct ia64_sal_desc_entry_point
209 *)p;
210 ia64_sal_handler_init(__va
211 (ep->sal_proc),
212 __va(ep->gp));
213 return;
214 }
215 p += SAL_DESC_SIZE(*p);
216 }
217 }
218 }
219 /* Uh-oh, SAL not available?? */
220 printk(KERN_ERR "failed to find SAL entry point\n");
221 }
222
223 extern int platform_intr_list[];
224 extern nasid_t master_nasid;
225 static int __initdata shub_1_1_found = 0;
226
227 /*
228 * sn_check_for_wars
229 *
230 * Set flag for enabling shub specific wars
231 */
232
233 static inline int __init is_shub_1_1(int nasid)
234 {
235 unsigned long id;
236 int rev;
237
238 if (is_shub2())
239 return 0;
240 id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
241 rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
242 return rev <= 2;
243 }
244
245 static void __init sn_check_for_wars(void)
246 {
247 int cnode;
248
249 if (is_shub2()) {
250 /* none yet */
251 } else {
252 for_each_online_node(cnode) {
253 if (is_shub_1_1(cnodeid_to_nasid(cnode)))
254 shub_1_1_found = 1;
255 }
256 }
257 }
258
259 /**
260 * sn_setup - SN platform setup routine
261 * @cmdline_p: kernel command line
262 *
263 * Handles platform setup for SN machines. This includes determining
264 * the RTC frequency (via a SAL call), initializing secondary CPUs, and
265 * setting up per-node data areas. The console is also initialized here.
266 */
267 void __init sn_setup(char **cmdline_p)
268 {
269 long status, ticks_per_sec, drift;
270 int pxm;
271 u32 version = sn_sal_rev();
272 extern void sn_cpu_init(void);
273
274 ia64_sn_plat_set_error_handling_features();
275
276 #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
277 /*
278 * If there was a primary vga adapter identified through the
279 * EFI PCDP table, make it the preferred console. Otherwise
280 * zero out conswitchp.
281 */
282
283 if (vga_console_membase) {
284 /* usable vga ... make tty0 the preferred default console */
285 add_preferred_console("tty", 0, NULL);
286 } else {
287 printk(KERN_DEBUG "SGI: Disabling VGA console\n");
288 #ifdef CONFIG_DUMMY_CONSOLE
289 conswitchp = &dummy_con;
290 #else
291 conswitchp = NULL;
292 #endif /* CONFIG_DUMMY_CONSOLE */
293 }
294 #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
295
296 MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
297
298 memset(physical_node_map, -1, sizeof(physical_node_map));
299 for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
300 if (pxm_to_nid_map[pxm] != -1)
301 physical_node_map[pxm_to_nasid(pxm)] =
302 pxm_to_nid_map[pxm];
303
304 /*
305 * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
306 * support here so we don't have to listen to failed keyboard probe
307 * messages.
308 */
309 if (version <= 0x0209 && acpi_kbd_controller_present) {
310 printk(KERN_INFO "Disabling legacy keyboard support as prom "
311 "is too old and doesn't provide FADT\n");
312 acpi_kbd_controller_present = 0;
313 }
314
315 printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
316
317 /*
318 * Confirm the SAL we're running on is recent enough...
319 */
320 if (version < SN_SAL_MIN_VERSION) {
321 printk(KERN_ERR "This kernel needs SGI SAL version >= "
322 "%x.%02x\n", SN_SAL_MIN_VERSION >> 8,
323 SN_SAL_MIN_VERSION & 0x00FF);
324 panic("PROM version too old\n");
325 }
326
327 master_nasid = boot_get_nasid();
328
329 status =
330 ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
331 &drift);
332 if (status != 0 || ticks_per_sec < 100000) {
333 printk(KERN_WARNING
334 "unable to determine platform RTC clock frequency, guessing.\n");
335 /* PROM gives wrong value for clock freq. so guess */
336 sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
337 } else
338 sn_rtc_cycles_per_second = ticks_per_sec;
339
340 platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
341
342 /*
343 * we set the default root device to /dev/hda
344 * to make simulation easy
345 */
346 ROOT_DEV = Root_HDA1;
347
348 /*
349 * Create the PDAs and NODEPDAs for all the cpus.
350 */
351 sn_init_pdas(cmdline_p);
352
353 ia64_mark_idle = &snidle;
354
355 /*
356 * For the bootcpu, we do this here. All other cpus will make the
357 * call as part of cpu_init in slave cpu initialization.
358 */
359 sn_cpu_init();
360
361 #ifdef CONFIG_SMP
362 init_smp_config();
363 #endif
364 screen_info = sn_screen_info;
365
366 sn_timer_init();
367
368 /*
369 * set pm_power_off to a SAL call to allow
370 * sn machines to power off. The SAL call can be replaced
371 * by an ACPI interface call when ACPI is fully implemented
372 * for sn.
373 */
374 pm_power_off = ia64_sn_power_down;
375 }
376
377 /**
378 * sn_init_pdas - setup node data areas
379 *
380 * One time setup for Node Data Area. Called by sn_setup().
381 */
382 static void __init sn_init_pdas(char **cmdline_p)
383 {
384 cnodeid_t cnode;
385
386 memset(sn_cnodeid_to_nasid, -1,
387 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
388 for_each_online_node(cnode)
389 sn_cnodeid_to_nasid[cnode] =
390 pxm_to_nasid(nid_to_pxm_map[cnode]);
391
392 numionodes = num_online_nodes();
393 scan_for_ionodes();
394
395 /*
396 * Allocate & initalize the nodepda for each node.
397 */
398 for_each_online_node(cnode) {
399 nodepdaindr[cnode] =
400 alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
401 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
402 memset(nodepdaindr[cnode]->phys_cpuid, -1,
403 sizeof(nodepdaindr[cnode]->phys_cpuid));
404 spin_lock_init(&nodepdaindr[cnode]->ptc_lock);
405 }
406
407 /*
408 * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
409 */
410 for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
411 nodepdaindr[cnode] =
412 alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
413 memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
414 }
415
416 /*
417 * Now copy the array of nodepda pointers to each nodepda.
418 */
419 for (cnode = 0; cnode < numionodes; cnode++)
420 memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
421 sizeof(nodepdaindr));
422
423 /*
424 * Set up IO related platform-dependent nodepda fields.
425 * The following routine actually sets up the hubinfo struct
426 * in nodepda.
427 */
428 for_each_online_node(cnode) {
429 bte_init_node(nodepdaindr[cnode], cnode);
430 }
431
432 /*
433 * Initialize the per node hubdev. This includes IO Nodes and
434 * headless/memless nodes.
435 */
436 for (cnode = 0; cnode < numionodes; cnode++) {
437 hubdev_init_node(nodepdaindr[cnode], cnode);
438 }
439 }
440
441 /**
442 * sn_cpu_init - initialize per-cpu data areas
443 * @cpuid: cpuid of the caller
444 *
445 * Called during cpu initialization on each cpu as it starts.
446 * Currently, initializes the per-cpu data area for SNIA.
447 * Also sets up a few fields in the nodepda. Also known as
448 * platform_cpu_init() by the ia64 machvec code.
449 */
450 void __init sn_cpu_init(void)
451 {
452 int cpuid;
453 int cpuphyid;
454 int nasid;
455 int subnode;
456 int slice;
457 int cnode;
458 int i;
459 static int wars_have_been_checked;
460
461 if (smp_processor_id() == 0 && IS_MEDUSA()) {
462 if (ia64_sn_is_fake_prom())
463 sn_prom_type = 2;
464 else
465 sn_prom_type = 1;
466 printk("Running on medusa with %s PROM\n", (sn_prom_type == 1) ? "real" : "fake");
467 }
468
469 memset(pda, 0, sizeof(pda));
470 if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
471 &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
472 &sn_coherency_id, &sn_region_size))
473 BUG();
474 sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
475
476 /*
477 * The boot cpu makes this call again after platform initialization is
478 * complete.
479 */
480 if (nodepdaindr[0] == NULL)
481 return;
482
483 cpuid = smp_processor_id();
484 cpuphyid = get_sapicid();
485
486 if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
487 BUG();
488
489 for (i=0; i < MAX_NUMNODES; i++) {
490 if (nodepdaindr[i]) {
491 nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
492 nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
493 nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
494 }
495 }
496
497 cnode = nasid_to_cnodeid(nasid);
498
499 sn_nodepda = nodepdaindr[cnode];
500
501 pda->led_address =
502 (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
503 pda->led_state = LED_ALWAYS_SET;
504 pda->hb_count = HZ / 2;
505 pda->hb_state = 0;
506 pda->idle_flag = 0;
507
508 if (cpuid != 0) {
509 /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
510 memcpy(sn_cnodeid_to_nasid,
511 (&per_cpu(__sn_cnodeid_to_nasid, 0)),
512 sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
513 }
514
515 /*
516 * Check for WARs.
517 * Only needs to be done once, on BSP.
518 * Has to be done after loop above, because it uses this cpu's
519 * sn_cnodeid_to_nasid table which was just initialized if this
520 * isn't cpu 0.
521 * Has to be done before assignment below.
522 */
523 if (!wars_have_been_checked) {
524 sn_check_for_wars();
525 wars_have_been_checked = 1;
526 }
527 sn_hub_info->shub_1_1_found = shub_1_1_found;
528
529 /*
530 * Set up addresses of PIO/MEM write status registers.
531 */
532 {
533 u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
534 u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_2,
535 SH2_PIO_WRITE_STATUS_1, SH2_PIO_WRITE_STATUS_3};
536 u64 *pio;
537 pio = is_shub1() ? pio1 : pio2;
538 pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
539 pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
540 }
541
542 /*
543 * WAR addresses for SHUB 1.x.
544 */
545 if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
546 int buddy_nasid;
547 buddy_nasid =
548 cnodeid_to_nasid(numa_node_id() ==
549 num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
550 pda->pio_shub_war_cam_addr =
551 (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
552 SH1_PI_CAM_CONTROL);
553 }
554 }
555
556 /*
557 * Scan klconfig for ionodes. Add the nasids to the
558 * physical_node_map and the pda and increment numionodes.
559 */
560
561 static void __init scan_for_ionodes(void)
562 {
563 int nasid = 0;
564 lboard_t *brd;
565
566 /* fakeprom does not support klgraph */
567 if (IS_RUNNING_ON_FAKE_PROM())
568 return;
569
570 /* Setup ionodes with memory */
571 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
572 char *klgraph_header;
573 cnodeid_t cnodeid;
574
575 if (physical_node_map[nasid] == -1)
576 continue;
577
578 cnodeid = -1;
579 klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
580 if (!klgraph_header) {
581 BUG(); /* All nodes must have klconfig tables! */
582 }
583 cnodeid = nasid_to_cnodeid(nasid);
584 root_lboard[cnodeid] = (lboard_t *)
585 NODE_OFFSET_TO_LBOARD((nasid),
586 ((kl_config_hdr_t
587 *) (klgraph_header))->
588 ch_board_info);
589 }
590
591 /* Scan headless/memless IO Nodes. */
592 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
593 /* if there's no nasid, don't try to read the klconfig on the node */
594 if (physical_node_map[nasid] == -1)
595 continue;
596 brd = find_lboard_any((lboard_t *)
597 root_lboard[nasid_to_cnodeid(nasid)],
598 KLTYPE_SNIA);
599 if (brd) {
600 brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
601 if (!brd)
602 continue;
603 }
604
605 brd = find_lboard_any(brd, KLTYPE_SNIA);
606
607 while (brd) {
608 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
609 physical_node_map[brd->brd_nasid] = numionodes;
610 root_lboard[numionodes] = brd;
611 numionodes++;
612 brd = KLCF_NEXT_ANY(brd);
613 if (!brd)
614 break;
615
616 brd = find_lboard_any(brd, KLTYPE_SNIA);
617 }
618 }
619
620 /* Scan for TIO nodes. */
621 for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
622 /* if there's no nasid, don't try to read the klconfig on the node */
623 if (physical_node_map[nasid] == -1)
624 continue;
625 brd = find_lboard_any((lboard_t *)
626 root_lboard[nasid_to_cnodeid(nasid)],
627 KLTYPE_TIO);
628 while (brd) {
629 sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
630 physical_node_map[brd->brd_nasid] = numionodes;
631 root_lboard[numionodes] = brd;
632 numionodes++;
633 brd = KLCF_NEXT_ANY(brd);
634 if (!brd)
635 break;
636
637 brd = find_lboard_any(brd, KLTYPE_TIO);
638 }
639 }
640 }
641
642 int
643 nasid_slice_to_cpuid(int nasid, int slice)
644 {
645 long cpu;
646
647 for (cpu=0; cpu < NR_CPUS; cpu++)
648 if (cpuid_to_nasid(cpu) == nasid &&
649 cpuid_to_slice(cpu) == slice)
650 return cpu;
651
652 return -1;
653 }