arch/m68k/Kconfig.cpu

   1 # SPDX-License-Identifier: GPL-2.0
   2 comment "Processor Type"
   3
   4 choice
   5         prompt "CPU family support"
   6         default M68KCLASSIC if MMU
   7         default COLDFIRE if !MMU
   8         help
   9           The Freescale (was Motorola) M68K family of processors implements
  10           the full 68000 processor instruction set.
  11           The Freescale ColdFire family of processors is a modern derivative
  12           of the 68000 processor family. They are mainly targeted at embedded
  13           applications, and are all System-On-Chip (SOC) devices, as opposed
  14           to stand alone CPUs. They implement a subset of the original 68000
  15           processor instruction set.
  16           If you anticipate running this kernel on a computer with a classic
  17           MC68xxx processor, select M68KCLASSIC.
  18           If you anticipate running this kernel on a computer with a ColdFire
  19           processor, select COLDFIRE.
  20
  21 config M68KCLASSIC
  22         bool "Classic M68K CPU family support"
  23         select HAVE_ARCH_PFN_VALID
  24
  25 config COLDFIRE
  26         bool "Coldfire CPU family support"
  27         select ARCH_HAVE_CUSTOM_GPIO_H
  28         select CPU_HAS_NO_BITFIELDS
  29         select CPU_HAS_NO_MULDIV64
  30         select GENERIC_CSUM
  31         select GPIOLIB
  32         select HAVE_LEGACY_CLK
  33
  34 endchoice
  35
  36 if M68KCLASSIC
  37
  38 config M68000
  39         bool "MC68000"
  40         depends on !MMU
  41         select CPU_HAS_NO_BITFIELDS
  42         select CPU_HAS_NO_MULDIV64
  43         select CPU_HAS_NO_UNALIGNED
  44         select GENERIC_CSUM
  45         select CPU_NO_EFFICIENT_FFS
  46         select HAVE_ARCH_HASH
  47         help
  48           The Freescale (was Motorola) 68000 CPU is the first generation of
  49           the well known M68K family of processors. The CPU core as well as
  50           being available as a stand alone CPU was also used in many
  51           System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  52           a paging MMU.
  53
  54 config MCPU32
  55         bool
  56         select CPU_HAS_NO_BITFIELDS
  57         select CPU_HAS_NO_UNALIGNED
  58         select CPU_NO_EFFICIENT_FFS
  59         help
  60           The Freescale (was then Motorola) CPU32 is a CPU core that is
  61           based on the 68020 processor. For the most part it is used in
  62           System-On-Chip parts, and does not contain a paging MMU.
  63
  64 config M68020
  65         bool "68020 support"
  66         depends on MMU
  67         select FPU
  68         select CPU_HAS_ADDRESS_SPACES
  69         help
  70           If you anticipate running this kernel on a computer with a MC68020
  71           processor, say Y. Otherwise, say N. Note that the 68020 requires a
  72           68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  73           Sun 3, which provides its own version.
  74
  75 config M68030
  76         bool "68030 support"
  77         depends on MMU && !MMU_SUN3
  78         select FPU
  79         select CPU_HAS_ADDRESS_SPACES
  80         help
  81           If you anticipate running this kernel on a computer with a MC68030
  82           processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  83           work, as it does not include an MMU (Memory Management Unit).
  84
  85 config M68040
  86         bool "68040 support"
  87         depends on MMU && !MMU_SUN3
  88         select FPU
  89         select CPU_HAS_ADDRESS_SPACES
  90         help
  91           If you anticipate running this kernel on a computer with a MC68LC040
  92           or MC68040 processor, say Y. Otherwise, say N. Note that an
  93           MC68EC040 will not work, as it does not include an MMU (Memory
  94           Management Unit).
  95
  96 config M68060
  97         bool "68060 support"
  98         depends on MMU && !MMU_SUN3
  99         select FPU
 100         select CPU_HAS_ADDRESS_SPACES
 101         help
 102           If you anticipate running this kernel on a computer with a MC68060
 103           processor, say Y. Otherwise, say N.
 104
 105 config M68328
 106         bool "MC68328"
 107         depends on !MMU
 108         select LEGACY_TIMER_TICK
 109         select M68000
 110         help
 111           Motorola 68328 processor support.
 112
 113 config M68EZ328
 114         bool "MC68EZ328"
 115         depends on !MMU
 116         select LEGACY_TIMER_TICK
 117         select M68000
 118         help
 119           Motorola 68EX328 processor support.
 120
 121 config M68VZ328
 122         bool "MC68VZ328"
 123         depends on !MMU
 124         select LEGACY_TIMER_TICK
 125         select M68000
 126         help
 127           Motorola 68VZ328 processor support.
 128
 129 endif # M68KCLASSIC
 130
 131 if COLDFIRE
 132
 133 choice
 134         prompt "ColdFire SoC type"
 135         default M520x
 136         help
 137           Select the type of ColdFire System-on-Chip (SoC) that you want
 138           to build for.
 139
 140 config M5206
 141         bool "MCF5206"
 142         depends on !MMU
 143         select COLDFIRE_SW_A7
 144         select COLDFIRE_TIMERS
 145         select HAVE_MBAR
 146         select CPU_NO_EFFICIENT_FFS
 147         help
 148           Motorola ColdFire 5206 processor support.
 149
 150 config M5206e
 151         bool "MCF5206e"
 152         depends on !MMU
 153         select COLDFIRE_SW_A7
 154         select COLDFIRE_TIMERS
 155         select HAVE_MBAR
 156         select CPU_NO_EFFICIENT_FFS
 157         help
 158           Motorola ColdFire 5206e processor support.
 159
 160 config M520x
 161         bool "MCF520x"
 162         depends on !MMU
 163         select COLDFIRE_PIT_TIMER
 164         select HAVE_CACHE_SPLIT
 165         help
 166            Freescale Coldfire 5207/5208 processor support.
 167
 168 config M523x
 169         bool "MCF523x"
 170         depends on !MMU
 171         select COLDFIRE_PIT_TIMER
 172         select HAVE_CACHE_SPLIT
 173         select HAVE_IPSBAR
 174         help
 175           Freescale Coldfire 5230/1/2/4/5 processor support
 176
 177 config M5249
 178         bool "MCF5249"
 179         depends on !MMU
 180         select COLDFIRE_SW_A7
 181         select COLDFIRE_TIMERS
 182         select HAVE_MBAR
 183         select CPU_NO_EFFICIENT_FFS
 184         help
 185           Motorola ColdFire 5249 processor support.
 186
 187 config M525x
 188         bool "MCF525x"
 189         depends on !MMU
 190         select COLDFIRE_SW_A7
 191         select COLDFIRE_TIMERS
 192         select HAVE_MBAR
 193         select CPU_NO_EFFICIENT_FFS
 194         help
 195           Freescale (Motorola) Coldfire 5251/5253 processor support.
 196
 197 config M5271
 198         bool "MCF5271"
 199         depends on !MMU
 200         select COLDFIRE_PIT_TIMER
 201         select M527x
 202         select HAVE_CACHE_SPLIT
 203         select HAVE_IPSBAR
 204         help
 205           Freescale (Motorola) ColdFire 5270/5271 processor support.
 206
 207 config M5272
 208         bool "MCF5272"
 209         depends on !MMU
 210         select COLDFIRE_SW_A7
 211         select COLDFIRE_TIMERS
 212         select HAVE_MBAR
 213         select CPU_NO_EFFICIENT_FFS
 214         help
 215           Motorola ColdFire 5272 processor support.
 216
 217 config M5275
 218         bool "MCF5275"
 219         depends on !MMU
 220         select COLDFIRE_PIT_TIMER
 221         select M527x
 222         select HAVE_CACHE_SPLIT
 223         select HAVE_IPSBAR
 224         help
 225           Freescale (Motorola) ColdFire 5274/5275 processor support.
 226
 227 config M528x
 228         bool "MCF528x"
 229         depends on !MMU
 230         select COLDFIRE_PIT_TIMER
 231         select HAVE_CACHE_SPLIT
 232         select HAVE_IPSBAR
 233         help
 234           Motorola ColdFire 5280/5282 processor support.
 235
 236 config M5307
 237         bool "MCF5307"
 238         depends on !MMU
 239         select COLDFIRE_TIMERS
 240         select COLDFIRE_SW_A7
 241         select HAVE_CACHE_CB
 242         select HAVE_MBAR
 243         select CPU_NO_EFFICIENT_FFS
 244         help
 245           Motorola ColdFire 5307 processor support.
 246
 247 config M532x
 248         bool "MCF532x"
 249         depends on !MMU
 250         select COLDFIRE_TIMERS
 251         select M53xx
 252         select HAVE_CACHE_CB
 253         help
 254           Freescale (Motorola) ColdFire 532x processor support.
 255
 256 config M537x
 257         bool "MCF537x"
 258         depends on !MMU
 259         select COLDFIRE_TIMERS
 260         select M53xx
 261         select HAVE_CACHE_CB
 262         help
 263           Freescale ColdFire 537x processor support.
 264
 265 config M5407
 266         bool "MCF5407"
 267         depends on !MMU
 268         select COLDFIRE_SW_A7
 269         select COLDFIRE_TIMERS
 270         select HAVE_CACHE_CB
 271         select HAVE_MBAR
 272         select CPU_NO_EFFICIENT_FFS
 273         help
 274           Motorola ColdFire 5407 processor support.
 275
 276 config M547x
 277         bool "MCF547x"
 278         select M54xx
 279         select COLDFIRE_SLTIMERS
 280         select MMU_COLDFIRE if MMU
 281         select FPU if MMU
 282         select HAVE_CACHE_CB
 283         select HAVE_MBAR
 284         select CPU_NO_EFFICIENT_FFS
 285         help
 286           Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
 287
 288 config M548x
 289         bool "MCF548x"
 290         select COLDFIRE_SLTIMERS
 291         select MMU_COLDFIRE if MMU
 292         select FPU if MMU
 293         select M54xx
 294         select HAVE_CACHE_CB
 295         select HAVE_MBAR
 296         select CPU_NO_EFFICIENT_FFS
 297         help
 298           Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
 299
 300 config M5441x
 301         bool "MCF5441x"
 302         select COLDFIRE_PIT_TIMER
 303         select MMU_COLDFIRE if MMU
 304         select HAVE_CACHE_CB
 305         help
 306           Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
 307
 308 endchoice
 309
 310 config M527x
 311         bool
 312
 313 config M53xx
 314         bool
 315
 316 config M54xx
 317         select HAVE_PCI
 318         bool
 319
 320 config COLDFIRE_PIT_TIMER
 321         bool
 322
 323 config COLDFIRE_TIMERS
 324         bool
 325         select LEGACY_TIMER_TICK
 326
 327 config COLDFIRE_SLTIMERS
 328         bool
 329         select LEGACY_TIMER_TICK
 330
 331 endif # COLDFIRE
 332
 333
 334 comment "Processor Specific Options"
 335
 336 config M68KFPU_EMU
 337         bool "Math emulation support"
 338         depends on MMU
 339         help
 340           At some point in the future, this will cause floating-point math
 341           instructions to be emulated by the kernel on machines that lack a
 342           floating-point math coprocessor.  Thrill-seekers and chronically
 343           sleep-deprived psychotic hacker types can say Y now, everyone else
 344           should probably wait a while.
 345
 346 config M68KFPU_EMU_EXTRAPREC
 347         bool "Math emulation extra precision"
 348         depends on M68KFPU_EMU
 349         help
 350           The fpu uses normally a few bit more during calculations for
 351           correct rounding, the emulator can (often) do the same but this
 352           extra calculation can cost quite some time, so you can disable
 353           it here. The emulator will then "only" calculate with a 64 bit
 354           mantissa and round slightly incorrect, what is more than enough
 355           for normal usage.
 356
 357 config M68KFPU_EMU_ONLY
 358         bool "Math emulation only kernel"
 359         depends on M68KFPU_EMU
 360         help
 361           This option prevents any floating-point instructions from being
 362           compiled into the kernel, thereby the kernel doesn't save any
 363           floating point context anymore during task switches, so this
 364           kernel will only be usable on machines without a floating-point
 365           math coprocessor. This makes the kernel a bit faster as no tests
 366           needs to be executed whether a floating-point instruction in the
 367           kernel should be executed or not.
 368
 369 config ADVANCED
 370         bool "Advanced configuration options"
 371         depends on MMU
 372         help
 373           This gives you access to some advanced options for the CPU. The
 374           defaults should be fine for most users, but these options may make
 375           it possible for you to improve performance somewhat if you know what
 376           you are doing.
 377
 378           Note that the answer to this question won't directly affect the
 379           kernel: saying N will just cause the configurator to skip all
 380           the questions about these options.
 381
 382           Most users should say N to this question.
 383
 384 config RMW_INSNS
 385         bool "Use read-modify-write instructions"
 386         depends on ADVANCED
 387         help
 388           This allows to use certain instructions that work with indivisible
 389           read-modify-write bus cycles. While this is faster than the
 390           workaround of disabling interrupts, it can conflict with DMA
 391           ( = direct memory access) on many Amiga systems, and it is also said
 392           to destabilize other machines. It is very likely that this will
 393           cause serious problems on any Amiga or Atari Medusa if set. The only
 394           configuration where it should work are 68030-based Ataris, where it
 395           apparently improves performance. But you've been warned! Unless you
 396           really know what you are doing, say N. Try Y only if you're quite
 397           adventurous.
 398
 399 config SINGLE_MEMORY_CHUNK
 400         bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
 401         depends on MMU
 402         default y if SUN3 || MMU_COLDFIRE
 403         help
 404           Ignore all but the first contiguous chunk of physical memory for VM
 405           purposes.  This will save a few bytes kernel size and may speed up
 406           some operations.
 407           When this option os set to N, you may want to lower "Maximum zone
 408           order" to save memory that could be wasted for unused memory map.
 409           Say N if not sure.
 410
 411 config ARCH_DISCONTIGMEM_ENABLE
 412         depends on BROKEN
 413         def_bool MMU && !SINGLE_MEMORY_CHUNK
 414
 415 config FORCE_MAX_ZONEORDER
 416         int "Maximum zone order" if ADVANCED
 417         depends on !SINGLE_MEMORY_CHUNK
 418         default "11"
 419         help
 420           The kernel memory allocator divides physically contiguous memory
 421           blocks into "zones", where each zone is a power of two number of
 422           pages.  This option selects the largest power of two that the kernel
 423           keeps in the memory allocator.  If you need to allocate very large
 424           blocks of physically contiguous memory, then you may need to
 425           increase this value.
 426
 427           For systems that have holes in their physical address space this
 428           value also defines the minimal size of the hole that allows
 429           freeing unused memory map.
 430
 431           This config option is actually maximum order plus one. For example,
 432           a value of 11 means that the largest free memory block is 2^10 pages.
 433
 434 config 060_WRITETHROUGH
 435         bool "Use write-through caching for 68060 supervisor accesses"
 436         depends on ADVANCED && M68060
 437         help
 438           The 68060 generally uses copyback caching of recently accessed data.
 439           Copyback caching means that memory writes will be held in an on-chip
 440           cache and only written back to memory some time later.  Saying Y
 441           here will force supervisor (kernel) accesses to use writethrough
 442           caching.  Writethrough caching means that data is written to memory
 443           straight away, so that cache and memory data always agree.
 444           Writethrough caching is less efficient, but is needed for some
 445           drivers on 68060 based systems where the 68060 bus snooping signal
 446           is hardwired on.  The 53c710 SCSI driver is known to suffer from
 447           this problem.
 448
 449 config M68K_L2_CACHE
 450         bool
 451         depends on MAC
 452         default y
 453
 454 config NODES_SHIFT
 455         int
 456         default "3"
 457         depends on DISCONTIGMEM
 458
 459 config CPU_HAS_NO_BITFIELDS
 460         bool
 461
 462 config CPU_HAS_NO_MULDIV64
 463         bool
 464
 465 config CPU_HAS_NO_UNALIGNED
 466         bool
 467
 468 config CPU_HAS_ADDRESS_SPACES
 469         bool
 470
 471 config FPU
 472         bool
 473
 474 config COLDFIRE_SW_A7
 475         bool
 476
 477 config HAVE_CACHE_SPLIT
 478         bool
 479
 480 config HAVE_CACHE_CB
 481         bool
 482
 483 config HAVE_MBAR
 484         bool
 485
 486 config HAVE_IPSBAR
 487         bool
 488
 489 config CLOCK_FREQ
 490         int "Set the core clock frequency"
 491         default "25000000" if M5206
 492         default "54000000" if M5206e
 493         default "166666666" if M520x
 494         default "140000000" if M5249
 495         default "150000000" if M527x || M523x
 496         default "90000000" if M5307
 497         default "50000000" if M5407
 498         default "266000000" if M54xx
 499         default "66666666"
 500         depends on COLDFIRE
 501         help
 502           Define the CPU clock frequency in use. This is the core clock
 503           frequency, it may or may not be the same as the external clock
 504           crystal fitted to your board. Some processors have an internal
 505           PLL and can have their frequency programmed at run time, others
 506           use internal dividers. In general the kernel won't setup a PLL
 507           if it is fitted (there are some exceptions). This value will be
 508           specific to the exact CPU that you are using.
 509
 510 config OLDMASK
 511         bool "Old mask 5307 (1H55J) silicon"
 512         depends on M5307
 513         help
 514           Build support for the older revision ColdFire 5307 silicon.
 515           Specifically this is the 1H55J mask revision.
 516
 517 if HAVE_CACHE_SPLIT
 518 choice
 519         prompt "Split Cache Configuration"
 520         default CACHE_I
 521
 522 config CACHE_I
 523         bool "Instruction"
 524         help
 525           Use all of the ColdFire CPU cache memory as an instruction cache.
 526
 527 config CACHE_D
 528         bool "Data"
 529         help
 530           Use all of the ColdFire CPU cache memory as a data cache.
 531
 532 config CACHE_BOTH
 533         bool "Both"
 534         help
 535           Split the ColdFire CPU cache, and use half as an instruction cache
 536           and half as a data cache.
 537 endchoice
 538 endif
 539
 540 if HAVE_CACHE_CB
 541 choice
 542         prompt "Data cache mode"
 543         default CACHE_WRITETHRU
 544
 545 config CACHE_WRITETHRU
 546         bool "Write-through"
 547         help
 548           The ColdFire CPU cache is set into Write-through mode.
 549
 550 config CACHE_COPYBACK
 551         bool "Copy-back"
 552         help
 553           The ColdFire CPU cache is set into Copy-back mode.
 554 endchoice
 555 endif
 556