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git.proxmox.com Git - mirror_ubuntu-hirsute-kernel.git/blob - arch/m68k/include/asm/atomic_mm.h
1 #ifndef __ARCH_M68K_ATOMIC__
2 #define __ARCH_M68K_ATOMIC__
4 #include <linux/types.h>
5 #include <asm/system.h>
8 * Atomic operations that C can't guarantee us. Useful for
9 * resource counting etc..
13 * We do not have SMP m68k systems, so we don't have to deal with that.
16 #define ATOMIC_INIT(i) { (i) }
18 #define atomic_read(v) (*(volatile int *)&(v)->counter)
19 #define atomic_set(v, i) (((v)->counter) = i)
21 static inline void atomic_add(int i
, atomic_t
*v
)
23 __asm__
__volatile__("addl %1,%0" : "+m" (*v
) : "id" (i
));
26 static inline void atomic_sub(int i
, atomic_t
*v
)
28 __asm__
__volatile__("subl %1,%0" : "+m" (*v
) : "id" (i
));
31 static inline void atomic_inc(atomic_t
*v
)
33 __asm__
__volatile__("addql #1,%0" : "+m" (*v
));
36 static inline void atomic_dec(atomic_t
*v
)
38 __asm__
__volatile__("subql #1,%0" : "+m" (*v
));
41 static inline int atomic_dec_and_test(atomic_t
*v
)
44 __asm__
__volatile__("subql #1,%1; seq %0" : "=d" (c
), "+m" (*v
));
48 static inline int atomic_inc_and_test(atomic_t
*v
)
51 __asm__
__volatile__("addql #1,%1; seq %0" : "=d" (c
), "+m" (*v
));
55 #ifdef CONFIG_RMW_INSNS
57 static inline int atomic_add_return(int i
, atomic_t
*v
)
66 : "+m" (*v
), "=&d" (t
), "=&d" (tmp
)
67 : "g" (i
), "2" (atomic_read(v
)));
71 static inline int atomic_sub_return(int i
, atomic_t
*v
)
80 : "+m" (*v
), "=&d" (t
), "=&d" (tmp
)
81 : "g" (i
), "2" (atomic_read(v
)));
85 #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
86 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
88 #else /* !CONFIG_RMW_INSNS */
90 static inline int atomic_add_return(int i
, atomic_t
* v
)
95 local_irq_save(flags
);
99 local_irq_restore(flags
);
104 static inline int atomic_sub_return(int i
, atomic_t
* v
)
109 local_irq_save(flags
);
113 local_irq_restore(flags
);
118 static inline int atomic_cmpxchg(atomic_t
*v
, int old
, int new)
123 local_irq_save(flags
);
124 prev
= atomic_read(v
);
127 local_irq_restore(flags
);
131 static inline int atomic_xchg(atomic_t
*v
, int new)
136 local_irq_save(flags
);
137 prev
= atomic_read(v
);
139 local_irq_restore(flags
);
143 #endif /* !CONFIG_RMW_INSNS */
145 #define atomic_dec_return(v) atomic_sub_return(1, (v))
146 #define atomic_inc_return(v) atomic_add_return(1, (v))
148 static inline int atomic_sub_and_test(int i
, atomic_t
*v
)
151 __asm__
__volatile__("subl %2,%1; seq %0"
152 : "=d" (c
), "+m" (*v
)
157 static inline int atomic_add_negative(int i
, atomic_t
*v
)
160 __asm__
__volatile__("addl %2,%1; smi %0"
161 : "=d" (c
), "+m" (*v
)
166 static inline void atomic_clear_mask(unsigned long mask
, unsigned long *v
)
168 __asm__
__volatile__("andl %1,%0" : "+m" (*v
) : "id" (~(mask
)));
171 static inline void atomic_set_mask(unsigned long mask
, unsigned long *v
)
173 __asm__
__volatile__("orl %1,%0" : "+m" (*v
) : "id" (mask
));
176 static __inline__
int atomic_add_unless(atomic_t
*v
, int a
, int u
)
181 if (unlikely(c
== (u
)))
183 old
= atomic_cmpxchg((v
), c
, c
+ (a
));
184 if (likely(old
== c
))
191 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
193 /* Atomic operations are already serializing */
194 #define smp_mb__before_atomic_dec() barrier()
195 #define smp_mb__after_atomic_dec() barrier()
196 #define smp_mb__before_atomic_inc() barrier()
197 #define smp_mb__after_atomic_inc() barrier()
199 #include <asm-generic/atomic-long.h>
200 #endif /* __ARCH_M68K_ATOMIC __ */