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1 /*
2 * I/O Processor (IOP) management
3 * Written and (C) 1999 by Joshua M. Thompson (funaho@jurai.org)
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice and this list of conditions.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice and this list of conditions in the documentation and/or other
12 * materials provided with the distribution.
13 */
14
15 /*
16 * The IOP chips are used in the IIfx and some Quadras (900, 950) to manage
17 * serial and ADB. They are actually a 6502 processor and some glue logic.
18 *
19 * 990429 (jmt) - Initial implementation, just enough to knock the SCC IOP
20 * into compatible mode so nobody has to fiddle with the
21 * Serial Switch control panel anymore.
22 * 990603 (jmt) - Added code to grab the correct ISM IOP interrupt for OSS
23 * and non-OSS machines (at least I hope it's correct on a
24 * non-OSS machine -- someone with a Q900 or Q950 needs to
25 * check this.)
26 * 990605 (jmt) - Rearranged things a bit wrt IOP detection; iop_present is
27 * gone, IOP base addresses are now in an array and the
28 * globally-visible functions take an IOP number instead of an
29 * an actual base address.
30 * 990610 (jmt) - Finished the message passing framework and it seems to work.
31 * Sending _definitely_ works; my adb-bus.c mods can send
32 * messages and receive the MSG_COMPLETED status back from the
33 * IOP. The trick now is figuring out the message formats.
34 * 990611 (jmt) - More cleanups. Fixed problem where unclaimed messages on a
35 * receive channel were never properly acknowledged. Bracketed
36 * the remaining debug printk's with #ifdef's and disabled
37 * debugging. I can now type on the console.
38 * 990612 (jmt) - Copyright notice added. Reworked the way replies are handled.
39 * It turns out that replies are placed back in the send buffer
40 * for that channel; messages on the receive channels are always
41 * unsolicited messages from the IOP (and our replies to them
42 * should go back in the receive channel.) Also added tracking
43 * of device names to the listener functions ala the interrupt
44 * handlers.
45 * 990729 (jmt) - Added passing of pt_regs structure to IOP handlers. This is
46 * used by the new unified ADB driver.
47 *
48 * TODO:
49 *
50 * o Something should be periodically checking iop_alive() to make sure the
51 * IOP hasn't died.
52 * o Some of the IOP manager routines need better error checking and
53 * return codes. Nothing major, just prettying up.
54 */
55
56 /*
57 * -----------------------
58 * IOP Message Passing 101
59 * -----------------------
60 *
61 * The host talks to the IOPs using a rather simple message-passing scheme via
62 * a shared memory area in the IOP RAM. Each IOP has seven "channels"; each
63 * channel is conneced to a specific software driver on the IOP. For example
64 * on the SCC IOP there is one channel for each serial port. Each channel has
65 * an incoming and and outgoing message queue with a depth of one.
66 *
67 * A message is 32 bytes plus a state byte for the channel (MSG_IDLE, MSG_NEW,
68 * MSG_RCVD, MSG_COMPLETE). To send a message you copy the message into the
69 * buffer, set the state to MSG_NEW and signal the IOP by setting the IRQ flag
70 * in the IOP control to 1. The IOP will move the state to MSG_RCVD when it
71 * receives the message and then to MSG_COMPLETE when the message processing
72 * has completed. It is the host's responsibility at that point to read the
73 * reply back out of the send channel buffer and reset the channel state back
74 * to MSG_IDLE.
75 *
76 * To receive message from the IOP the same procedure is used except the roles
77 * are reversed. That is, the IOP puts message in the channel with a state of
78 * MSG_NEW, and the host receives the message and move its state to MSG_RCVD
79 * and then to MSG_COMPLETE when processing is completed and the reply (if any)
80 * has been placed back in the receive channel. The IOP will then reset the
81 * channel state to MSG_IDLE.
82 *
83 * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
84 * interrupt level; they are distinguished by a pair of bits in the IOP status
85 * register. The IOP will raise INT0 when one or more messages in the send
86 * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
87 * or more messages on the receive channels have gone to the MSG_NEW state.
88 *
89 * Since each channel handles only one message we have to implement a small
90 * interrupt-driven queue on our end. Messages to be sent are placed on the
91 * queue for sending and contain a pointer to an optional callback function.
92 * The handler for a message is called when the message state goes to
93 * MSG_COMPLETE.
94 *
95 * For receiving message we maintain a list of handler functions to call when
96 * a message is received on that IOP/channel combination. The handlers are
97 * called much like an interrupt handler and are passed a copy of the message
98 * from the IOP. The message state will be in MSG_RCVD while the handler runs;
99 * it is the handler's responsibility to call iop_complete_message() when
100 * finished; this function moves the message state to MSG_COMPLETE and signals
101 * the IOP. This two-step process is provided to allow the handler to defer
102 * message processing to a bottom-half handler if the processing will take
103 * a significant amount of time (handlers are called at interrupt time so they
104 * should execute quickly.)
105 */
106
107 #include <linux/types.h>
108 #include <linux/kernel.h>
109 #include <linux/mm.h>
110 #include <linux/delay.h>
111 #include <linux/init.h>
112 #include <linux/interrupt.h>
113
114 #include <asm/macintosh.h>
115 #include <asm/macints.h>
116 #include <asm/mac_iop.h>
117
118 /*#define DEBUG_IOP*/
119
120 /* Non-zero if the IOPs are present */
121
122 int iop_scc_present, iop_ism_present;
123
124 /* structure for tracking channel listeners */
125
126 struct listener {
127 const char *devname;
128 void (*handler)(struct iop_msg *);
129 };
130
131 /*
132 * IOP structures for the two IOPs
133 *
134 * The SCC IOP controls both serial ports (A and B) as its two functions.
135 * The ISM IOP controls the SWIM (floppy drive) and ADB.
136 */
137
138 static volatile struct mac_iop *iop_base[NUM_IOPS];
139
140 /*
141 * IOP message queues
142 */
143
144 static struct iop_msg iop_msg_pool[NUM_IOP_MSGS];
145 static struct iop_msg *iop_send_queue[NUM_IOPS][NUM_IOP_CHAN];
146 static struct listener iop_listeners[NUM_IOPS][NUM_IOP_CHAN];
147
148 irqreturn_t iop_ism_irq(int, void *);
149
150 /*
151 * Private access functions
152 */
153
154 static __inline__ void iop_loadaddr(volatile struct mac_iop *iop, __u16 addr)
155 {
156 iop->ram_addr_lo = addr;
157 iop->ram_addr_hi = addr >> 8;
158 }
159
160 static __inline__ __u8 iop_readb(volatile struct mac_iop *iop, __u16 addr)
161 {
162 iop->ram_addr_lo = addr;
163 iop->ram_addr_hi = addr >> 8;
164 return iop->ram_data;
165 }
166
167 static __inline__ void iop_writeb(volatile struct mac_iop *iop, __u16 addr, __u8 data)
168 {
169 iop->ram_addr_lo = addr;
170 iop->ram_addr_hi = addr >> 8;
171 iop->ram_data = data;
172 }
173
174 static __inline__ void iop_stop(volatile struct mac_iop *iop)
175 {
176 iop->status_ctrl &= ~IOP_RUN;
177 }
178
179 static __inline__ void iop_start(volatile struct mac_iop *iop)
180 {
181 iop->status_ctrl = IOP_RUN | IOP_AUTOINC;
182 }
183
184 static __inline__ void iop_bypass(volatile struct mac_iop *iop)
185 {
186 iop->status_ctrl |= IOP_BYPASS;
187 }
188
189 static __inline__ void iop_interrupt(volatile struct mac_iop *iop)
190 {
191 iop->status_ctrl |= IOP_IRQ;
192 }
193
194 static int iop_alive(volatile struct mac_iop *iop)
195 {
196 int retval;
197
198 retval = (iop_readb(iop, IOP_ADDR_ALIVE) == 0xFF);
199 iop_writeb(iop, IOP_ADDR_ALIVE, 0);
200 return retval;
201 }
202
203 static struct iop_msg *iop_alloc_msg(void)
204 {
205 int i;
206 unsigned long flags;
207
208 local_irq_save(flags);
209
210 for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
211 if (iop_msg_pool[i].status == IOP_MSGSTATUS_UNUSED) {
212 iop_msg_pool[i].status = IOP_MSGSTATUS_WAITING;
213 local_irq_restore(flags);
214 return &iop_msg_pool[i];
215 }
216 }
217
218 local_irq_restore(flags);
219 return NULL;
220 }
221
222 static void iop_free_msg(struct iop_msg *msg)
223 {
224 msg->status = IOP_MSGSTATUS_UNUSED;
225 }
226
227 /*
228 * This is called by the startup code before anything else. Its purpose
229 * is to find and initialize the IOPs early in the boot sequence, so that
230 * the serial IOP can be placed into bypass mode _before_ we try to
231 * initialize the serial console.
232 */
233
234 void __init iop_preinit(void)
235 {
236 if (macintosh_config->scc_type == MAC_SCC_IOP) {
237 if (macintosh_config->ident == MAC_MODEL_IIFX) {
238 iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_IIFX;
239 } else {
240 iop_base[IOP_NUM_SCC] = (struct mac_iop *) SCC_IOP_BASE_QUADRA;
241 }
242 iop_base[IOP_NUM_SCC]->status_ctrl = 0x87;
243 iop_scc_present = 1;
244 } else {
245 iop_base[IOP_NUM_SCC] = NULL;
246 iop_scc_present = 0;
247 }
248 if (macintosh_config->adb_type == MAC_ADB_IOP) {
249 if (macintosh_config->ident == MAC_MODEL_IIFX) {
250 iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_IIFX;
251 } else {
252 iop_base[IOP_NUM_ISM] = (struct mac_iop *) ISM_IOP_BASE_QUADRA;
253 }
254 iop_base[IOP_NUM_ISM]->status_ctrl = 0;
255 iop_ism_present = 1;
256 } else {
257 iop_base[IOP_NUM_ISM] = NULL;
258 iop_ism_present = 0;
259 }
260 }
261
262 /*
263 * Initialize the IOPs, if present.
264 */
265
266 void __init iop_init(void)
267 {
268 int i;
269
270 if (iop_scc_present) {
271 printk("IOP: detected SCC IOP at %p\n", iop_base[IOP_NUM_SCC]);
272 }
273 if (iop_ism_present) {
274 printk("IOP: detected ISM IOP at %p\n", iop_base[IOP_NUM_ISM]);
275 iop_start(iop_base[IOP_NUM_ISM]);
276 iop_alive(iop_base[IOP_NUM_ISM]); /* clears the alive flag */
277 }
278
279 /* Make the whole pool available and empty the queues */
280
281 for (i = 0 ; i < NUM_IOP_MSGS ; i++) {
282 iop_msg_pool[i].status = IOP_MSGSTATUS_UNUSED;
283 }
284
285 for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
286 iop_send_queue[IOP_NUM_SCC][i] = NULL;
287 iop_send_queue[IOP_NUM_ISM][i] = NULL;
288 iop_listeners[IOP_NUM_SCC][i].devname = NULL;
289 iop_listeners[IOP_NUM_SCC][i].handler = NULL;
290 iop_listeners[IOP_NUM_ISM][i].devname = NULL;
291 iop_listeners[IOP_NUM_ISM][i].handler = NULL;
292 }
293 }
294
295 /*
296 * Register the interrupt handler for the IOPs.
297 * TODO: might be wrong for non-OSS machines. Anyone?
298 */
299
300 void __init iop_register_interrupts(void)
301 {
302 if (iop_ism_present) {
303 if (macintosh_config->ident == MAC_MODEL_IIFX) {
304 if (request_irq(IRQ_MAC_ADB, iop_ism_irq, 0,
305 "ISM IOP", (void *)IOP_NUM_ISM))
306 pr_err("Couldn't register ISM IOP interrupt\n");
307 } else {
308 if (request_irq(IRQ_VIA2_0, iop_ism_irq, 0, "ISM IOP",
309 (void *)IOP_NUM_ISM))
310 pr_err("Couldn't register ISM IOP interrupt\n");
311 }
312 if (!iop_alive(iop_base[IOP_NUM_ISM])) {
313 printk("IOP: oh my god, they killed the ISM IOP!\n");
314 } else {
315 printk("IOP: the ISM IOP seems to be alive.\n");
316 }
317 }
318 }
319
320 /*
321 * Register or unregister a listener for a specific IOP and channel
322 *
323 * If the handler pointer is NULL the current listener (if any) is
324 * unregistered. Otherwise the new listener is registered provided
325 * there is no existing listener registered.
326 */
327
328 int iop_listen(uint iop_num, uint chan,
329 void (*handler)(struct iop_msg *),
330 const char *devname)
331 {
332 if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
333 if (chan >= NUM_IOP_CHAN) return -EINVAL;
334 if (iop_listeners[iop_num][chan].handler && handler) return -EINVAL;
335 iop_listeners[iop_num][chan].devname = devname;
336 iop_listeners[iop_num][chan].handler = handler;
337 return 0;
338 }
339
340 /*
341 * Complete reception of a message, which just means copying the reply
342 * into the buffer, setting the channel state to MSG_COMPLETE and
343 * notifying the IOP.
344 */
345
346 void iop_complete_message(struct iop_msg *msg)
347 {
348 int iop_num = msg->iop_num;
349 int chan = msg->channel;
350 int i,offset;
351
352 #ifdef DEBUG_IOP
353 printk("iop_complete(%p): iop %d chan %d\n", msg, msg->iop_num, msg->channel);
354 #endif
355
356 offset = IOP_ADDR_RECV_MSG + (msg->channel * IOP_MSG_LEN);
357
358 for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
359 iop_writeb(iop_base[iop_num], offset, msg->reply[i]);
360 }
361
362 iop_writeb(iop_base[iop_num],
363 IOP_ADDR_RECV_STATE + chan, IOP_MSG_COMPLETE);
364 iop_interrupt(iop_base[msg->iop_num]);
365
366 iop_free_msg(msg);
367 }
368
369 /*
370 * Actually put a message into a send channel buffer
371 */
372
373 static void iop_do_send(struct iop_msg *msg)
374 {
375 volatile struct mac_iop *iop = iop_base[msg->iop_num];
376 int i,offset;
377
378 offset = IOP_ADDR_SEND_MSG + (msg->channel * IOP_MSG_LEN);
379
380 for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
381 iop_writeb(iop, offset, msg->message[i]);
382 }
383
384 iop_writeb(iop, IOP_ADDR_SEND_STATE + msg->channel, IOP_MSG_NEW);
385
386 iop_interrupt(iop);
387 }
388
389 /*
390 * Handle sending a message on a channel that
391 * has gone into the IOP_MSG_COMPLETE state.
392 */
393
394 static void iop_handle_send(uint iop_num, uint chan)
395 {
396 volatile struct mac_iop *iop = iop_base[iop_num];
397 struct iop_msg *msg,*msg2;
398 int i,offset;
399
400 #ifdef DEBUG_IOP
401 printk("iop_handle_send: iop %d channel %d\n", iop_num, chan);
402 #endif
403
404 iop_writeb(iop, IOP_ADDR_SEND_STATE + chan, IOP_MSG_IDLE);
405
406 if (!(msg = iop_send_queue[iop_num][chan])) return;
407
408 msg->status = IOP_MSGSTATUS_COMPLETE;
409 offset = IOP_ADDR_SEND_MSG + (chan * IOP_MSG_LEN);
410 for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
411 msg->reply[i] = iop_readb(iop, offset);
412 }
413 if (msg->handler) (*msg->handler)(msg);
414 msg2 = msg;
415 msg = msg->next;
416 iop_free_msg(msg2);
417
418 iop_send_queue[iop_num][chan] = msg;
419 if (msg) iop_do_send(msg);
420 }
421
422 /*
423 * Handle reception of a message on a channel that has
424 * gone into the IOP_MSG_NEW state.
425 */
426
427 static void iop_handle_recv(uint iop_num, uint chan)
428 {
429 volatile struct mac_iop *iop = iop_base[iop_num];
430 int i,offset;
431 struct iop_msg *msg;
432
433 #ifdef DEBUG_IOP
434 printk("iop_handle_recv: iop %d channel %d\n", iop_num, chan);
435 #endif
436
437 msg = iop_alloc_msg();
438 msg->iop_num = iop_num;
439 msg->channel = chan;
440 msg->status = IOP_MSGSTATUS_UNSOL;
441 msg->handler = iop_listeners[iop_num][chan].handler;
442
443 offset = IOP_ADDR_RECV_MSG + (chan * IOP_MSG_LEN);
444
445 for (i = 0 ; i < IOP_MSG_LEN ; i++, offset++) {
446 msg->message[i] = iop_readb(iop, offset);
447 }
448
449 iop_writeb(iop, IOP_ADDR_RECV_STATE + chan, IOP_MSG_RCVD);
450
451 /* If there is a listener, call it now. Otherwise complete */
452 /* the message ourselves to avoid possible stalls. */
453
454 if (msg->handler) {
455 (*msg->handler)(msg);
456 } else {
457 #ifdef DEBUG_IOP
458 printk("iop_handle_recv: unclaimed message on iop %d channel %d\n", iop_num, chan);
459 printk("iop_handle_recv:");
460 for (i = 0 ; i < IOP_MSG_LEN ; i++) {
461 printk(" %02X", (uint) msg->message[i]);
462 }
463 printk("\n");
464 #endif
465 iop_complete_message(msg);
466 }
467 }
468
469 /*
470 * Send a message
471 *
472 * The message is placed at the end of the send queue. Afterwards if the
473 * channel is idle we force an immediate send of the next message in the
474 * queue.
475 */
476
477 int iop_send_message(uint iop_num, uint chan, void *privdata,
478 uint msg_len, __u8 *msg_data,
479 void (*handler)(struct iop_msg *))
480 {
481 struct iop_msg *msg, *q;
482
483 if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return -EINVAL;
484 if (chan >= NUM_IOP_CHAN) return -EINVAL;
485 if (msg_len > IOP_MSG_LEN) return -EINVAL;
486
487 msg = iop_alloc_msg();
488 if (!msg) return -ENOMEM;
489
490 msg->next = NULL;
491 msg->status = IOP_MSGSTATUS_WAITING;
492 msg->iop_num = iop_num;
493 msg->channel = chan;
494 msg->caller_priv = privdata;
495 memcpy(msg->message, msg_data, msg_len);
496 msg->handler = handler;
497
498 if (!(q = iop_send_queue[iop_num][chan])) {
499 iop_send_queue[iop_num][chan] = msg;
500 } else {
501 while (q->next) q = q->next;
502 q->next = msg;
503 }
504
505 if (iop_readb(iop_base[iop_num],
506 IOP_ADDR_SEND_STATE + chan) == IOP_MSG_IDLE) {
507 iop_do_send(msg);
508 }
509
510 return 0;
511 }
512
513 /*
514 * Upload code to the shared RAM of an IOP.
515 */
516
517 void iop_upload_code(uint iop_num, __u8 *code_start,
518 uint code_len, __u16 shared_ram_start)
519 {
520 if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
521
522 iop_loadaddr(iop_base[iop_num], shared_ram_start);
523
524 while (code_len--) {
525 iop_base[iop_num]->ram_data = *code_start++;
526 }
527 }
528
529 /*
530 * Download code from the shared RAM of an IOP.
531 */
532
533 void iop_download_code(uint iop_num, __u8 *code_start,
534 uint code_len, __u16 shared_ram_start)
535 {
536 if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return;
537
538 iop_loadaddr(iop_base[iop_num], shared_ram_start);
539
540 while (code_len--) {
541 *code_start++ = iop_base[iop_num]->ram_data;
542 }
543 }
544
545 /*
546 * Compare the code in the shared RAM of an IOP with a copy in system memory
547 * and return 0 on match or the first nonmatching system memory address on
548 * failure.
549 */
550
551 __u8 *iop_compare_code(uint iop_num, __u8 *code_start,
552 uint code_len, __u16 shared_ram_start)
553 {
554 if ((iop_num >= NUM_IOPS) || !iop_base[iop_num]) return code_start;
555
556 iop_loadaddr(iop_base[iop_num], shared_ram_start);
557
558 while (code_len--) {
559 if (*code_start != iop_base[iop_num]->ram_data) {
560 return code_start;
561 }
562 code_start++;
563 }
564 return (__u8 *) 0;
565 }
566
567 /*
568 * Handle an ISM IOP interrupt
569 */
570
571 irqreturn_t iop_ism_irq(int irq, void *dev_id)
572 {
573 uint iop_num = (uint) dev_id;
574 volatile struct mac_iop *iop = iop_base[iop_num];
575 int i,state;
576
577 #ifdef DEBUG_IOP
578 printk("iop_ism_irq: status = %02X\n", (uint) iop->status_ctrl);
579 #endif
580
581 /* INT0 indicates a state change on an outgoing message channel */
582
583 if (iop->status_ctrl & IOP_INT0) {
584 iop->status_ctrl = IOP_INT0 | IOP_RUN | IOP_AUTOINC;
585 #ifdef DEBUG_IOP
586 printk("iop_ism_irq: new status = %02X, send states",
587 (uint) iop->status_ctrl);
588 #endif
589 for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
590 state = iop_readb(iop, IOP_ADDR_SEND_STATE + i);
591 #ifdef DEBUG_IOP
592 printk(" %02X", state);
593 #endif
594 if (state == IOP_MSG_COMPLETE) {
595 iop_handle_send(iop_num, i);
596 }
597 }
598 #ifdef DEBUG_IOP
599 printk("\n");
600 #endif
601 }
602
603 if (iop->status_ctrl & IOP_INT1) { /* INT1 for incoming msgs */
604 iop->status_ctrl = IOP_INT1 | IOP_RUN | IOP_AUTOINC;
605 #ifdef DEBUG_IOP
606 printk("iop_ism_irq: new status = %02X, recv states",
607 (uint) iop->status_ctrl);
608 #endif
609 for (i = 0 ; i < NUM_IOP_CHAN ; i++) {
610 state = iop_readb(iop, IOP_ADDR_RECV_STATE + i);
611 #ifdef DEBUG_IOP
612 printk(" %02X", state);
613 #endif
614 if (state == IOP_MSG_NEW) {
615 iop_handle_recv(iop_num, i);
616 }
617 }
618 #ifdef DEBUG_IOP
619 printk("\n");
620 #endif
621 }
622 return IRQ_HANDLED;
623 }