arch/m68knommu/platform/5307/head.S

   1 /*****************************************************************************/
   2
   3 /*
   4  *      head.S -- common startup code for ColdFire CPUs.
   5  *
   6  *      (C) Copyright 1999-2004, Greg Ungerer (gerg@snapgear.com).
   7  */
   8
   9 /*****************************************************************************/
  10
  11 #include <linux/config.h>
  12 #include <linux/sys.h>
  13 #include <linux/linkage.h>
  14 #include <asm/asm-offsets.h>
  15 #include <asm/coldfire.h>
  16 #include <asm/mcfcache.h>
  17 #include <asm/mcfsim.h>
  18
  19 /*****************************************************************************/
  20
  21 /*
  22  *      Define fixed memory sizes. Configuration of a fixed memory size
  23  *      overrides everything else. If the user defined a size we just
  24  *      blindly use it (they know what they are doing right :-)
  25  */
  26 #if defined(CONFIG_RAM32MB)
  27 #define MEM_SIZE        0x02000000      /* memory size 32Mb */
  28 #elif defined(CONFIG_RAM16MB)
  29 #define MEM_SIZE        0x01000000      /* memory size 16Mb */
  30 #elif defined(CONFIG_RAM8MB)
  31 #define MEM_SIZE        0x00800000      /* memory size 8Mb */
  32 #elif defined(CONFIG_RAM4MB)
  33 #define MEM_SIZE        0x00400000      /* memory size 4Mb */
  34 #elif defined(CONFIG_RAM1MB)
  35 #define MEM_SIZE        0x00100000      /* memory size 1Mb */
  36 #endif
  37
  38 /*
  39  *      Memory size exceptions for special cases. Some boards may be set
  40  *      for auto memory sizing, but we can't do it that way for some reason.
  41  *      For example the 5206eLITE board has static RAM, and auto-detecting
  42  *      the SDRAM will do you no good at all. Same goes for the MOD5272.
  43  */
  44 #ifdef CONFIG_RAMAUTO
  45 #if defined(CONFIG_M5206eLITE)
  46 #define MEM_SIZE        0x00100000      /* 1MiB default memory */
  47 #endif
  48 #if defined(CONFIG_MOD5272)
  49 #define MEM_SIZE        0x00800000      /* 8MiB default memory */
  50 #endif
  51 #endif /* CONFIG_RAMAUTO */
  52
  53
  54 /*
  55  *      If we don't have a fixed memory size now, then lets build in code
  56  *      to auto detect the DRAM size. Obviously this is the prefered
  57  *      method, and should work for most boards (it won't work for those
  58  *      that do not have their RAM starting at address 0).
  59  */
  60 #if defined(MEM_SIZE)
  61 .macro GET_MEM_SIZE
  62         movel   #MEM_SIZE,%d0           /* hard coded memory size */
  63 .endm
  64
  65 #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
  66       defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
  67       defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
  68       defined(CONFIG_M5407)
  69 /*
  70  *      Not all these devices have exactly the same DRAM controller,
  71  *      but the DCMR register is virtually identical - give or take
  72  *      a couple of bits. The only exception is the 5272 devices, their
  73  *      DRAM controller is quite different.
  74  */
  75 .macro GET_MEM_SIZE
  76         movel   MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
  77         btst    #0,%d0                  /* check if region enabled */
  78         beq     1f
  79         andl    #0xfffc0000,%d0
  80         beq     1f
  81         addl    #0x00040000,%d0         /* convert mask to size */
  82 1:
  83         movel   MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
  84         btst    #0,%d1                  /* check if region enabled */
  85         beq     2f
  86         andl    #0xfffc0000, %d1
  87         beq     2f
  88         addl    #0x00040000,%d1
  89         addl    %d1,%d0                 /* total mem size in d0 */
  90 2:
  91 .endm
  92
  93 #elif defined(CONFIG_M5272)
  94 .macro GET_MEM_SIZE
  95         movel   MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
  96         andil   #0xfffff000,%d0         /* mask out chip select options */
  97         negl    %d0                     /* negate bits */
  98 .endm
  99
 100 #else
 101 #error "ERROR: I don't know how to determine your boards memory size?"
 102 #endif
 103
 104
 105 /*
 106  *      Most ColdFire boards have their DRAM starting at address 0.
 107  *      Notable exception is the 5206eLITE board, another is the MOD5272.
 108  */
 109 #if defined(CONFIG_M5206eLITE)
 110 #define MEM_BASE        0x30000000
 111 #endif
 112 #if defined(CONFIG_MOD5272)
 113 #define MEM_BASE        0x02000000
 114 #define VBR_BASE        0x20000000      /* vectors in SRAM */
 115 #endif
 116
 117 #ifndef MEM_BASE
 118 #define MEM_BASE        0x00000000      /* memory base at address 0 */
 119 #endif
 120
 121 /*
 122  *      The default location for the vectors is at the base of RAM.
 123  *      Some boards might like to use internal SRAM or something like
 124  *      that. If no board specific header defines an alternative then
 125  *      use the base of RAM.
 126  */
 127 #ifndef VBR_BASE
 128 #define VBR_BASE        MEM_BASE        /* vector address */
 129 #endif
 130
 131 /*****************************************************************************/
 132
 133 /*
 134  *      Boards and platforms can do specific early hardware setup if
 135  *      they need to. Most don't need this, define away if not required.
 136  */
 137 #ifndef PLATFORM_SETUP
 138 #define PLATFORM_SETUP
 139 #endif
 140
 141 /*****************************************************************************/
 142
 143 .global _start
 144 .global _rambase
 145 .global _ramvec
 146 .global _ramstart
 147 .global _ramend
 148
 149 /*****************************************************************************/
 150
 151 .data
 152
 153 /*
 154  *      During startup we store away the RAM setup. These are not in the
 155  *      bss, since their values are determined and written before the bss
 156  *      has been cleared.
 157  */
 158 _rambase:
 159 .long   0
 160 _ramvec:
 161 .long   0
 162 _ramstart:
 163 .long   0
 164 _ramend:
 165 .long   0
 166
 167 /*****************************************************************************/
 168
 169 .text
 170
 171 /*
 172  *      This is the codes first entry point. This is where it all
 173  *      begins...
 174  */
 175
 176 _start:
 177         nop                                     /* filler */
 178         movew   #0x2700, %sr                    /* no interrupts */
 179
 180         /*
 181          *      Do any platform or board specific setup now. Most boards
 182          *      don't need anything. Those exceptions are define this in
 183          *      their board specific includes.
 184          */
 185         PLATFORM_SETUP
 186
 187         /*
 188          *      Create basic memory configuration. Set VBR accordingly,
 189          *      and size memory.
 190          */
 191         movel   #VBR_BASE,%a7
 192         movec   %a7,%VBR                        /* set vectors addr */
 193         movel   %a7,_ramvec
 194
 195         movel   #MEM_BASE,%a7                   /* mark the base of RAM */
 196         movel   %a7,_rambase
 197
 198         GET_MEM_SIZE                            /* macro code determines size */
 199         addl    %a7,%d0
 200         movel   %d0,_ramend                     /* set end ram addr */
 201
 202         /*
 203          *      Now that we know what the memory is, lets enable cache
 204          *      and get things moving. This is Coldfire CPU specific.
 205          */
 206         CACHE_ENABLE                            /* enable CPU cache */
 207
 208
 209 #ifdef CONFIG_ROMFS_FS
 210         /*
 211          *      Move ROM filesystem above bss :-)
 212          */
 213         lea     _sbss,%a0                       /* get start of bss */
 214         lea     _ebss,%a1                       /* set up destination  */
 215         movel   %a0,%a2                         /* copy of bss start */
 216
 217         movel   8(%a0),%d0                      /* get size of ROMFS */
 218         addql   #8,%d0                          /* allow for rounding */
 219         andl    #0xfffffffc, %d0                /* whole words */
 220
 221         addl    %d0,%a0                         /* copy from end */
 222         addl    %d0,%a1                         /* copy from end */
 223         movel   %a1,_ramstart                   /* set start of ram */
 224
 225 _copy_romfs:
 226         movel   -(%a0),%d0                      /* copy dword */
 227         movel   %d0,-(%a1)
 228         cmpl    %a0,%a2                         /* check if at end */
 229         bne     _copy_romfs
 230
 231 #else /* CONFIG_ROMFS_FS */
 232         lea     _ebss,%a1
 233         movel   %a1,_ramstart
 234 #endif /* CONFIG_ROMFS_FS */
 235
 236
 237         /*
 238          *      Zero out the bss region.
 239          */
 240         lea     _sbss,%a0                       /* get start of bss */
 241         lea     _ebss,%a1                       /* get end of bss */
 242         clrl    %d0                             /* set value */
 243 _clear_bss:
 244         movel   %d0,(%a0)+                      /* clear each word */
 245         cmpl    %a0,%a1                         /* check if at end */
 246         bne     _clear_bss
 247
 248         /*
 249          *      Load the current task pointer and stack.
 250          */
 251         lea     init_thread_union,%a0
 252         lea     THREAD_SIZE(%a0),%sp
 253
 254         /*
 255          *      Assember start up done, start code proper.
 256          */
 257         jsr     start_kernel                    /* start Linux kernel */
 258
 259 _exit:
 260         jmp     _exit                           /* should never get here */
 261
 262 /*****************************************************************************/