1 /*****************************************************************************/
4 * head.S -- common startup code for ColdFire CPUs.
6 * (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>.
9 /*****************************************************************************/
11 #include <linux/sys.h>
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <asm/asm-offsets.h>
15 #include <asm/coldfire.h>
16 #include <asm/mcfcache.h>
17 #include <asm/mcfsim.h>
18 #include <asm/thread_info.h>
20 /*****************************************************************************/
23 * If we don't have a fixed memory size, then lets build in code
24 * to auto detect the DRAM size. Obviously this is the prefered
25 * method, and should work for most boards. It won't work for those
26 * that do not have their RAM starting at address 0, and it only
27 * works on SDRAM (not boards fitted with SRAM).
29 #if CONFIG_RAMSIZE != 0
31 movel #CONFIG_RAMSIZE,%d0 /* hard coded memory size */
34 #elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) || \
35 defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
36 defined(CONFIG_M528x) || defined(CONFIG_M5307) || \
39 * Not all these devices have exactly the same DRAM controller,
40 * but the DCMR register is virtually identical - give or take
41 * a couple of bits. The only exception is the 5272 devices, their
42 * DRAM controller is quite different.
45 movel MCF_MBAR+MCFSIM_DMR0,%d0 /* get mask for 1st bank */
46 btst #0,%d0 /* check if region enabled */
50 addl #0x00040000,%d0 /* convert mask to size */
52 movel MCF_MBAR+MCFSIM_DMR1,%d1 /* get mask for 2nd bank */
53 btst #0,%d1 /* check if region enabled */
58 addl %d1,%d0 /* total mem size in d0 */
62 #elif defined(CONFIG_M5272)
64 movel MCF_MBAR+MCFSIM_CSOR7,%d0 /* get SDRAM address mask */
65 andil #0xfffff000,%d0 /* mask out chip select options */
66 negl %d0 /* negate bits */
69 #elif defined(CONFIG_M520x)
72 movel MCF_MBAR+MCFSIM_SDCS0, %d2 /* Get SDRAM chip select 0 config */
73 andl #0x1f, %d2 /* Get only the chip select size */
74 beq 3f /* Check if it is enabled */
75 addql #1, %d2 /* Form exponent */
77 lsll %d2, %d0 /* 2 ^ exponent */
79 movel MCF_MBAR+MCFSIM_SDCS1, %d2 /* Get SDRAM chip select 1 config */
80 andl #0x1f, %d2 /* Get only the chip select size */
81 beq 4f /* Check if it is enabled */
82 addql #1, %d2 /* Form exponent */
84 lsll %d2, %d1 /* 2 ^ exponent */
85 addl %d1, %d0 /* Total size of SDRAM in d0 */
90 #error "ERROR: I don't know how to probe your boards memory size?"
93 /*****************************************************************************/
96 * Boards and platforms can do specific early hardware setup if
97 * they need to. Most don't need this, define away if not required.
99 #ifndef PLATFORM_SETUP
100 #define PLATFORM_SETUP
103 /*****************************************************************************/
110 #if defined(CONFIG_UBOOT)
114 /*****************************************************************************/
119 * During startup we store away the RAM setup. These are not in the
120 * bss, since their values are determined and written before the bss
131 #if defined(CONFIG_UBOOT)
136 /*****************************************************************************/
141 * This is the codes first entry point. This is where it all
147 movew #0x2700, %sr /* no interrupts */
148 #if defined(CONFIG_UBOOT)
149 movel %sp,_init_sp /* save initial stack pointer */
153 * Do any platform or board specific setup now. Most boards
154 * don't need anything. Those exceptions are define this in
155 * their board specific includes.
160 * Create basic memory configuration. Set VBR accordingly,
163 movel #CONFIG_VECTORBASE,%a7
164 movec %a7,%VBR /* set vectors addr */
167 movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
170 GET_MEM_SIZE /* macro code determines size */
172 movel %d0,_ramend /* set end ram addr */
175 * Now that we know what the memory is, lets enable cache
176 * and get things moving. This is Coldfire CPU specific.
178 CACHE_ENABLE /* enable CPU cache */
181 #ifdef CONFIG_ROMFS_FS
183 * Move ROM filesystem above bss :-)
185 lea _sbss,%a0 /* get start of bss */
186 lea _ebss,%a1 /* set up destination */
187 movel %a0,%a2 /* copy of bss start */
189 movel 8(%a0),%d0 /* get size of ROMFS */
190 addql #8,%d0 /* allow for rounding */
191 andl #0xfffffffc, %d0 /* whole words */
193 addl %d0,%a0 /* copy from end */
194 addl %d0,%a1 /* copy from end */
195 movel %a1,_ramstart /* set start of ram */
198 movel -(%a0),%d0 /* copy dword */
200 cmpl %a0,%a2 /* check if at end */
203 #else /* CONFIG_ROMFS_FS */
206 #endif /* CONFIG_ROMFS_FS */
210 * Zero out the bss region.
212 lea _sbss,%a0 /* get start of bss */
213 lea _ebss,%a1 /* get end of bss */
214 clrl %d0 /* set value */
216 movel %d0,(%a0)+ /* clear each word */
217 cmpl %a0,%a1 /* check if at end */
221 * Load the current task pointer and stack.
223 lea init_thread_union,%a0
224 lea THREAD_SIZE(%a0),%sp
227 * Assember start up done, start code proper.
229 jsr start_kernel /* start Linux kernel */
232 jmp _exit /* should never get here */
234 /*****************************************************************************/