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1 /*
2 * Copyright (C) 2005,2006,2007,2008,2009,2010,2011 Imagination Technologies
3 *
4 * This file contains the architecture-dependent parts of process handling.
5 *
6 */
7
8 #include <linux/errno.h>
9 #include <linux/export.h>
10 #include <linux/sched.h>
11 #include <linux/sched/debug.h>
12 #include <linux/kernel.h>
13 #include <linux/mm.h>
14 #include <linux/unistd.h>
15 #include <linux/ptrace.h>
16 #include <linux/user.h>
17 #include <linux/reboot.h>
18 #include <linux/elfcore.h>
19 #include <linux/fs.h>
20 #include <linux/tick.h>
21 #include <linux/slab.h>
22 #include <linux/mman.h>
23 #include <linux/pm.h>
24 #include <linux/syscalls.h>
25 #include <linux/uaccess.h>
26 #include <linux/smp.h>
27 #include <asm/core_reg.h>
28 #include <asm/user_gateway.h>
29 #include <asm/tcm.h>
30 #include <asm/traps.h>
31 #include <asm/switch_to.h>
32
33 /*
34 * Wait for the next interrupt and enable local interrupts
35 */
36 void arch_cpu_idle(void)
37 {
38 int tmp;
39
40 /*
41 * Quickly jump straight into the interrupt entry point without actually
42 * triggering an interrupt. When TXSTATI gets read the processor will
43 * block until an interrupt is triggered.
44 */
45 asm volatile (/* Switch into ISTAT mode */
46 "RTH\n\t"
47 /* Enable local interrupts */
48 "MOV TXMASKI, %1\n\t"
49 /*
50 * We can't directly "SWAP PC, PCX", so we swap via a
51 * temporary. Essentially we do:
52 * PCX_new = 1f (the place to continue execution)
53 * PC = PCX_old
54 */
55 "ADD %0, CPC0, #(1f-.)\n\t"
56 "SWAP PCX, %0\n\t"
57 "MOV PC, %0\n"
58 /* Continue execution here with interrupts enabled */
59 "1:"
60 : "=a" (tmp)
61 : "r" (get_trigger_mask()));
62 }
63
64 #ifdef CONFIG_HOTPLUG_CPU
65 void arch_cpu_idle_dead(void)
66 {
67 cpu_die();
68 }
69 #endif
70
71 void (*pm_power_off)(void);
72 EXPORT_SYMBOL(pm_power_off);
73
74 void (*soc_restart)(char *cmd);
75 void (*soc_halt)(void);
76
77 void machine_restart(char *cmd)
78 {
79 if (soc_restart)
80 soc_restart(cmd);
81 hard_processor_halt(HALT_OK);
82 }
83
84 void machine_halt(void)
85 {
86 if (soc_halt)
87 soc_halt();
88 smp_send_stop();
89 hard_processor_halt(HALT_OK);
90 }
91
92 void machine_power_off(void)
93 {
94 if (pm_power_off)
95 pm_power_off();
96 smp_send_stop();
97 hard_processor_halt(HALT_OK);
98 }
99
100 #define FLAG_Z 0x8
101 #define FLAG_N 0x4
102 #define FLAG_O 0x2
103 #define FLAG_C 0x1
104
105 void show_regs(struct pt_regs *regs)
106 {
107 int i;
108 const char *AX0_names[] = {"A0StP", "A0FrP"};
109 const char *AX1_names[] = {"A1GbP", "A1LbP"};
110
111 const char *DX0_names[] = {
112 "D0Re0",
113 "D0Ar6",
114 "D0Ar4",
115 "D0Ar2",
116 "D0FrT",
117 "D0.5 ",
118 "D0.6 ",
119 "D0.7 "
120 };
121
122 const char *DX1_names[] = {
123 "D1Re0",
124 "D1Ar5",
125 "D1Ar3",
126 "D1Ar1",
127 "D1RtP",
128 "D1.5 ",
129 "D1.6 ",
130 "D1.7 "
131 };
132
133 show_regs_print_info(KERN_INFO);
134
135 pr_info(" pt_regs @ %p\n", regs);
136 pr_info(" SaveMask = 0x%04hx\n", regs->ctx.SaveMask);
137 pr_info(" Flags = 0x%04hx (%c%c%c%c)\n", regs->ctx.Flags,
138 regs->ctx.Flags & FLAG_Z ? 'Z' : 'z',
139 regs->ctx.Flags & FLAG_N ? 'N' : 'n',
140 regs->ctx.Flags & FLAG_O ? 'O' : 'o',
141 regs->ctx.Flags & FLAG_C ? 'C' : 'c');
142 pr_info(" TXRPT = 0x%08x\n", regs->ctx.CurrRPT);
143 pr_info(" PC = 0x%08x\n", regs->ctx.CurrPC);
144
145 /* AX regs */
146 for (i = 0; i < 2; i++) {
147 pr_info(" %s = 0x%08x ",
148 AX0_names[i],
149 regs->ctx.AX[i].U0);
150 printk(" %s = 0x%08x\n",
151 AX1_names[i],
152 regs->ctx.AX[i].U1);
153 }
154
155 if (regs->ctx.SaveMask & TBICTX_XEXT_BIT)
156 pr_warn(" Extended state present - AX2.[01] will be WRONG\n");
157
158 /* Special place with AXx.2 */
159 pr_info(" A0.2 = 0x%08x ",
160 regs->ctx.Ext.AX2.U0);
161 printk(" A1.2 = 0x%08x\n",
162 regs->ctx.Ext.AX2.U1);
163
164 /* 'extended' AX regs (nominally, just AXx.3) */
165 for (i = 0; i < (TBICTX_AX_REGS - 3); i++) {
166 pr_info(" A0.%d = 0x%08x ", i + 3, regs->ctx.AX3[i].U0);
167 printk(" A1.%d = 0x%08x\n", i + 3, regs->ctx.AX3[i].U1);
168 }
169
170 for (i = 0; i < 8; i++) {
171 pr_info(" %s = 0x%08x ", DX0_names[i], regs->ctx.DX[i].U0);
172 printk(" %s = 0x%08x\n", DX1_names[i], regs->ctx.DX[i].U1);
173 }
174
175 show_trace(NULL, (unsigned long *)regs->ctx.AX[0].U0, regs);
176 }
177
178 /*
179 * Copy architecture-specific thread state
180 */
181 int copy_thread(unsigned long clone_flags, unsigned long usp,
182 unsigned long kthread_arg, struct task_struct *tsk)
183 {
184 struct pt_regs *childregs = task_pt_regs(tsk);
185 void *kernel_context = ((void *) childregs +
186 sizeof(struct pt_regs));
187 unsigned long global_base;
188
189 BUG_ON(((unsigned long)childregs) & 0x7);
190 BUG_ON(((unsigned long)kernel_context) & 0x7);
191
192 memset(&tsk->thread.kernel_context, 0,
193 sizeof(tsk->thread.kernel_context));
194
195 tsk->thread.kernel_context = __TBISwitchInit(kernel_context,
196 ret_from_fork,
197 0, 0);
198
199 if (unlikely(tsk->flags & PF_KTHREAD)) {
200 /*
201 * Make sure we don't leak any kernel data to child's regs
202 * if kernel thread becomes a userspace thread in the future
203 */
204 memset(childregs, 0 , sizeof(struct pt_regs));
205
206 global_base = __core_reg_get(A1GbP);
207 childregs->ctx.AX[0].U1 = (unsigned long) global_base;
208 childregs->ctx.AX[0].U0 = (unsigned long) kernel_context;
209 /* Set D1Ar1=kthread_arg and D1RtP=usp (fn) */
210 childregs->ctx.DX[4].U1 = usp;
211 childregs->ctx.DX[3].U1 = kthread_arg;
212 tsk->thread.int_depth = 2;
213 return 0;
214 }
215
216 /*
217 * Get a pointer to where the new child's register block should have
218 * been pushed.
219 * The Meta's stack grows upwards, and the context is the the first
220 * thing to be pushed by TBX (phew)
221 */
222 *childregs = *current_pt_regs();
223 /* Set the correct stack for the clone mode */
224 if (usp)
225 childregs->ctx.AX[0].U0 = ALIGN(usp, 8);
226 tsk->thread.int_depth = 1;
227
228 /* set return value for child process */
229 childregs->ctx.DX[0].U0 = 0;
230
231 /* The TLS pointer is passed as an argument to sys_clone. */
232 if (clone_flags & CLONE_SETTLS)
233 tsk->thread.tls_ptr =
234 (__force void __user *)childregs->ctx.DX[1].U1;
235
236 #ifdef CONFIG_METAG_FPU
237 if (tsk->thread.fpu_context) {
238 struct meta_fpu_context *ctx;
239
240 ctx = kmemdup(tsk->thread.fpu_context,
241 sizeof(struct meta_fpu_context), GFP_ATOMIC);
242 tsk->thread.fpu_context = ctx;
243 }
244 #endif
245
246 #ifdef CONFIG_METAG_DSP
247 if (tsk->thread.dsp_context) {
248 struct meta_ext_context *ctx;
249 int i;
250
251 ctx = kmemdup(tsk->thread.dsp_context,
252 sizeof(struct meta_ext_context), GFP_ATOMIC);
253 for (i = 0; i < 2; i++)
254 ctx->ram[i] = kmemdup(ctx->ram[i], ctx->ram_sz[i],
255 GFP_ATOMIC);
256 tsk->thread.dsp_context = ctx;
257 }
258 #endif
259
260 return 0;
261 }
262
263 #ifdef CONFIG_METAG_FPU
264 static void alloc_fpu_context(struct thread_struct *thread)
265 {
266 thread->fpu_context = kzalloc(sizeof(struct meta_fpu_context),
267 GFP_ATOMIC);
268 }
269
270 static void clear_fpu(struct thread_struct *thread)
271 {
272 thread->user_flags &= ~TBICTX_FPAC_BIT;
273 kfree(thread->fpu_context);
274 thread->fpu_context = NULL;
275 }
276 #else
277 static void clear_fpu(struct thread_struct *thread)
278 {
279 }
280 #endif
281
282 #ifdef CONFIG_METAG_DSP
283 static void clear_dsp(struct thread_struct *thread)
284 {
285 if (thread->dsp_context) {
286 kfree(thread->dsp_context->ram[0]);
287 kfree(thread->dsp_context->ram[1]);
288
289 kfree(thread->dsp_context);
290
291 thread->dsp_context = NULL;
292 }
293
294 __core_reg_set(D0.8, 0);
295 }
296 #else
297 static void clear_dsp(struct thread_struct *thread)
298 {
299 }
300 #endif
301
302 struct task_struct *__sched __switch_to(struct task_struct *prev,
303 struct task_struct *next)
304 {
305 TBIRES to, from;
306
307 to.Switch.pCtx = next->thread.kernel_context;
308 to.Switch.pPara = prev;
309
310 #ifdef CONFIG_METAG_FPU
311 if (prev->thread.user_flags & TBICTX_FPAC_BIT) {
312 struct pt_regs *regs = task_pt_regs(prev);
313 TBIRES state;
314
315 state.Sig.SaveMask = prev->thread.user_flags;
316 state.Sig.pCtx = &regs->ctx;
317
318 if (!prev->thread.fpu_context)
319 alloc_fpu_context(&prev->thread);
320 if (prev->thread.fpu_context)
321 __TBICtxFPUSave(state, prev->thread.fpu_context);
322 }
323 /*
324 * Force a restore of the FPU context next time this process is
325 * scheduled.
326 */
327 if (prev->thread.fpu_context)
328 prev->thread.fpu_context->needs_restore = true;
329 #endif
330
331
332 from = __TBISwitch(to, &prev->thread.kernel_context);
333
334 /* Restore TLS pointer for this process. */
335 set_gateway_tls(current->thread.tls_ptr);
336
337 return (struct task_struct *) from.Switch.pPara;
338 }
339
340 void flush_thread(void)
341 {
342 clear_fpu(&current->thread);
343 clear_dsp(&current->thread);
344 }
345
346 /*
347 * Free current thread data structures etc.
348 */
349 void exit_thread(struct task_struct *tsk)
350 {
351 clear_fpu(&tsk->thread);
352 clear_dsp(&tsk->thread);
353 }
354
355 /* TODO: figure out how to unwind the kernel stack here to figure out
356 * where we went to sleep. */
357 unsigned long get_wchan(struct task_struct *p)
358 {
359 return 0;
360 }
361
362 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
363 {
364 /* Returning 0 indicates that the FPU state was not stored (as it was
365 * not in use) */
366 return 0;
367 }
368
369 #ifdef CONFIG_METAG_USER_TCM
370
371 #define ELF_MIN_ALIGN PAGE_SIZE
372
373 #define ELF_PAGESTART(_v) ((_v) & ~(unsigned long)(ELF_MIN_ALIGN-1))
374 #define ELF_PAGEOFFSET(_v) ((_v) & (ELF_MIN_ALIGN-1))
375 #define ELF_PAGEALIGN(_v) (((_v) + ELF_MIN_ALIGN - 1) & ~(ELF_MIN_ALIGN - 1))
376
377 #define BAD_ADDR(x) ((unsigned long)(x) >= TASK_SIZE)
378
379 unsigned long __metag_elf_map(struct file *filep, unsigned long addr,
380 struct elf_phdr *eppnt, int prot, int type,
381 unsigned long total_size)
382 {
383 unsigned long map_addr, size;
384 unsigned long page_off = ELF_PAGEOFFSET(eppnt->p_vaddr);
385 unsigned long raw_size = eppnt->p_filesz + page_off;
386 unsigned long off = eppnt->p_offset - page_off;
387 unsigned int tcm_tag;
388 addr = ELF_PAGESTART(addr);
389 size = ELF_PAGEALIGN(raw_size);
390
391 /* mmap() will return -EINVAL if given a zero size, but a
392 * segment with zero filesize is perfectly valid */
393 if (!size)
394 return addr;
395
396 tcm_tag = tcm_lookup_tag(addr);
397
398 if (tcm_tag != TCM_INVALID_TAG)
399 type &= ~MAP_FIXED;
400
401 /*
402 * total_size is the size of the ELF (interpreter) image.
403 * The _first_ mmap needs to know the full size, otherwise
404 * randomization might put this image into an overlapping
405 * position with the ELF binary image. (since size < total_size)
406 * So we first map the 'big' image - and unmap the remainder at
407 * the end. (which unmap is needed for ELF images with holes.)
408 */
409 if (total_size) {
410 total_size = ELF_PAGEALIGN(total_size);
411 map_addr = vm_mmap(filep, addr, total_size, prot, type, off);
412 if (!BAD_ADDR(map_addr))
413 vm_munmap(map_addr+size, total_size-size);
414 } else
415 map_addr = vm_mmap(filep, addr, size, prot, type, off);
416
417 if (!BAD_ADDR(map_addr) && tcm_tag != TCM_INVALID_TAG) {
418 struct tcm_allocation *tcm;
419 unsigned long tcm_addr;
420
421 tcm = kmalloc(sizeof(*tcm), GFP_KERNEL);
422 if (!tcm)
423 return -ENOMEM;
424
425 tcm_addr = tcm_alloc(tcm_tag, raw_size);
426 if (tcm_addr != addr) {
427 kfree(tcm);
428 return -ENOMEM;
429 }
430
431 tcm->tag = tcm_tag;
432 tcm->addr = tcm_addr;
433 tcm->size = raw_size;
434
435 list_add(&tcm->list, &current->mm->context.tcm);
436
437 eppnt->p_vaddr = map_addr;
438 if (copy_from_user((void *) addr, (void __user *) map_addr,
439 raw_size))
440 return -EFAULT;
441 }
442
443 return map_addr;
444 }
445 #endif