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1 /*
2 * Copyright (C) 2005,2006,2007,2008,2009,2010,2011 Imagination Technologies
3 *
4 * This file contains the architecture-dependent parts of process handling.
5 *
6 */
7
8 #include <linux/errno.h>
9 #include <linux/export.h>
10 #include <linux/sched.h>
11 #include <linux/sched/debug.h>
12 #include <linux/sched/task.h>
13 #include <linux/sched/task_stack.h>
14 #include <linux/kernel.h>
15 #include <linux/mm.h>
16 #include <linux/unistd.h>
17 #include <linux/ptrace.h>
18 #include <linux/user.h>
19 #include <linux/reboot.h>
20 #include <linux/elfcore.h>
21 #include <linux/fs.h>
22 #include <linux/tick.h>
23 #include <linux/slab.h>
24 #include <linux/mman.h>
25 #include <linux/pm.h>
26 #include <linux/syscalls.h>
27 #include <linux/uaccess.h>
28 #include <linux/smp.h>
29 #include <asm/core_reg.h>
30 #include <asm/user_gateway.h>
31 #include <asm/tcm.h>
32 #include <asm/traps.h>
33 #include <asm/switch_to.h>
34
35 /*
36 * Wait for the next interrupt and enable local interrupts
37 */
38 void arch_cpu_idle(void)
39 {
40 int tmp;
41
42 /*
43 * Quickly jump straight into the interrupt entry point without actually
44 * triggering an interrupt. When TXSTATI gets read the processor will
45 * block until an interrupt is triggered.
46 */
47 asm volatile (/* Switch into ISTAT mode */
48 "RTH\n\t"
49 /* Enable local interrupts */
50 "MOV TXMASKI, %1\n\t"
51 /*
52 * We can't directly "SWAP PC, PCX", so we swap via a
53 * temporary. Essentially we do:
54 * PCX_new = 1f (the place to continue execution)
55 * PC = PCX_old
56 */
57 "ADD %0, CPC0, #(1f-.)\n\t"
58 "SWAP PCX, %0\n\t"
59 "MOV PC, %0\n"
60 /* Continue execution here with interrupts enabled */
61 "1:"
62 : "=a" (tmp)
63 : "r" (get_trigger_mask()));
64 }
65
66 #ifdef CONFIG_HOTPLUG_CPU
67 void arch_cpu_idle_dead(void)
68 {
69 cpu_die();
70 }
71 #endif
72
73 void (*pm_power_off)(void);
74 EXPORT_SYMBOL(pm_power_off);
75
76 void (*soc_restart)(char *cmd);
77 void (*soc_halt)(void);
78
79 void machine_restart(char *cmd)
80 {
81 if (soc_restart)
82 soc_restart(cmd);
83 hard_processor_halt(HALT_OK);
84 }
85
86 void machine_halt(void)
87 {
88 if (soc_halt)
89 soc_halt();
90 smp_send_stop();
91 hard_processor_halt(HALT_OK);
92 }
93
94 void machine_power_off(void)
95 {
96 if (pm_power_off)
97 pm_power_off();
98 smp_send_stop();
99 hard_processor_halt(HALT_OK);
100 }
101
102 #define FLAG_Z 0x8
103 #define FLAG_N 0x4
104 #define FLAG_O 0x2
105 #define FLAG_C 0x1
106
107 void show_regs(struct pt_regs *regs)
108 {
109 int i;
110 const char *AX0_names[] = {"A0StP", "A0FrP"};
111 const char *AX1_names[] = {"A1GbP", "A1LbP"};
112
113 const char *DX0_names[] = {
114 "D0Re0",
115 "D0Ar6",
116 "D0Ar4",
117 "D0Ar2",
118 "D0FrT",
119 "D0.5 ",
120 "D0.6 ",
121 "D0.7 "
122 };
123
124 const char *DX1_names[] = {
125 "D1Re0",
126 "D1Ar5",
127 "D1Ar3",
128 "D1Ar1",
129 "D1RtP",
130 "D1.5 ",
131 "D1.6 ",
132 "D1.7 "
133 };
134
135 show_regs_print_info(KERN_INFO);
136
137 pr_info(" pt_regs @ %p\n", regs);
138 pr_info(" SaveMask = 0x%04hx\n", regs->ctx.SaveMask);
139 pr_info(" Flags = 0x%04hx (%c%c%c%c)\n", regs->ctx.Flags,
140 regs->ctx.Flags & FLAG_Z ? 'Z' : 'z',
141 regs->ctx.Flags & FLAG_N ? 'N' : 'n',
142 regs->ctx.Flags & FLAG_O ? 'O' : 'o',
143 regs->ctx.Flags & FLAG_C ? 'C' : 'c');
144 pr_info(" TXRPT = 0x%08x\n", regs->ctx.CurrRPT);
145 pr_info(" PC = 0x%08x\n", regs->ctx.CurrPC);
146
147 /* AX regs */
148 for (i = 0; i < 2; i++) {
149 pr_info(" %s = 0x%08x ",
150 AX0_names[i],
151 regs->ctx.AX[i].U0);
152 printk(" %s = 0x%08x\n",
153 AX1_names[i],
154 regs->ctx.AX[i].U1);
155 }
156
157 if (regs->ctx.SaveMask & TBICTX_XEXT_BIT)
158 pr_warn(" Extended state present - AX2.[01] will be WRONG\n");
159
160 /* Special place with AXx.2 */
161 pr_info(" A0.2 = 0x%08x ",
162 regs->ctx.Ext.AX2.U0);
163 printk(" A1.2 = 0x%08x\n",
164 regs->ctx.Ext.AX2.U1);
165
166 /* 'extended' AX regs (nominally, just AXx.3) */
167 for (i = 0; i < (TBICTX_AX_REGS - 3); i++) {
168 pr_info(" A0.%d = 0x%08x ", i + 3, regs->ctx.AX3[i].U0);
169 printk(" A1.%d = 0x%08x\n", i + 3, regs->ctx.AX3[i].U1);
170 }
171
172 for (i = 0; i < 8; i++) {
173 pr_info(" %s = 0x%08x ", DX0_names[i], regs->ctx.DX[i].U0);
174 printk(" %s = 0x%08x\n", DX1_names[i], regs->ctx.DX[i].U1);
175 }
176
177 show_trace(NULL, (unsigned long *)regs->ctx.AX[0].U0, regs);
178 }
179
180 /*
181 * Copy architecture-specific thread state
182 */
183 int copy_thread(unsigned long clone_flags, unsigned long usp,
184 unsigned long kthread_arg, struct task_struct *tsk)
185 {
186 struct pt_regs *childregs = task_pt_regs(tsk);
187 void *kernel_context = ((void *) childregs +
188 sizeof(struct pt_regs));
189 unsigned long global_base;
190
191 BUG_ON(((unsigned long)childregs) & 0x7);
192 BUG_ON(((unsigned long)kernel_context) & 0x7);
193
194 memset(&tsk->thread.kernel_context, 0,
195 sizeof(tsk->thread.kernel_context));
196
197 tsk->thread.kernel_context = __TBISwitchInit(kernel_context,
198 ret_from_fork,
199 0, 0);
200
201 if (unlikely(tsk->flags & PF_KTHREAD)) {
202 /*
203 * Make sure we don't leak any kernel data to child's regs
204 * if kernel thread becomes a userspace thread in the future
205 */
206 memset(childregs, 0 , sizeof(struct pt_regs));
207
208 global_base = __core_reg_get(A1GbP);
209 childregs->ctx.AX[0].U1 = (unsigned long) global_base;
210 childregs->ctx.AX[0].U0 = (unsigned long) kernel_context;
211 /* Set D1Ar1=kthread_arg and D1RtP=usp (fn) */
212 childregs->ctx.DX[4].U1 = usp;
213 childregs->ctx.DX[3].U1 = kthread_arg;
214 tsk->thread.int_depth = 2;
215 return 0;
216 }
217
218 /*
219 * Get a pointer to where the new child's register block should have
220 * been pushed.
221 * The Meta's stack grows upwards, and the context is the the first
222 * thing to be pushed by TBX (phew)
223 */
224 *childregs = *current_pt_regs();
225 /* Set the correct stack for the clone mode */
226 if (usp)
227 childregs->ctx.AX[0].U0 = ALIGN(usp, 8);
228 tsk->thread.int_depth = 1;
229
230 /* set return value for child process */
231 childregs->ctx.DX[0].U0 = 0;
232
233 /* The TLS pointer is passed as an argument to sys_clone. */
234 if (clone_flags & CLONE_SETTLS)
235 tsk->thread.tls_ptr =
236 (__force void __user *)childregs->ctx.DX[1].U1;
237
238 #ifdef CONFIG_METAG_FPU
239 if (tsk->thread.fpu_context) {
240 struct meta_fpu_context *ctx;
241
242 ctx = kmemdup(tsk->thread.fpu_context,
243 sizeof(struct meta_fpu_context), GFP_ATOMIC);
244 tsk->thread.fpu_context = ctx;
245 }
246 #endif
247
248 #ifdef CONFIG_METAG_DSP
249 if (tsk->thread.dsp_context) {
250 struct meta_ext_context *ctx;
251 int i;
252
253 ctx = kmemdup(tsk->thread.dsp_context,
254 sizeof(struct meta_ext_context), GFP_ATOMIC);
255 for (i = 0; i < 2; i++)
256 ctx->ram[i] = kmemdup(ctx->ram[i], ctx->ram_sz[i],
257 GFP_ATOMIC);
258 tsk->thread.dsp_context = ctx;
259 }
260 #endif
261
262 return 0;
263 }
264
265 #ifdef CONFIG_METAG_FPU
266 static void alloc_fpu_context(struct thread_struct *thread)
267 {
268 thread->fpu_context = kzalloc(sizeof(struct meta_fpu_context),
269 GFP_ATOMIC);
270 }
271
272 static void clear_fpu(struct thread_struct *thread)
273 {
274 thread->user_flags &= ~TBICTX_FPAC_BIT;
275 kfree(thread->fpu_context);
276 thread->fpu_context = NULL;
277 }
278 #else
279 static void clear_fpu(struct thread_struct *thread)
280 {
281 }
282 #endif
283
284 #ifdef CONFIG_METAG_DSP
285 static void clear_dsp(struct thread_struct *thread)
286 {
287 if (thread->dsp_context) {
288 kfree(thread->dsp_context->ram[0]);
289 kfree(thread->dsp_context->ram[1]);
290
291 kfree(thread->dsp_context);
292
293 thread->dsp_context = NULL;
294 }
295
296 __core_reg_set(D0.8, 0);
297 }
298 #else
299 static void clear_dsp(struct thread_struct *thread)
300 {
301 }
302 #endif
303
304 struct task_struct *__sched __switch_to(struct task_struct *prev,
305 struct task_struct *next)
306 {
307 TBIRES to, from;
308
309 to.Switch.pCtx = next->thread.kernel_context;
310 to.Switch.pPara = prev;
311
312 #ifdef CONFIG_METAG_FPU
313 if (prev->thread.user_flags & TBICTX_FPAC_BIT) {
314 struct pt_regs *regs = task_pt_regs(prev);
315 TBIRES state;
316
317 state.Sig.SaveMask = prev->thread.user_flags;
318 state.Sig.pCtx = &regs->ctx;
319
320 if (!prev->thread.fpu_context)
321 alloc_fpu_context(&prev->thread);
322 if (prev->thread.fpu_context)
323 __TBICtxFPUSave(state, prev->thread.fpu_context);
324 }
325 /*
326 * Force a restore of the FPU context next time this process is
327 * scheduled.
328 */
329 if (prev->thread.fpu_context)
330 prev->thread.fpu_context->needs_restore = true;
331 #endif
332
333
334 from = __TBISwitch(to, &prev->thread.kernel_context);
335
336 /* Restore TLS pointer for this process. */
337 set_gateway_tls(current->thread.tls_ptr);
338
339 return (struct task_struct *) from.Switch.pPara;
340 }
341
342 void flush_thread(void)
343 {
344 clear_fpu(&current->thread);
345 clear_dsp(&current->thread);
346 }
347
348 /*
349 * Free current thread data structures etc.
350 */
351 void exit_thread(struct task_struct *tsk)
352 {
353 clear_fpu(&tsk->thread);
354 clear_dsp(&tsk->thread);
355 }
356
357 /* TODO: figure out how to unwind the kernel stack here to figure out
358 * where we went to sleep. */
359 unsigned long get_wchan(struct task_struct *p)
360 {
361 return 0;
362 }
363
364 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
365 {
366 /* Returning 0 indicates that the FPU state was not stored (as it was
367 * not in use) */
368 return 0;
369 }
370
371 #ifdef CONFIG_METAG_USER_TCM
372
373 #define ELF_MIN_ALIGN PAGE_SIZE
374
375 #define ELF_PAGESTART(_v) ((_v) & ~(unsigned long)(ELF_MIN_ALIGN-1))
376 #define ELF_PAGEOFFSET(_v) ((_v) & (ELF_MIN_ALIGN-1))
377 #define ELF_PAGEALIGN(_v) (((_v) + ELF_MIN_ALIGN - 1) & ~(ELF_MIN_ALIGN - 1))
378
379 #define BAD_ADDR(x) ((unsigned long)(x) >= TASK_SIZE)
380
381 unsigned long __metag_elf_map(struct file *filep, unsigned long addr,
382 struct elf_phdr *eppnt, int prot, int type,
383 unsigned long total_size)
384 {
385 unsigned long map_addr, size;
386 unsigned long page_off = ELF_PAGEOFFSET(eppnt->p_vaddr);
387 unsigned long raw_size = eppnt->p_filesz + page_off;
388 unsigned long off = eppnt->p_offset - page_off;
389 unsigned int tcm_tag;
390 addr = ELF_PAGESTART(addr);
391 size = ELF_PAGEALIGN(raw_size);
392
393 /* mmap() will return -EINVAL if given a zero size, but a
394 * segment with zero filesize is perfectly valid */
395 if (!size)
396 return addr;
397
398 tcm_tag = tcm_lookup_tag(addr);
399
400 if (tcm_tag != TCM_INVALID_TAG)
401 type &= ~MAP_FIXED;
402
403 /*
404 * total_size is the size of the ELF (interpreter) image.
405 * The _first_ mmap needs to know the full size, otherwise
406 * randomization might put this image into an overlapping
407 * position with the ELF binary image. (since size < total_size)
408 * So we first map the 'big' image - and unmap the remainder at
409 * the end. (which unmap is needed for ELF images with holes.)
410 */
411 if (total_size) {
412 total_size = ELF_PAGEALIGN(total_size);
413 map_addr = vm_mmap(filep, addr, total_size, prot, type, off);
414 if (!BAD_ADDR(map_addr))
415 vm_munmap(map_addr+size, total_size-size);
416 } else
417 map_addr = vm_mmap(filep, addr, size, prot, type, off);
418
419 if (!BAD_ADDR(map_addr) && tcm_tag != TCM_INVALID_TAG) {
420 struct tcm_allocation *tcm;
421 unsigned long tcm_addr;
422
423 tcm = kmalloc(sizeof(*tcm), GFP_KERNEL);
424 if (!tcm)
425 return -ENOMEM;
426
427 tcm_addr = tcm_alloc(tcm_tag, raw_size);
428 if (tcm_addr != addr) {
429 kfree(tcm);
430 return -ENOMEM;
431 }
432
433 tcm->tag = tcm_tag;
434 tcm->addr = tcm_addr;
435 tcm->size = raw_size;
436
437 list_add(&tcm->list, &current->mm->context.tcm);
438
439 eppnt->p_vaddr = map_addr;
440 if (copy_from_user((void *) addr, (void __user *) map_addr,
441 raw_size))
442 return -EFAULT;
443 }
444
445 return map_addr;
446 }
447 #endif