]>
git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/metag/kernel/traps.c
2 * Meta exception handling.
4 * Copyright (C) 2005,2006,2007,2008,2009,2012 Imagination Technologies Ltd.
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file COPYING in the main directory of this archive
11 #include <linux/export.h>
12 #include <linux/sched.h>
13 #include <linux/sched/debug.h>
14 #include <linux/sched/task.h>
15 #include <linux/signal.h>
16 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/preempt.h>
22 #include <linux/ptrace.h>
23 #include <linux/module.h>
24 #include <linux/kallsyms.h>
25 #include <linux/kdebug.h>
26 #include <linux/kexec.h>
27 #include <linux/unistd.h>
28 #include <linux/smp.h>
29 #include <linux/slab.h>
30 #include <linux/syscalls.h>
33 #include <asm/core_reg.h>
34 #include <asm/irqflags.h>
35 #include <asm/siginfo.h>
36 #include <asm/traps.h>
37 #include <asm/hwthread.h>
38 #include <asm/setup.h>
39 #include <asm/switch.h>
40 #include <asm/user_gateway.h>
41 #include <asm/syscall.h>
42 #include <asm/syscalls.h>
44 /* Passing syscall arguments as long long is quicker. */
45 typedef unsigned int (*LPSYSCALL
) (unsigned long long,
50 * Users of LNKSET should compare the bus error bits obtained from DEFR
51 * against TXDEFR_LNKSET_SUCCESS only as the failure code will vary between
52 * different cores revisions.
54 #define TXDEFR_LNKSET_SUCCESS 0x02000000
55 #define TXDEFR_LNKSET_FAILURE 0x04000000
58 * Our global TBI handle. Initialised from setup.c/setup_arch.
60 DECLARE_PER_CPU(PTBI
, pTBI
);
63 static DEFINE_PER_CPU(unsigned int, trigger_mask
);
65 unsigned int global_trigger_mask
;
66 EXPORT_SYMBOL(global_trigger_mask
);
69 unsigned long per_cpu__stack_save
[NR_CPUS
];
71 static const char * const trap_names
[] = {
72 [TBIXXF_SIGNUM_IIF
] = "Illegal instruction fault",
73 [TBIXXF_SIGNUM_PGF
] = "Privilege violation",
74 [TBIXXF_SIGNUM_DHF
] = "Unaligned data access fault",
75 [TBIXXF_SIGNUM_IGF
] = "Code fetch general read failure",
76 [TBIXXF_SIGNUM_DGF
] = "Data access general read/write fault",
77 [TBIXXF_SIGNUM_IPF
] = "Code fetch page fault",
78 [TBIXXF_SIGNUM_DPF
] = "Data access page fault",
79 [TBIXXF_SIGNUM_IHF
] = "Instruction breakpoint",
80 [TBIXXF_SIGNUM_DWF
] = "Read-only data access fault",
83 const char *trap_name(int trapno
)
85 if (trapno
>= 0 && trapno
< ARRAY_SIZE(trap_names
)
86 && trap_names
[trapno
])
87 return trap_names
[trapno
];
88 return "Unknown fault";
91 static DEFINE_SPINLOCK(die_lock
);
93 void __noreturn
die(const char *str
, struct pt_regs
*regs
,
94 long err
, unsigned long addr
)
96 static int die_counter
;
100 spin_lock_irq(&die_lock
);
103 pr_err("%s: err %04lx (%s) addr %08lx [#%d]\n", str
, err
& 0xffff,
104 trap_name(err
& 0xffff), addr
, ++die_counter
);
109 pr_err("Process: %s (pid: %d, stack limit = %p)\n", current
->comm
,
110 task_pid_nr(current
), task_stack_page(current
) + THREAD_SIZE
);
113 add_taint(TAINT_DIE
, LOCKDEP_NOW_UNRELIABLE
);
114 if (kexec_should_crash(current
))
118 panic("Fatal exception in interrupt");
121 panic("Fatal exception");
123 spin_unlock_irq(&die_lock
);
128 #ifdef CONFIG_METAG_DSP
130 * The ECH encoding specifies the size of a DSPRAM as,
134 * A "slot" is the size of two DSPRAM bank entries; an entry from
135 * DSPRAM bank A and an entry from DSPRAM bank B. One DSPRAM bank
139 static inline unsigned int decode_dspram_size(unsigned int size
)
141 unsigned int _sz
= size
& 0x7f;
143 return _sz
* SLOT_SZ
* 4;
146 static void dspram_save(struct meta_ext_context
*dsp_ctx
,
147 unsigned int ramA_sz
, unsigned int ramB_sz
)
149 unsigned int ram_sz
[2];
155 for (i
= 0; i
< 2; i
++) {
156 if (ram_sz
[i
] != 0) {
160 sz
= decode_dspram_size(ram_sz
[i
] >> 8);
162 sz
= decode_dspram_size(ram_sz
[i
]);
164 if (dsp_ctx
->ram
[i
] == NULL
) {
165 dsp_ctx
->ram
[i
] = kmalloc(sz
, GFP_KERNEL
);
167 if (dsp_ctx
->ram
[i
] == NULL
)
168 panic("couldn't save DSP context");
170 if (ram_sz
[i
] > dsp_ctx
->ram_sz
[i
]) {
171 kfree(dsp_ctx
->ram
[i
]);
173 dsp_ctx
->ram
[i
] = kmalloc(sz
,
176 if (dsp_ctx
->ram
[i
] == NULL
)
177 panic("couldn't save DSP context");
182 __TBIDspramSaveA(ram_sz
[i
], dsp_ctx
->ram
[i
]);
184 __TBIDspramSaveB(ram_sz
[i
], dsp_ctx
->ram
[i
]);
186 dsp_ctx
->ram_sz
[i
] = ram_sz
[i
];
190 #endif /* CONFIG_METAG_DSP */
193 * Allow interrupts to be nested and save any "extended" register
194 * context state, e.g. DSP regs and RAMs.
196 static void nest_interrupts(TBIRES State
, unsigned long mask
)
198 #ifdef CONFIG_METAG_DSP
199 struct meta_ext_context
*dsp_ctx
;
203 * D0.8 may contain an ECH encoding. The upper 16 bits
204 * tell us what DSP resources the current process is
205 * using. OR the bits into the SaveMask so that
206 * __TBINestInts() knows what resources to save as
207 * part of this context.
209 * Don't save the context if we're nesting interrupts in the
210 * kernel because the kernel doesn't use DSP hardware.
212 D0_8
= __core_reg_get(D0
.8
);
214 if (D0_8
&& (State
.Sig
.SaveMask
& TBICTX_PRIV_BIT
)) {
215 State
.Sig
.SaveMask
|= (D0_8
>> 16);
217 dsp_ctx
= current
->thread
.dsp_context
;
218 if (dsp_ctx
== NULL
) {
219 dsp_ctx
= kzalloc(sizeof(*dsp_ctx
), GFP_KERNEL
);
221 panic("couldn't save DSP context: ENOMEM");
223 current
->thread
.dsp_context
= dsp_ctx
;
226 current
->thread
.user_flags
|= (D0_8
& 0xffff0000);
227 __TBINestInts(State
, &dsp_ctx
->regs
, mask
);
228 dspram_save(dsp_ctx
, D0_8
& 0x7f00, D0_8
& 0x007f);
230 __TBINestInts(State
, NULL
, mask
);
232 __TBINestInts(State
, NULL
, mask
);
236 void head_end(TBIRES State
, unsigned long mask
)
238 unsigned int savemask
= (unsigned short)State
.Sig
.SaveMask
;
239 unsigned int ctx_savemask
= (unsigned short)State
.Sig
.pCtx
->SaveMask
;
241 if (savemask
& TBICTX_PRIV_BIT
) {
242 ctx_savemask
|= TBICTX_PRIV_BIT
;
243 current
->thread
.user_flags
= savemask
;
246 /* Always undo the sleep bit */
247 ctx_savemask
&= ~TBICTX_WAIT_BIT
;
249 /* Always save the catch buffer and RD pipe if they are dirty */
250 savemask
|= TBICTX_XCBF_BIT
;
252 /* Only save the catch and RD if we have not already done so.
253 * Note - the RD bits are in the pCtx only, and not in the
256 if ((savemask
& TBICTX_CBUF_BIT
) ||
257 (ctx_savemask
& TBICTX_CBRP_BIT
)) {
258 /* Have we already saved the buffers though?
259 * - See TestTrack 5071 */
260 if (ctx_savemask
& TBICTX_XCBF_BIT
) {
261 /* Strip off the bits so the call to __TBINestInts
262 * won't save the buffers again. */
263 savemask
&= ~TBICTX_CBUF_BIT
;
264 ctx_savemask
&= ~TBICTX_CBRP_BIT
;
268 #ifdef CONFIG_METAG_META21
270 unsigned int depth
, txdefr
;
275 * The process may have been interrupted after a LNKSET, but
276 * before it could read the DEFR state, so we mustn't lose that
277 * state or it could end up retrying an atomic operation that
280 * All interrupts are disabled at this point so we
281 * don't need to perform any locking. We must do this
282 * dance before we use LNKGET or LNKSET.
284 BUG_ON(current
->thread
.int_depth
> HARDIRQ_BITS
);
286 depth
= current
->thread
.int_depth
++;
288 txdefr
= __core_reg_get(TXDEFR
);
290 txdefr
&= TXDEFR_BUS_STATE_BITS
;
291 if (txdefr
& TXDEFR_LNKSET_SUCCESS
)
292 current
->thread
.txdefr_failure
&= ~(1 << depth
);
294 current
->thread
.txdefr_failure
|= (1 << depth
);
298 State
.Sig
.SaveMask
= savemask
;
299 State
.Sig
.pCtx
->SaveMask
= ctx_savemask
;
301 nest_interrupts(State
, mask
);
303 #ifdef CONFIG_METAG_POISON_CATCH_BUFFERS
304 /* Poison the catch registers. This shows up any mistakes we have
305 * made in their handling MUCH quicker.
307 __core_reg_set(TXCATCH0
, 0x87650021);
308 __core_reg_set(TXCATCH1
, 0x87654322);
309 __core_reg_set(TXCATCH2
, 0x87654323);
310 __core_reg_set(TXCATCH3
, 0x87654324);
311 #endif /* CONFIG_METAG_POISON_CATCH_BUFFERS */
314 TBIRES
tail_end_sys(TBIRES State
, int syscall
, int *restart
)
316 struct pt_regs
*regs
= (struct pt_regs
*)State
.Sig
.pCtx
;
321 if (user_mode(regs
)) {
322 flags
= current_thread_info()->flags
;
323 if (flags
& _TIF_WORK_MASK
&&
324 do_work_pending(regs
, flags
, syscall
)) {
329 #ifdef CONFIG_METAG_FPU
330 if (current
->thread
.fpu_context
&&
331 current
->thread
.fpu_context
->needs_restore
) {
332 __TBICtxFPURestore(State
, current
->thread
.fpu_context
);
334 * Clearing this bit ensures the FP unit is not made
335 * active again unless it is used.
337 State
.Sig
.SaveMask
&= ~TBICTX_FPAC_BIT
;
338 current
->thread
.fpu_context
->needs_restore
= false;
340 State
.Sig
.TrigMask
|= TBI_TRIG_BIT(TBID_SIGNUM_DFR
);
344 /* TBI will turn interrupts back on at some point. */
345 if (!irqs_disabled_flags((unsigned long)State
.Sig
.TrigMask
))
348 #ifdef CONFIG_METAG_DSP
350 * If we previously saved an extended context then restore it
351 * now. Otherwise, clear D0.8 because this process is not
352 * using DSP hardware.
354 if (State
.Sig
.pCtx
->SaveMask
& TBICTX_XEXT_BIT
) {
356 struct meta_ext_context
*dsp_ctx
= current
->thread
.dsp_context
;
358 /* Make sure we're going to return to userland. */
359 BUG_ON(current
->thread
.int_depth
!= 1);
361 if (dsp_ctx
->ram_sz
[0] > 0)
362 __TBIDspramRestoreA(dsp_ctx
->ram_sz
[0],
364 if (dsp_ctx
->ram_sz
[1] > 0)
365 __TBIDspramRestoreB(dsp_ctx
->ram_sz
[1],
368 State
.Sig
.SaveMask
|= State
.Sig
.pCtx
->SaveMask
;
369 __TBICtxRestore(State
, current
->thread
.dsp_context
);
370 D0_8
= __core_reg_get(D0
.8
);
371 D0_8
|= current
->thread
.user_flags
& 0xffff0000;
372 D0_8
|= (dsp_ctx
->ram_sz
[1] | dsp_ctx
->ram_sz
[0]) & 0xffff;
373 __core_reg_set(D0
.8
, D0_8
);
375 __core_reg_set(D0
.8
, 0);
376 #endif /* CONFIG_METAG_DSP */
378 #ifdef CONFIG_METAG_META21
380 unsigned int depth
, txdefr
;
383 * If there hasn't been a LNKSET since the last LNKGET then the
384 * link flag will be set, causing the next LNKSET to succeed if
385 * the addresses match. The two LNK operations may not be a pair
386 * (e.g. see atomic_read()), so the LNKSET should fail.
387 * We use a conditional-never LNKSET to clear the link flag
388 * without side effects.
390 asm volatile("LNKSETDNV [D0Re0],D0Re0");
392 depth
= --current
->thread
.int_depth
;
394 BUG_ON(user_mode(regs
) && depth
);
396 txdefr
= __core_reg_get(TXDEFR
);
398 txdefr
&= ~TXDEFR_BUS_STATE_BITS
;
400 /* Do we need to restore a failure code into TXDEFR? */
401 if (current
->thread
.txdefr_failure
& (1 << depth
))
402 txdefr
|= (TXDEFR_LNKSET_FAILURE
| TXDEFR_BUS_TRIG_BIT
);
404 txdefr
|= (TXDEFR_LNKSET_SUCCESS
| TXDEFR_BUS_TRIG_BIT
);
406 __core_reg_set(TXDEFR
, txdefr
);
414 * If we took an interrupt in the middle of __kuser_get_tls then we need
415 * to rewind the PC to the start of the function in case the process
416 * gets migrated to another thread (SMP only) and it reads the wrong tls
419 static inline void _restart_critical_section(TBIRES State
)
421 unsigned long get_tls_start
;
422 unsigned long get_tls_end
;
424 get_tls_start
= (unsigned long)__kuser_get_tls
-
425 (unsigned long)&__user_gateway_start
;
427 get_tls_start
+= USER_GATEWAY_PAGE
;
429 get_tls_end
= (unsigned long)__kuser_get_tls_end
-
430 (unsigned long)&__user_gateway_start
;
432 get_tls_end
+= USER_GATEWAY_PAGE
;
434 if ((State
.Sig
.pCtx
->CurrPC
>= get_tls_start
) &&
435 (State
.Sig
.pCtx
->CurrPC
< get_tls_end
))
436 State
.Sig
.pCtx
->CurrPC
= get_tls_start
;
440 * If we took an interrupt in the middle of
441 * __kuser_cmpxchg then we need to rewind the PC to the
442 * start of the function.
444 static inline void _restart_critical_section(TBIRES State
)
446 unsigned long cmpxchg_start
;
447 unsigned long cmpxchg_end
;
449 cmpxchg_start
= (unsigned long)__kuser_cmpxchg
-
450 (unsigned long)&__user_gateway_start
;
452 cmpxchg_start
+= USER_GATEWAY_PAGE
;
454 cmpxchg_end
= (unsigned long)__kuser_cmpxchg_end
-
455 (unsigned long)&__user_gateway_start
;
457 cmpxchg_end
+= USER_GATEWAY_PAGE
;
459 if ((State
.Sig
.pCtx
->CurrPC
>= cmpxchg_start
) &&
460 (State
.Sig
.pCtx
->CurrPC
< cmpxchg_end
))
461 State
.Sig
.pCtx
->CurrPC
= cmpxchg_start
;
465 /* Used by kick_handler() */
466 void restart_critical_section(TBIRES State
)
468 _restart_critical_section(State
);
471 TBIRES
trigger_handler(TBIRES State
, int SigNum
, int Triggers
, int Inst
,
474 head_end(State
, ~INTS_OFF_MASK
);
476 /* If we interrupted user code handle any critical sections. */
477 if (State
.Sig
.SaveMask
& TBICTX_PRIV_BIT
)
478 _restart_critical_section(State
);
480 trace_hardirqs_off();
482 do_IRQ(SigNum
, (struct pt_regs
*)State
.Sig
.pCtx
);
484 return tail_end(State
);
487 static unsigned int load_fault(PTBICTXEXTCB0 pbuf
)
489 return pbuf
->CBFlags
& TXCATCH0_READ_BIT
;
492 static unsigned long fault_address(PTBICTXEXTCB0 pbuf
)
497 static void unhandled_fault(struct pt_regs
*regs
, unsigned long addr
,
498 int signo
, int code
, int trapno
)
500 if (user_mode(regs
)) {
503 if (show_unhandled_signals
&& unhandled_signal(current
, signo
)
504 && printk_ratelimit()) {
506 pr_info("pid %d unhandled fault: pc 0x%08x, addr 0x%08lx, trap %d (%s)\n",
507 current
->pid
, regs
->ctx
.CurrPC
, addr
,
508 trapno
, trap_name(trapno
));
509 print_vma_addr(" in ", regs
->ctx
.CurrPC
);
510 print_vma_addr(" rtp in ", regs
->ctx
.DX
[4].U1
);
515 info
.si_signo
= signo
;
518 info
.si_addr
= (__force
void __user
*)addr
;
519 info
.si_trapno
= trapno
;
520 force_sig_info(signo
, &info
, current
);
522 die("Oops", regs
, trapno
, addr
);
526 static int handle_data_fault(PTBICTXEXTCB0 pcbuf
, struct pt_regs
*regs
,
527 unsigned int data_address
, int trapno
)
531 ret
= do_page_fault(regs
, data_address
, !load_fault(pcbuf
), trapno
);
536 static unsigned long get_inst_fault_address(struct pt_regs
*regs
)
538 return regs
->ctx
.CurrPC
;
541 TBIRES
fault_handler(TBIRES State
, int SigNum
, int Triggers
,
544 struct pt_regs
*regs
= (struct pt_regs
*)State
.Sig
.pCtx
;
545 PTBICTXEXTCB0 pcbuf
= (PTBICTXEXTCB0
)®s
->extcb0
;
546 unsigned long data_address
;
548 head_end(State
, ~INTS_OFF_MASK
);
550 /* Hardware breakpoint or data watch */
551 if ((SigNum
== TBIXXF_SIGNUM_IHF
) ||
552 ((SigNum
== TBIXXF_SIGNUM_DHF
) &&
553 (pcbuf
[0].CBFlags
& (TXCATCH0_WATCH1_BIT
|
554 TXCATCH0_WATCH0_BIT
)))) {
555 State
= __TBIUnExpXXX(State
, SigNum
, Triggers
, Inst
,
557 return tail_end(State
);
562 data_address
= fault_address(pcbuf
);
565 case TBIXXF_SIGNUM_IGF
:
566 /* 1st-level entry invalid (instruction fetch) */
567 case TBIXXF_SIGNUM_IPF
: {
568 /* 2nd-level entry invalid (instruction fetch) */
569 unsigned long addr
= get_inst_fault_address(regs
);
570 do_page_fault(regs
, addr
, 0, SigNum
);
574 case TBIXXF_SIGNUM_DGF
:
575 /* 1st-level entry invalid (data access) */
576 case TBIXXF_SIGNUM_DPF
:
577 /* 2nd-level entry invalid (data access) */
578 case TBIXXF_SIGNUM_DWF
:
579 /* Write to read only page */
580 handle_data_fault(pcbuf
, regs
, data_address
, SigNum
);
583 case TBIXXF_SIGNUM_IIF
:
584 /* Illegal instruction */
585 unhandled_fault(regs
, regs
->ctx
.CurrPC
, SIGILL
, ILL_ILLOPC
,
589 case TBIXXF_SIGNUM_DHF
:
590 /* Unaligned access */
591 unhandled_fault(regs
, data_address
, SIGBUS
, BUS_ADRALN
,
594 case TBIXXF_SIGNUM_PGF
:
595 /* Privilege violation */
596 unhandled_fault(regs
, data_address
, SIGSEGV
, SEGV_ACCERR
,
604 return tail_end(State
);
607 static bool switch_is_syscall(unsigned int inst
)
609 return inst
== __METAG_SW_ENCODING(SYS
);
612 static bool switch_is_legacy_syscall(unsigned int inst
)
614 return inst
== __METAG_SW_ENCODING(SYS_LEGACY
);
617 static inline void step_over_switch(struct pt_regs
*regs
, unsigned int inst
)
619 regs
->ctx
.CurrPC
+= 4;
622 static inline int test_syscall_work(void)
624 return current_thread_info()->flags
& _TIF_WORK_SYSCALL_MASK
;
627 TBIRES
switch1_handler(TBIRES State
, int SigNum
, int Triggers
,
630 struct pt_regs
*regs
= (struct pt_regs
*)State
.Sig
.pCtx
;
631 unsigned int sysnumber
;
632 unsigned long long a1_a2
, a3_a4
, a5_a6
;
633 LPSYSCALL syscall_entry
;
636 head_end(State
, ~INTS_OFF_MASK
);
639 * If this is not a syscall SWITCH it could be a breakpoint.
641 if (!switch_is_syscall(Inst
)) {
643 * Alert the user if they're trying to use legacy system
644 * calls. This suggests they need to update their C
645 * library and build against up to date kernel headers.
647 if (switch_is_legacy_syscall(Inst
))
648 pr_warn_once("WARNING: A legacy syscall was made. Your userland needs updating.\n");
650 * We don't know how to handle the SWITCH and cannot
651 * safely ignore it, so treat all unknown switches
652 * (including breakpoints) as traps.
654 force_sig(SIGTRAP
, current
);
655 return tail_end(State
);
662 sysnumber
= regs
->ctx
.DX
[0].U1
;
664 if (test_syscall_work())
665 sysnumber
= syscall_trace_enter(regs
);
667 /* Skip over the SWITCH instruction - or you just get 'stuck' on it! */
668 step_over_switch(regs
, Inst
);
670 if (sysnumber
>= __NR_syscalls
) {
671 pr_debug("unknown syscall number: %d\n", sysnumber
);
672 syscall_entry
= (LPSYSCALL
) sys_ni_syscall
;
674 syscall_entry
= (LPSYSCALL
) sys_call_table
[sysnumber
];
677 /* Use 64bit loads for speed. */
678 a5_a6
= *(unsigned long long *)®s
->ctx
.DX
[1];
679 a3_a4
= *(unsigned long long *)®s
->ctx
.DX
[2];
680 a1_a2
= *(unsigned long long *)®s
->ctx
.DX
[3];
682 /* here is the actual call to the syscall handler functions */
683 regs
->ctx
.DX
[0].U0
= syscall_entry(a1_a2
, a3_a4
, a5_a6
);
685 if (test_syscall_work())
686 syscall_trace_leave(regs
);
688 State
= tail_end_sys(State
, sysnumber
, &restart
);
689 /* Handlerless restarts shouldn't go via userland */
691 goto restart_syscall
;
695 TBIRES
switchx_handler(TBIRES State
, int SigNum
, int Triggers
,
698 struct pt_regs
*regs
= (struct pt_regs
*)State
.Sig
.pCtx
;
701 * This can be caused by any user process simply executing an unusual
702 * SWITCH instruction. If there's no DA, __TBIUnExpXXX will cause the
703 * thread to stop, so signal a SIGTRAP instead.
705 head_end(State
, ~INTS_OFF_MASK
);
707 force_sig(SIGTRAP
, current
);
709 State
= __TBIUnExpXXX(State
, SigNum
, Triggers
, Inst
, pTBI
);
710 return tail_end(State
);
713 #ifdef CONFIG_METAG_META21
714 TBIRES
fpe_handler(TBIRES State
, int SigNum
, int Triggers
, int Inst
, PTBI pTBI
)
716 struct pt_regs
*regs
= (struct pt_regs
*)State
.Sig
.pCtx
;
717 unsigned int error_state
= Triggers
;
720 head_end(State
, ~INTS_OFF_MASK
);
724 info
.si_signo
= SIGFPE
;
726 if (error_state
& TXSTAT_FPE_INVALID_BIT
)
727 info
.si_code
= FPE_FLTINV
;
728 else if (error_state
& TXSTAT_FPE_DIVBYZERO_BIT
)
729 info
.si_code
= FPE_FLTDIV
;
730 else if (error_state
& TXSTAT_FPE_OVERFLOW_BIT
)
731 info
.si_code
= FPE_FLTOVF
;
732 else if (error_state
& TXSTAT_FPE_UNDERFLOW_BIT
)
733 info
.si_code
= FPE_FLTUND
;
734 else if (error_state
& TXSTAT_FPE_INEXACT_BIT
)
735 info
.si_code
= FPE_FLTRES
;
739 info
.si_addr
= (__force
void __user
*)regs
->ctx
.CurrPC
;
740 force_sig_info(SIGFPE
, &info
, current
);
742 return tail_end(State
);
746 #ifdef CONFIG_METAG_SUSPEND_MEM
747 struct traps_context
{
748 PTBIAPIFN fnSigs
[TBID_SIGNUM_MAX
+ 1];
751 static struct traps_context
*metag_traps_context
;
753 int traps_save_context(void)
755 unsigned long cpu
= smp_processor_id();
756 PTBI _pTBI
= per_cpu(pTBI
, cpu
);
757 struct traps_context
*context
;
759 context
= kzalloc(sizeof(*context
), GFP_ATOMIC
);
763 memcpy(context
->fnSigs
, (void *)_pTBI
->fnSigs
, sizeof(context
->fnSigs
));
765 metag_traps_context
= context
;
769 int traps_restore_context(void)
771 unsigned long cpu
= smp_processor_id();
772 PTBI _pTBI
= per_cpu(pTBI
, cpu
);
773 struct traps_context
*context
= metag_traps_context
;
775 metag_traps_context
= NULL
;
777 memcpy((void *)_pTBI
->fnSigs
, context
->fnSigs
, sizeof(context
->fnSigs
));
785 static inline unsigned int _get_trigger_mask(void)
787 unsigned long cpu
= smp_processor_id();
788 return per_cpu(trigger_mask
, cpu
);
791 unsigned int get_trigger_mask(void)
793 return _get_trigger_mask();
795 EXPORT_SYMBOL(get_trigger_mask
);
797 static void set_trigger_mask(unsigned int mask
)
799 unsigned long cpu
= smp_processor_id();
800 per_cpu(trigger_mask
, cpu
) = mask
;
803 void arch_local_irq_enable(void)
806 arch_local_irq_restore(_get_trigger_mask());
807 preempt_enable_no_resched();
809 EXPORT_SYMBOL(arch_local_irq_enable
);
811 static void set_trigger_mask(unsigned int mask
)
813 global_trigger_mask
= mask
;
817 void per_cpu_trap_init(unsigned long cpu
)
820 unsigned int thread
= cpu_2_hwthread_id
[cpu
];
822 set_trigger_mask(TBI_INTS_INIT(thread
) | /* interrupts */
823 TBI_TRIG_BIT(TBID_SIGNUM_LWK
) | /* low level kick */
824 TBI_TRIG_BIT(TBID_SIGNUM_SW1
));
826 /* non-priv - use current stack */
827 int_context
.Sig
.pCtx
= NULL
;
828 /* Start with interrupts off */
829 int_context
.Sig
.TrigMask
= INTS_OFF_MASK
;
830 int_context
.Sig
.SaveMask
= 0;
832 /* And call __TBIASyncTrigger() */
833 __TBIASyncTrigger(int_context
);
836 void __init
trap_init(void)
838 unsigned long cpu
= smp_processor_id();
839 PTBI _pTBI
= per_cpu(pTBI
, cpu
);
841 _pTBI
->fnSigs
[TBID_SIGNUM_XXF
] = fault_handler
;
842 _pTBI
->fnSigs
[TBID_SIGNUM_SW0
] = switchx_handler
;
843 _pTBI
->fnSigs
[TBID_SIGNUM_SW1
] = switch1_handler
;
844 _pTBI
->fnSigs
[TBID_SIGNUM_SW2
] = switchx_handler
;
845 _pTBI
->fnSigs
[TBID_SIGNUM_SW3
] = switchx_handler
;
846 _pTBI
->fnSigs
[TBID_SIGNUM_LWK
] = kick_handler
;
848 #ifdef CONFIG_METAG_META21
849 _pTBI
->fnSigs
[TBID_SIGNUM_DFR
] = __TBIHandleDFR
;
850 _pTBI
->fnSigs
[TBID_SIGNUM_FPE
] = fpe_handler
;
853 per_cpu_trap_init(cpu
);
856 void tbi_startup_interrupt(int irq
)
858 unsigned long cpu
= smp_processor_id();
859 PTBI _pTBI
= per_cpu(pTBI
, cpu
);
861 BUG_ON(irq
> TBID_SIGNUM_MAX
);
863 /* For TR1 and TR2, the thread id is encoded in the irq number */
864 if (irq
>= TBID_SIGNUM_T10
&& irq
< TBID_SIGNUM_TR3
)
865 cpu
= hwthread_id_2_cpu
[(irq
- TBID_SIGNUM_T10
) % 4];
867 set_trigger_mask(get_trigger_mask() | TBI_TRIG_BIT(irq
));
869 _pTBI
->fnSigs
[irq
] = trigger_handler
;
872 void tbi_shutdown_interrupt(int irq
)
874 unsigned long cpu
= smp_processor_id();
875 PTBI _pTBI
= per_cpu(pTBI
, cpu
);
877 BUG_ON(irq
> TBID_SIGNUM_MAX
);
879 set_trigger_mask(get_trigger_mask() & ~TBI_TRIG_BIT(irq
));
881 _pTBI
->fnSigs
[irq
] = __TBIUnExpXXX
;
884 int ret_from_fork(TBIRES arg
)
886 struct task_struct
*prev
= arg
.Switch
.pPara
;
887 struct task_struct
*tsk
= current
;
888 struct pt_regs
*regs
= task_pt_regs(tsk
);
894 if (tsk
->flags
& PF_KTHREAD
) {
895 fn
= (void *)regs
->ctx
.DX
[4].U1
;
898 fn((void *)regs
->ctx
.DX
[3].U1
);
901 if (test_syscall_work())
902 syscall_trace_leave(regs
);
906 Next
.Sig
.TrigMask
= get_trigger_mask();
907 Next
.Sig
.SaveMask
= 0;
908 Next
.Sig
.pCtx
= ®s
->ctx
;
910 set_gateway_tls(current
->thread
.tls_ptr
);
912 preempt_enable_no_resched();
914 /* And interrupts should come back on when we resume the real usermode
915 * code. Call __TBIASyncResume()
917 __TBIASyncResume(tail_end(Next
));
918 /* ASyncResume should NEVER return */
923 void show_trace(struct task_struct
*tsk
, unsigned long *sp
,
924 struct pt_regs
*regs
)
927 #ifdef CONFIG_FRAME_POINTER
928 unsigned long fp
, fpnew
;
932 if (regs
&& user_mode(regs
))
935 printk("\nCall trace: ");
936 #ifdef CONFIG_KALLSYMS
943 #ifdef CONFIG_FRAME_POINTER
945 print_ip_sym(regs
->ctx
.CurrPC
);
946 fp
= regs
->ctx
.AX
[1].U0
;
948 fp
= __core_reg_get(A0FrP
);
951 /* detect when the frame pointer has been used for other purposes and
952 * doesn't point to the stack (it may point completely elsewhere which
953 * kstack_end may not detect).
955 stack
= (unsigned long)task_stack_page(tsk
);
956 while (fp
>= stack
&& fp
+ 8 <= stack
+ THREAD_SIZE
) {
957 addr
= __raw_readl((unsigned long *)(fp
+ 4)) - 4;
958 if (kernel_text_address(addr
))
962 /* stack grows up, so frame pointers must decrease */
963 fpnew
= __raw_readl((unsigned long *)(fp
+ 0));
969 while (!kstack_end(sp
)) {
971 if (kernel_text_address(addr
))
978 debug_show_held_locks(tsk
);
981 void show_stack(struct task_struct
*tsk
, unsigned long *sp
)
986 sp
= (unsigned long *)current_stack_pointer
;
988 sp
= (unsigned long *)tsk
->thread
.kernel_context
->AX
[0].U0
;
990 show_trace(tsk
, sp
, NULL
);