2 * DBAu1300 init and platform device setup.
4 * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
8 #include <linux/dma-mapping.h>
9 #include <linux/gpio.h>
10 #include <linux/gpio_keys.h>
11 #include <linux/init.h>
12 #include <linux/input.h> /* KEY_* codes */
13 #include <linux/i2c.h>
15 #include <linux/leds.h>
16 #include <linux/interrupt.h>
17 #include <linux/ata_platform.h>
18 #include <linux/mmc/host.h>
19 #include <linux/module.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/rawnand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/platform_device.h>
24 #include <linux/smsc911x.h>
25 #include <linux/wm97xx.h>
27 #include <asm/mach-au1x00/au1000.h>
28 #include <asm/mach-au1x00/gpio-au1300.h>
29 #include <asm/mach-au1x00/au1100_mmc.h>
30 #include <asm/mach-au1x00/au1200fb.h>
31 #include <asm/mach-au1x00/au1xxx_dbdma.h>
32 #include <asm/mach-au1x00/au1xxx_psc.h>
33 #include <asm/mach-db1x00/bcsr.h>
34 #include <asm/mach-au1x00/prom.h>
38 /* FPGA (external mux) interrupt sources */
39 #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
40 #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
41 #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
42 #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
43 #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
44 #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
45 #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
46 #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
47 #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
48 #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
49 #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
50 #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
51 #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
52 #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
53 #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
54 #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
55 #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
58 #define DB1300_ETH_PHYS_ADDR 0x19000000
59 #define DB1300_ETH_PHYS_END 0x197fffff
62 #define DB1300_IDE_PHYS_ADDR 0x18800000
63 #define DB1300_IDE_REG_SHIFT 5
64 #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
67 #define DB1300_NAND_PHYS_ADDR 0x20000000
68 #define DB1300_NAND_PHYS_END 0x20000fff
71 static struct i2c_board_info db1300_i2c_devs
[] __initdata
= {
72 { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
73 { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
76 /* multifunction pins to assign to GPIO controller */
77 static int db1300_gpio_pins
[] __initdata
= {
78 AU1300_PIN_LCDPWM0
, AU1300_PIN_PSC2SYNC1
, AU1300_PIN_WAKE1
,
79 AU1300_PIN_WAKE2
, AU1300_PIN_WAKE3
, AU1300_PIN_FG3AUX
,
84 /* multifunction pins to assign to device functions */
85 static int db1300_dev_pins
[] __initdata
= {
86 /* wake-from-str pins 0-3 */
88 /* external clock sources for PSC0 */
90 /* 8bit MMC interface on SD0: 6-9 */
91 AU1300_PIN_SD0DAT4
, AU1300_PIN_SD0DAT5
, AU1300_PIN_SD0DAT6
,
93 /* UART1 pins: 11-18 */
94 AU1300_PIN_U1RI
, AU1300_PIN_U1DCD
, AU1300_PIN_U1DSR
,
95 AU1300_PIN_U1CTS
, AU1300_PIN_U1RTS
, AU1300_PIN_U1DTR
,
96 AU1300_PIN_U1RX
, AU1300_PIN_U1TX
,
97 /* UART0 pins: 19-24 */
98 AU1300_PIN_U0RI
, AU1300_PIN_U0DCD
, AU1300_PIN_U0DSR
,
99 AU1300_PIN_U0CTS
, AU1300_PIN_U0RTS
, AU1300_PIN_U0DTR
,
101 AU1300_PIN_U2RX
, AU1300_PIN_U2TX
,
103 AU1300_PIN_U3RX
, AU1300_PIN_U3TX
,
104 /* LCD controller PWMs, ext pixclock: 30-31 */
105 AU1300_PIN_LCDPWM1
, AU1300_PIN_LCDCLKIN
,
106 /* SD1 interface: 32-37 */
107 AU1300_PIN_SD1DAT0
, AU1300_PIN_SD1DAT1
, AU1300_PIN_SD1DAT2
,
108 AU1300_PIN_SD1DAT3
, AU1300_PIN_SD1CMD
, AU1300_PIN_SD1CLK
,
109 /* SD2 interface: 38-43 */
110 AU1300_PIN_SD2DAT0
, AU1300_PIN_SD2DAT1
, AU1300_PIN_SD2DAT2
,
111 AU1300_PIN_SD2DAT3
, AU1300_PIN_SD2CMD
, AU1300_PIN_SD2CLK
,
112 /* PSC0/1 clocks: 44-45 */
113 AU1300_PIN_PSC0CLK
, AU1300_PIN_PSC1CLK
,
114 /* PSCs: 46-49/50-53/54-57/58-61 */
115 AU1300_PIN_PSC0SYNC0
, AU1300_PIN_PSC0SYNC1
, AU1300_PIN_PSC0D0
,
117 AU1300_PIN_PSC1SYNC0
, AU1300_PIN_PSC1SYNC1
, AU1300_PIN_PSC1D0
,
119 AU1300_PIN_PSC2SYNC0
, AU1300_PIN_PSC2D0
,
121 AU1300_PIN_PSC3SYNC0
, AU1300_PIN_PSC3SYNC1
, AU1300_PIN_PSC3D0
,
123 /* PCMCIA interface: 62-70 */
124 AU1300_PIN_PCE2
, AU1300_PIN_PCE1
, AU1300_PIN_PIOS16
,
125 AU1300_PIN_PIOR
, AU1300_PIN_PWE
, AU1300_PIN_PWAIT
,
126 AU1300_PIN_PREG
, AU1300_PIN_POE
, AU1300_PIN_PIOW
,
127 /* camera interface H/V sync inputs: 71-72 */
128 AU1300_PIN_CIMLS
, AU1300_PIN_CIMFS
,
129 /* PSC2/3 clocks: 73-74 */
130 AU1300_PIN_PSC2CLK
, AU1300_PIN_PSC3CLK
,
134 static void __init
db1300_gpio_config(void)
138 i
= &db1300_dev_pins
[0];
140 au1300_pinfunc_to_dev(*i
++);
142 i
= &db1300_gpio_pins
[0];
144 au1300_gpio_direction_input(*i
++);/* implies pin_to_gpio */
146 au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX
);
149 /**********************************************************************/
151 static void au1300_nand_cmd_ctrl(struct mtd_info
*mtd
, int cmd
,
154 struct nand_chip
*this = mtd_to_nand(mtd
);
155 unsigned long ioaddr
= (unsigned long)this->IO_ADDR_W
;
157 ioaddr
&= 0xffffff00;
159 if (ctrl
& NAND_CLE
) {
160 ioaddr
+= MEM_STNAND_CMD
;
161 } else if (ctrl
& NAND_ALE
) {
162 ioaddr
+= MEM_STNAND_ADDR
;
164 /* assume we want to r/w real data by default */
165 ioaddr
+= MEM_STNAND_DATA
;
167 this->IO_ADDR_R
= this->IO_ADDR_W
= (void __iomem
*)ioaddr
;
168 if (cmd
!= NAND_CMD_NONE
) {
169 __raw_writeb(cmd
, this->IO_ADDR_W
);
174 static int au1300_nand_device_ready(struct mtd_info
*mtd
)
176 return alchemy_rdsmem(AU1000_MEM_STSTAT
) & 1;
179 static struct mtd_partition db1300_nand_parts
[] = {
183 .size
= 8 * 1024 * 1024,
187 .offset
= MTDPART_OFS_APPEND
,
188 .size
= MTDPART_SIZ_FULL
192 struct platform_nand_data db1300_nand_platdata
= {
196 .nr_partitions
= ARRAY_SIZE(db1300_nand_parts
),
197 .partitions
= db1300_nand_parts
,
201 .dev_ready
= au1300_nand_device_ready
,
202 .cmd_ctrl
= au1300_nand_cmd_ctrl
,
206 static struct resource db1300_nand_res
[] = {
208 .start
= DB1300_NAND_PHYS_ADDR
,
209 .end
= DB1300_NAND_PHYS_ADDR
+ 0xff,
210 .flags
= IORESOURCE_MEM
,
214 static struct platform_device db1300_nand_dev
= {
216 .num_resources
= ARRAY_SIZE(db1300_nand_res
),
217 .resource
= db1300_nand_res
,
220 .platform_data
= &db1300_nand_platdata
,
224 /**********************************************************************/
226 static struct resource db1300_eth_res
[] = {
228 .start
= DB1300_ETH_PHYS_ADDR
,
229 .end
= DB1300_ETH_PHYS_END
,
230 .flags
= IORESOURCE_MEM
,
233 .start
= DB1300_ETH_INT
,
234 .end
= DB1300_ETH_INT
,
235 .flags
= IORESOURCE_IRQ
,
239 static struct smsc911x_platform_config db1300_eth_config
= {
240 .phy_interface
= PHY_INTERFACE_MODE_MII
,
241 .irq_polarity
= SMSC911X_IRQ_POLARITY_ACTIVE_LOW
,
242 .irq_type
= SMSC911X_IRQ_TYPE_PUSH_PULL
,
243 .flags
= SMSC911X_USE_32BIT
,
246 static struct platform_device db1300_eth_dev
= {
249 .num_resources
= ARRAY_SIZE(db1300_eth_res
),
250 .resource
= db1300_eth_res
,
252 .platform_data
= &db1300_eth_config
,
256 /**********************************************************************/
258 static struct resource au1300_psc1_res
[] = {
260 .start
= AU1300_PSC1_PHYS_ADDR
,
261 .end
= AU1300_PSC1_PHYS_ADDR
+ 0x0fff,
262 .flags
= IORESOURCE_MEM
,
265 .start
= AU1300_PSC1_INT
,
266 .end
= AU1300_PSC1_INT
,
267 .flags
= IORESOURCE_IRQ
,
270 .start
= AU1300_DSCR_CMD0_PSC1_TX
,
271 .end
= AU1300_DSCR_CMD0_PSC1_TX
,
272 .flags
= IORESOURCE_DMA
,
275 .start
= AU1300_DSCR_CMD0_PSC1_RX
,
276 .end
= AU1300_DSCR_CMD0_PSC1_RX
,
277 .flags
= IORESOURCE_DMA
,
281 static struct platform_device db1300_ac97_dev
= {
282 .name
= "au1xpsc_ac97",
283 .id
= 1, /* PSC ID. match with AC97 codec ID! */
284 .num_resources
= ARRAY_SIZE(au1300_psc1_res
),
285 .resource
= au1300_psc1_res
,
288 /**********************************************************************/
290 static struct resource au1300_psc2_res
[] = {
292 .start
= AU1300_PSC2_PHYS_ADDR
,
293 .end
= AU1300_PSC2_PHYS_ADDR
+ 0x0fff,
294 .flags
= IORESOURCE_MEM
,
297 .start
= AU1300_PSC2_INT
,
298 .end
= AU1300_PSC2_INT
,
299 .flags
= IORESOURCE_IRQ
,
302 .start
= AU1300_DSCR_CMD0_PSC2_TX
,
303 .end
= AU1300_DSCR_CMD0_PSC2_TX
,
304 .flags
= IORESOURCE_DMA
,
307 .start
= AU1300_DSCR_CMD0_PSC2_RX
,
308 .end
= AU1300_DSCR_CMD0_PSC2_RX
,
309 .flags
= IORESOURCE_DMA
,
313 static struct platform_device db1300_i2s_dev
= {
314 .name
= "au1xpsc_i2s",
315 .id
= 2, /* PSC ID */
316 .num_resources
= ARRAY_SIZE(au1300_psc2_res
),
317 .resource
= au1300_psc2_res
,
320 /**********************************************************************/
322 static struct resource au1300_psc3_res
[] = {
324 .start
= AU1300_PSC3_PHYS_ADDR
,
325 .end
= AU1300_PSC3_PHYS_ADDR
+ 0x0fff,
326 .flags
= IORESOURCE_MEM
,
329 .start
= AU1300_PSC3_INT
,
330 .end
= AU1300_PSC3_INT
,
331 .flags
= IORESOURCE_IRQ
,
334 .start
= AU1300_DSCR_CMD0_PSC3_TX
,
335 .end
= AU1300_DSCR_CMD0_PSC3_TX
,
336 .flags
= IORESOURCE_DMA
,
339 .start
= AU1300_DSCR_CMD0_PSC3_RX
,
340 .end
= AU1300_DSCR_CMD0_PSC3_RX
,
341 .flags
= IORESOURCE_DMA
,
345 static struct platform_device db1300_i2c_dev
= {
346 .name
= "au1xpsc_smbus",
347 .id
= 0, /* bus number */
348 .num_resources
= ARRAY_SIZE(au1300_psc3_res
),
349 .resource
= au1300_psc3_res
,
352 /**********************************************************************/
354 /* proper key assignments when facing the LCD panel. For key assignments
355 * according to the schematics swap up with down and left with right.
356 * I chose to use it to emulate the arrow keys of a keyboard.
358 static struct gpio_keys_button db1300_5waysw_arrowkeys
[] = {
361 .gpio
= AU1300_PIN_LCDPWM0
,
363 .debounce_interval
= 1,
365 .desc
= "5waysw-down",
369 .gpio
= AU1300_PIN_PSC2SYNC1
,
371 .debounce_interval
= 1,
377 .gpio
= AU1300_PIN_WAKE3
,
379 .debounce_interval
= 1,
381 .desc
= "5waysw-right",
385 .gpio
= AU1300_PIN_WAKE2
,
387 .debounce_interval
= 1,
389 .desc
= "5waysw-left",
393 .gpio
= AU1300_PIN_WAKE1
,
395 .debounce_interval
= 1,
397 .desc
= "5waysw-push",
401 static struct gpio_keys_platform_data db1300_5waysw_data
= {
402 .buttons
= db1300_5waysw_arrowkeys
,
403 .nbuttons
= ARRAY_SIZE(db1300_5waysw_arrowkeys
),
405 .name
= "db1300-5wayswitch",
408 static struct platform_device db1300_5waysw_dev
= {
411 .platform_data
= &db1300_5waysw_data
,
415 /**********************************************************************/
417 static struct pata_platform_info db1300_ide_info
= {
418 .ioport_shift
= DB1300_IDE_REG_SHIFT
,
421 #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
422 static struct resource db1300_ide_res
[] = {
424 .start
= DB1300_IDE_PHYS_ADDR
,
425 .end
= DB1300_IDE_PHYS_ADDR
+ IDE_ALT_START
- 1,
426 .flags
= IORESOURCE_MEM
,
429 .start
= DB1300_IDE_PHYS_ADDR
+ IDE_ALT_START
,
430 .end
= DB1300_IDE_PHYS_ADDR
+ DB1300_IDE_PHYS_LEN
- 1,
431 .flags
= IORESOURCE_MEM
,
434 .start
= DB1300_IDE_INT
,
435 .end
= DB1300_IDE_INT
,
436 .flags
= IORESOURCE_IRQ
,
440 static struct platform_device db1300_ide_dev
= {
442 .platform_data
= &db1300_ide_info
,
444 .name
= "pata_platform",
445 .resource
= db1300_ide_res
,
446 .num_resources
= ARRAY_SIZE(db1300_ide_res
),
449 /**********************************************************************/
451 static irqreturn_t
db1300_mmc_cd(int irq
, void *ptr
)
453 disable_irq_nosync(irq
);
454 return IRQ_WAKE_THREAD
;
457 static irqreturn_t
db1300_mmc_cdfn(int irq
, void *ptr
)
459 void (*mmc_cd
)(struct mmc_host
*, unsigned long);
461 /* link against CONFIG_MMC=m. We can only be called once MMC core has
462 * initialized the controller, so symbol_get() should always succeed.
464 mmc_cd
= symbol_get(mmc_detect_change
);
465 mmc_cd(ptr
, msecs_to_jiffies(200));
466 symbol_put(mmc_detect_change
);
468 msleep(100); /* debounce */
469 if (irq
== DB1300_SD1_INSERT_INT
)
470 enable_irq(DB1300_SD1_EJECT_INT
);
472 enable_irq(DB1300_SD1_INSERT_INT
);
477 static int db1300_mmc_card_readonly(void *mmc_host
)
479 /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
480 return bcsr_read(BCSR_STATUS
) & BCSR_STATUS_SD0WP
;
483 static int db1300_mmc_card_inserted(void *mmc_host
)
485 return bcsr_read(BCSR_SIGSTAT
) & (1 << 12); /* insertion irq signal */
488 static int db1300_mmc_cd_setup(void *mmc_host
, int en
)
493 ret
= request_threaded_irq(DB1300_SD1_INSERT_INT
, db1300_mmc_cd
,
494 db1300_mmc_cdfn
, 0, "sd_insert", mmc_host
);
498 ret
= request_threaded_irq(DB1300_SD1_EJECT_INT
, db1300_mmc_cd
,
499 db1300_mmc_cdfn
, 0, "sd_eject", mmc_host
);
501 free_irq(DB1300_SD1_INSERT_INT
, mmc_host
);
505 if (db1300_mmc_card_inserted(mmc_host
))
506 enable_irq(DB1300_SD1_EJECT_INT
);
508 enable_irq(DB1300_SD1_INSERT_INT
);
511 free_irq(DB1300_SD1_INSERT_INT
, mmc_host
);
512 free_irq(DB1300_SD1_EJECT_INT
, mmc_host
);
519 static void db1300_mmcled_set(struct led_classdev
*led
,
520 enum led_brightness brightness
)
522 if (brightness
!= LED_OFF
)
523 bcsr_mod(BCSR_LEDS
, BCSR_LEDS_LED0
, 0);
525 bcsr_mod(BCSR_LEDS
, 0, BCSR_LEDS_LED0
);
528 static struct led_classdev db1300_mmc_led
= {
529 .brightness_set
= db1300_mmcled_set
,
532 struct au1xmmc_platform_data db1300_sd1_platdata
= {
533 .cd_setup
= db1300_mmc_cd_setup
,
534 .card_inserted
= db1300_mmc_card_inserted
,
535 .card_readonly
= db1300_mmc_card_readonly
,
536 .led
= &db1300_mmc_led
,
539 static struct resource au1300_sd1_res
[] = {
541 .start
= AU1300_SD1_PHYS_ADDR
,
542 .end
= AU1300_SD1_PHYS_ADDR
,
543 .flags
= IORESOURCE_MEM
,
546 .start
= AU1300_SD1_INT
,
547 .end
= AU1300_SD1_INT
,
548 .flags
= IORESOURCE_IRQ
,
551 .start
= AU1300_DSCR_CMD0_SDMS_TX1
,
552 .end
= AU1300_DSCR_CMD0_SDMS_TX1
,
553 .flags
= IORESOURCE_DMA
,
556 .start
= AU1300_DSCR_CMD0_SDMS_RX1
,
557 .end
= AU1300_DSCR_CMD0_SDMS_RX1
,
558 .flags
= IORESOURCE_DMA
,
562 static struct platform_device db1300_sd1_dev
= {
564 .platform_data
= &db1300_sd1_platdata
,
566 .name
= "au1xxx-mmc",
568 .resource
= au1300_sd1_res
,
569 .num_resources
= ARRAY_SIZE(au1300_sd1_res
),
572 /**********************************************************************/
574 static int db1300_movinand_inserted(void *mmc_host
)
576 return 0; /* disable for now, it doesn't work yet */
579 static int db1300_movinand_readonly(void *mmc_host
)
584 static void db1300_movinand_led_set(struct led_classdev
*led
,
585 enum led_brightness brightness
)
587 if (brightness
!= LED_OFF
)
588 bcsr_mod(BCSR_LEDS
, BCSR_LEDS_LED1
, 0);
590 bcsr_mod(BCSR_LEDS
, 0, BCSR_LEDS_LED1
);
593 static struct led_classdev db1300_movinand_led
= {
594 .brightness_set
= db1300_movinand_led_set
,
597 struct au1xmmc_platform_data db1300_sd0_platdata
= {
598 .card_inserted
= db1300_movinand_inserted
,
599 .card_readonly
= db1300_movinand_readonly
,
600 .led
= &db1300_movinand_led
,
601 .mask_host_caps
= MMC_CAP_NEEDS_POLL
,
604 static struct resource au1300_sd0_res
[] = {
606 .start
= AU1100_SD0_PHYS_ADDR
,
607 .end
= AU1100_SD0_PHYS_ADDR
,
608 .flags
= IORESOURCE_MEM
,
611 .start
= AU1300_SD0_INT
,
612 .end
= AU1300_SD0_INT
,
613 .flags
= IORESOURCE_IRQ
,
616 .start
= AU1300_DSCR_CMD0_SDMS_TX0
,
617 .end
= AU1300_DSCR_CMD0_SDMS_TX0
,
618 .flags
= IORESOURCE_DMA
,
621 .start
= AU1300_DSCR_CMD0_SDMS_RX0
,
622 .end
= AU1300_DSCR_CMD0_SDMS_RX0
,
623 .flags
= IORESOURCE_DMA
,
627 static struct platform_device db1300_sd0_dev
= {
629 .platform_data
= &db1300_sd0_platdata
,
631 .name
= "au1xxx-mmc",
633 .resource
= au1300_sd0_res
,
634 .num_resources
= ARRAY_SIZE(au1300_sd0_res
),
637 /**********************************************************************/
639 static struct platform_device db1300_wm9715_dev
= {
640 .name
= "wm9712-codec",
641 .id
= 1, /* ID of PSC for AC97 audio, see asoc glue! */
644 static struct platform_device db1300_ac97dma_dev
= {
645 .name
= "au1xpsc-pcm",
646 .id
= 1, /* PSC ID */
649 static struct platform_device db1300_i2sdma_dev
= {
650 .name
= "au1xpsc-pcm",
651 .id
= 2, /* PSC ID */
654 static struct platform_device db1300_sndac97_dev
= {
655 .name
= "db1300-ac97",
658 static struct platform_device db1300_sndi2s_dev
= {
659 .name
= "db1300-i2s",
662 /**********************************************************************/
664 static int db1300fb_panel_index(void)
666 return 9; /* DB1300_800x480 */
669 static int db1300fb_panel_init(void)
671 /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
672 bcsr_mod(BCSR_BOARD
, BCSR_BOARD_LCDVEE
| BCSR_BOARD_LCDVDD
,
677 static int db1300fb_panel_shutdown(void)
679 /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
680 bcsr_mod(BCSR_BOARD
, BCSR_BOARD_LCDBL
,
681 BCSR_BOARD_LCDVEE
| BCSR_BOARD_LCDVDD
);
685 static struct au1200fb_platdata db1300fb_pd
= {
686 .panel_index
= db1300fb_panel_index
,
687 .panel_init
= db1300fb_panel_init
,
688 .panel_shutdown
= db1300fb_panel_shutdown
,
691 static struct resource au1300_lcd_res
[] = {
693 .start
= AU1200_LCD_PHYS_ADDR
,
694 .end
= AU1200_LCD_PHYS_ADDR
+ 0x800 - 1,
695 .flags
= IORESOURCE_MEM
,
698 .start
= AU1300_LCD_INT
,
699 .end
= AU1300_LCD_INT
,
700 .flags
= IORESOURCE_IRQ
,
704 static u64 au1300_lcd_dmamask
= DMA_BIT_MASK(32);
706 static struct platform_device db1300_lcd_dev
= {
707 .name
= "au1200-lcd",
710 .dma_mask
= &au1300_lcd_dmamask
,
711 .coherent_dma_mask
= DMA_BIT_MASK(32),
712 .platform_data
= &db1300fb_pd
,
714 .num_resources
= ARRAY_SIZE(au1300_lcd_res
),
715 .resource
= au1300_lcd_res
,
718 /**********************************************************************/
720 static void db1300_wm97xx_irqen(struct wm97xx
*wm
, int enable
)
723 enable_irq(DB1300_AC97_PEN_INT
);
725 disable_irq_nosync(DB1300_AC97_PEN_INT
);
728 static struct wm97xx_mach_ops db1300_wm97xx_ops
= {
729 .irq_enable
= db1300_wm97xx_irqen
,
730 .irq_gpio
= WM97XX_GPIO_3
,
733 static int db1300_wm97xx_probe(struct platform_device
*pdev
)
735 struct wm97xx
*wm
= platform_get_drvdata(pdev
);
737 /* external pendown indicator */
738 wm97xx_config_gpio(wm
, WM97XX_GPIO_13
, WM97XX_GPIO_IN
,
739 WM97XX_GPIO_POL_LOW
, WM97XX_GPIO_STICKY
,
742 /* internal "virtual" pendown gpio */
743 wm97xx_config_gpio(wm
, WM97XX_GPIO_3
, WM97XX_GPIO_OUT
,
744 WM97XX_GPIO_POL_LOW
, WM97XX_GPIO_NOTSTICKY
,
747 wm
->pen_irq
= DB1300_AC97_PEN_INT
;
749 return wm97xx_register_mach_ops(wm
, &db1300_wm97xx_ops
);
752 static struct platform_driver db1300_wm97xx_driver
= {
753 .driver
.name
= "wm97xx-touch",
754 .driver
.owner
= THIS_MODULE
,
755 .probe
= db1300_wm97xx_probe
,
758 /**********************************************************************/
760 static struct platform_device
*db1300_dev
[] __initdata
= {
778 int __init
db1300_dev_setup(void)
780 int swapped
, cpldirq
;
783 /* setup CPLD IRQ muxer */
784 cpldirq
= au1300_gpio_to_irq(AU1300_PIN_EXTCLK1
);
785 irq_set_irq_type(cpldirq
, IRQ_TYPE_LEVEL_HIGH
);
786 bcsr_init_irq(DB1300_FIRST_INT
, DB1300_LAST_INT
, cpldirq
);
788 /* insert/eject IRQs: one always triggers so don't enable them
789 * when doing request_irq() on them. DB1200 has this bug too.
791 irq_set_status_flags(DB1300_SD1_INSERT_INT
, IRQ_NOAUTOEN
);
792 irq_set_status_flags(DB1300_SD1_EJECT_INT
, IRQ_NOAUTOEN
);
793 irq_set_status_flags(DB1300_CF_INSERT_INT
, IRQ_NOAUTOEN
);
794 irq_set_status_flags(DB1300_CF_EJECT_INT
, IRQ_NOAUTOEN
);
799 prom_get_ethernet_addr(&db1300_eth_config
.mac
[0]);
801 i2c_register_board_info(0, db1300_i2c_devs
,
802 ARRAY_SIZE(db1300_i2c_devs
));
804 if (platform_driver_register(&db1300_wm97xx_driver
))
805 pr_warn("DB1300: failed to init touch pen irq support!\n");
807 /* Audio PSC clock is supplied by codecs (PSC1, 2) */
808 __raw_writel(PSC_SEL_CLK_SERCLK
,
809 (void __iomem
*)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR
) + PSC_SEL_OFFSET
);
811 __raw_writel(PSC_SEL_CLK_SERCLK
,
812 (void __iomem
*)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR
) + PSC_SEL_OFFSET
);
814 /* I2C driver wants 50MHz, get as close as possible */
815 c
= clk_get(NULL
, "psc3_intclk");
817 clk_set_rate(c
, 50000000);
818 clk_prepare_enable(c
);
821 __raw_writel(PSC_SEL_CLK_INTCLK
,
822 (void __iomem
*)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR
) + PSC_SEL_OFFSET
);
825 /* enable power to USB ports */
826 bcsr_mod(BCSR_RESETS
, 0, BCSR_RESETS_USBHPWR
| BCSR_RESETS_OTGPWR
);
828 /* although it is socket #0, it uses the CPLD bits which previous boards
829 * have used for socket #1.
831 db1x_register_pcmcia_socket(
832 AU1000_PCMCIA_ATTR_PHYS_ADDR
,
833 AU1000_PCMCIA_ATTR_PHYS_ADDR
+ 0x00400000 - 1,
834 AU1000_PCMCIA_MEM_PHYS_ADDR
,
835 AU1000_PCMCIA_MEM_PHYS_ADDR
+ 0x00400000 - 1,
836 AU1000_PCMCIA_IO_PHYS_ADDR
,
837 AU1000_PCMCIA_IO_PHYS_ADDR
+ 0x00010000 - 1,
838 DB1300_CF_INT
, DB1300_CF_INSERT_INT
, 0, DB1300_CF_EJECT_INT
, 1);
840 swapped
= bcsr_read(BCSR_STATUS
) & BCSR_STATUS_DB1200_SWAPBOOT
;
841 db1x_register_norflash(64 << 20, 2, swapped
);
843 return platform_add_devices(db1300_dev
, ARRAY_SIZE(db1300_dev
));
847 int __init
db1300_board_setup(void)
849 unsigned short whoami
;
851 bcsr_init(DB1300_BCSR_PHYS_ADDR
,
852 DB1300_BCSR_PHYS_ADDR
+ DB1300_BCSR_HEXLED_OFS
);
854 whoami
= bcsr_read(BCSR_WHOAMI
);
855 if (BCSR_WHOAMI_BOARD(whoami
) != BCSR_WHOAMI_DB1300
)
858 db1300_gpio_config();
860 printk(KERN_INFO
"NetLogic DBAu1300 Development Platform.\n\t"
861 "BoardID %d CPLD Rev %d DaughtercardID %d\n",
862 BCSR_WHOAMI_BOARD(whoami
), BCSR_WHOAMI_CPLD(whoami
),
863 BCSR_WHOAMI_DCID(whoami
));
865 /* enable UARTs, YAMON only enables #2 */
866 alchemy_uart_enable(AU1300_UART0_PHYS_ADDR
);
867 alchemy_uart_enable(AU1300_UART1_PHYS_ADDR
);
868 alchemy_uart_enable(AU1300_UART3_PHYS_ADDR
);