arch/mips/alchemy/devboards/db1x00/platform.c

   1 /*
   2  * DBAu1xxx board platform device registration
   3  *
   4  * Copyright (C) 2009 Manuel Lauss
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/dma-mapping.h>
  23 #include <linux/platform_device.h>
  24
  25 #include <asm/mach-au1x00/au1000.h>
  26 #include <asm/mach-db1x00/bcsr.h>
  27 #include "../platform.h"
  28
  29 struct pci_dev;
  30
  31 /* DB1xxx PCMCIA interrupt sources:
  32  * CD0/1        GPIO0/3
  33  * STSCHG0/1    GPIO1/4
  34  * CARD0/1      GPIO2/5
  35  * Db1550:      0/1, 21/22, 3/5
  36  */
  37
  38 #define DB1XXX_HAS_PCMCIA
  39 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  40
  41 #if defined(CONFIG_MIPS_DB1000)
  42 #define DB1XXX_PCMCIA_CD0       AU1000_GPIO0_INT
  43 #define DB1XXX_PCMCIA_STSCHG0   AU1000_GPIO1_INT
  44 #define DB1XXX_PCMCIA_CARD0     AU1000_GPIO2_INT
  45 #define DB1XXX_PCMCIA_CD1       AU1000_GPIO3_INT
  46 #define DB1XXX_PCMCIA_STSCHG1   AU1000_GPIO4_INT
  47 #define DB1XXX_PCMCIA_CARD1     AU1000_GPIO5_INT
  48 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  49 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  50 #elif defined(CONFIG_MIPS_DB1100)
  51 #define DB1XXX_PCMCIA_CD0       AU1100_GPIO0_INT
  52 #define DB1XXX_PCMCIA_STSCHG0   AU1100_GPIO1_INT
  53 #define DB1XXX_PCMCIA_CARD0     AU1100_GPIO2_INT
  54 #define DB1XXX_PCMCIA_CD1       AU1100_GPIO3_INT
  55 #define DB1XXX_PCMCIA_STSCHG1   AU1100_GPIO4_INT
  56 #define DB1XXX_PCMCIA_CARD1     AU1100_GPIO5_INT
  57 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  58 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  59 #elif defined(CONFIG_MIPS_DB1500)
  60 #define DB1XXX_PCMCIA_CD0       AU1500_GPIO0_INT
  61 #define DB1XXX_PCMCIA_STSCHG0   AU1500_GPIO1_INT
  62 #define DB1XXX_PCMCIA_CARD0     AU1500_GPIO2_INT
  63 #define DB1XXX_PCMCIA_CD1       AU1500_GPIO3_INT
  64 #define DB1XXX_PCMCIA_STSCHG1   AU1500_GPIO4_INT
  65 #define DB1XXX_PCMCIA_CARD1     AU1500_GPIO5_INT
  66 #define BOARD_FLASH_SIZE        0x02000000 /* 32MB */
  67 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  68 #elif defined(CONFIG_MIPS_DB1550)
  69 #define DB1XXX_PCMCIA_CD0       AU1550_GPIO0_INT
  70 #define DB1XXX_PCMCIA_STSCHG0   AU1550_GPIO21_INT
  71 #define DB1XXX_PCMCIA_CARD0     AU1550_GPIO3_INT
  72 #define DB1XXX_PCMCIA_CD1       AU1550_GPIO1_INT
  73 #define DB1XXX_PCMCIA_STSCHG1   AU1550_GPIO22_INT
  74 #define DB1XXX_PCMCIA_CARD1     AU1550_GPIO5_INT
  75 #define BOARD_FLASH_SIZE        0x08000000 /* 128MB */
  76 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  77 #else
  78 /* other board: no PCMCIA */
  79 #undef DB1XXX_HAS_PCMCIA
  80 #undef F_SWAPPED
  81 #define F_SWAPPED 0
  82 #if defined(CONFIG_MIPS_BOSPORUS)
  83 #define BOARD_FLASH_SIZE        0x01000000 /* 16MB */
  84 #define BOARD_FLASH_WIDTH       2 /* 16-bits */
  85 #elif defined(CONFIG_MIPS_MIRAGE)
  86 #define BOARD_FLASH_SIZE        0x04000000 /* 64MB */
  87 #define BOARD_FLASH_WIDTH       4 /* 32-bits */
  88 #endif
  89 #endif
  90
  91 #ifdef CONFIG_PCI
  92 #ifdef CONFIG_MIPS_DB1500
  93 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
  94 {
  95         if ((slot < 12) || (slot > 13) || pin == 0)
  96                 return -1;
  97         if (slot == 12)
  98                 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
  99         if (slot == 13) {
 100                 switch (pin) {
 101                 case 1: return AU1500_PCI_INTA;
 102                 case 2: return AU1500_PCI_INTB;
 103                 case 3: return AU1500_PCI_INTC;
 104                 case 4: return AU1500_PCI_INTD;
 105                 }
 106         }
 107         return -1;
 108 }
 109 #endif
 110
 111 #ifdef CONFIG_MIPS_DB1550
 112 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
 113 {
 114         if ((slot < 11) || (slot > 13) || pin == 0)
 115                 return -1;
 116         if (slot == 11)
 117                 return (pin == 1) ? AU1550_PCI_INTC : 0xff;
 118         if (slot == 12) {
 119                 switch (pin) {
 120                 case 1: return AU1550_PCI_INTB;
 121                 case 2: return AU1550_PCI_INTC;
 122                 case 3: return AU1550_PCI_INTD;
 123                 case 4: return AU1550_PCI_INTA;
 124                 }
 125         }
 126         if (slot == 13) {
 127                 switch (pin) {
 128                 case 1: return AU1550_PCI_INTA;
 129                 case 2: return AU1550_PCI_INTB;
 130                 case 3: return AU1550_PCI_INTC;
 131                 case 4: return AU1550_PCI_INTD;
 132                 }
 133         }
 134         return -1;
 135 }
 136 #endif
 137
 138 #ifdef CONFIG_MIPS_BOSPORUS
 139 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
 140 {
 141         if ((slot < 11) || (slot > 13) || pin == 0)
 142                 return -1;
 143         if (slot == 12)
 144                 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
 145         if (slot == 11) {
 146                 switch (pin) {
 147                 case 1: return AU1500_PCI_INTA;
 148                 case 2: return AU1500_PCI_INTB;
 149                 default: return 0xff;
 150                 }
 151         }
 152         if (slot == 13) {
 153                 switch (pin) {
 154                 case 1: return AU1500_PCI_INTA;
 155                 case 2: return AU1500_PCI_INTB;
 156                 case 3: return AU1500_PCI_INTC;
 157                 case 4: return AU1500_PCI_INTD;
 158                 }
 159         }
 160         return -1;
 161 }
 162 #endif
 163
 164 #ifdef CONFIG_MIPS_MIRAGE
 165 static int db1xxx_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
 166 {
 167         if ((slot < 11) || (slot > 13) || pin == 0)
 168                 return -1;
 169         if (slot == 11)
 170                 return (pin == 1) ? AU1500_PCI_INTD : 0xff;
 171         if (slot == 12)
 172                 return (pin == 3) ? AU1500_PCI_INTC : 0xff;
 173         if (slot == 13) {
 174                 switch (pin) {
 175                 case 1: return AU1500_PCI_INTA;
 176                 case 2: return AU1500_PCI_INTB;
 177                 default: return 0xff;
 178                 }
 179         }
 180         return -1;
 181 }
 182 #endif
 183
 184 static struct resource alchemy_pci_host_res[] = {
 185         [0] = {
 186                 .start  = AU1500_PCI_PHYS_ADDR,
 187                 .end    = AU1500_PCI_PHYS_ADDR + 0xfff,
 188                 .flags  = IORESOURCE_MEM,
 189         },
 190 };
 191
 192 static struct alchemy_pci_platdata db1xxx_pci_pd = {
 193         .board_map_irq  = db1xxx_map_pci_irq,
 194 };
 195
 196 static struct platform_device db1xxx_pci_host_dev = {
 197         .dev.platform_data = &db1xxx_pci_pd,
 198         .name           = "alchemy-pci",
 199         .id             = 0,
 200         .num_resources  = ARRAY_SIZE(alchemy_pci_host_res),
 201         .resource       = alchemy_pci_host_res,
 202 };
 203
 204 static int __init db15x0_pci_init(void)
 205 {
 206         return platform_device_register(&db1xxx_pci_host_dev);
 207 }
 208 /* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
 209 arch_initcall(db15x0_pci_init);
 210 #endif
 211
 212 #ifdef CONFIG_MIPS_DB1100
 213 static struct resource au1100_lcd_resources[] = {
 214         [0] = {
 215                 .start  = AU1100_LCD_PHYS_ADDR,
 216                 .end    = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
 217                 .flags  = IORESOURCE_MEM,
 218         },
 219         [1] = {
 220                 .start  = AU1100_LCD_INT,
 221                 .end    = AU1100_LCD_INT,
 222                 .flags  = IORESOURCE_IRQ,
 223         }
 224 };
 225
 226 static u64 au1100_lcd_dmamask = DMA_BIT_MASK(32);
 227
 228 static struct platform_device au1100_lcd_device = {
 229         .name           = "au1100-lcd",
 230         .id             = 0,
 231         .dev = {
 232                 .dma_mask               = &au1100_lcd_dmamask,
 233                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 234         },
 235         .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
 236         .resource       = au1100_lcd_resources,
 237 };
 238 #endif
 239
 240 static int __init db1xxx_dev_init(void)
 241 {
 242 #ifdef DB1XXX_HAS_PCMCIA
 243         db1x_register_pcmcia_socket(
 244                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
 245                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 246                 AU1000_PCMCIA_MEM_PHYS_ADDR,
 247                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 248                 AU1000_PCMCIA_IO_PHYS_ADDR,
 249                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 250                 DB1XXX_PCMCIA_CARD0, DB1XXX_PCMCIA_CD0,
 251                 /*DB1XXX_PCMCIA_STSCHG0*/0, 0, 0);
 252
 253         db1x_register_pcmcia_socket(
 254                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 255                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 256                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 257                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 258                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 259                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 260                 DB1XXX_PCMCIA_CARD1, DB1XXX_PCMCIA_CD1,
 261                 /*DB1XXX_PCMCIA_STSCHG1*/0, 0, 1);
 262 #endif
 263 #ifdef CONFIG_MIPS_DB1100
 264         platform_device_register(&au1100_lcd_device);
 265 #endif
 266         db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED);
 267         return 0;
 268 }
 269 device_initcall(db1xxx_dev_init);