4 compatible = "brcm,bcm7125";
10 mips-hpt-frequency = <202500000>;
13 compatible = "brcm,bmips4380";
19 compatible = "brcm,bmips4380";
29 cpu_intc: interrupt-controller {
31 compatible = "mti,cpu-interrupt-controller";
34 #interrupt-cells = <1>;
39 compatible = "fixed-clock";
41 clock-frequency = <81000000>;
45 compatible = "fixed-clock";
47 clock-frequency = <27000000>;
55 compatible = "simple-bus";
56 ranges = <0 0x10000000 0x01000000>;
58 periph_intc: interrupt-controller@441400 {
59 compatible = "brcm,bcm7038-l1-intc";
60 reg = <0x441400 0x30>, <0x441600 0x30>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpu_intc>;
66 interrupts = <2>, <3>;
69 sun_l2_intc: interrupt-controller@401800 {
70 compatible = "brcm,l2-intc";
71 reg = <0x401800 0x30>;
73 #interrupt-cells = <1>;
74 interrupt-parent = <&periph_intc>;
79 compatible = "brcm,bcm7400-gisb-arb";
80 reg = <0x400000 0xdc>;
82 interrupt-parent = <&sun_l2_intc>;
83 interrupts = <0>, <2>;
84 brcm,gisb-arb-master-mask = <0x2f7>;
85 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
86 "bsp_0", "rdc_0", "rptd_0",
90 upg_irq0_intc: interrupt-controller@406780 {
91 compatible = "brcm,bcm7120-l2-intc";
94 brcm,int-map-mask = <0x44>, <0xf000000>, <0x100000>;
95 brcm,int-fwd-mask = <0x70000>;
98 #interrupt-cells = <1>;
100 interrupt-parent = <&periph_intc>;
101 interrupts = <18>, <19>, <20>;
102 interrupt-names = "upg_main", "upg_bsc", "upg_spi";
105 sun_top_ctrl: syscon@404000 {
106 compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
107 reg = <0x404000 0x60c>;
112 compatible = "brcm,bcm7038-reboot";
113 syscon = <&sun_top_ctrl 0x8 0x14>;
116 uart0: serial@406b00 {
117 compatible = "ns16550a";
118 reg = <0x406b00 0x20>;
119 reg-io-width = <0x4>;
122 interrupt-parent = <&periph_intc>;
124 clocks = <&uart_clk>;
128 uart1: serial@406b40 {
129 compatible = "ns16550a";
130 reg = <0x406b40 0x20>;
131 reg-io-width = <0x4>;
134 interrupt-parent = <&periph_intc>;
136 clocks = <&uart_clk>;
140 uart2: serial@406b80 {
141 compatible = "ns16550a";
142 reg = <0x406b80 0x20>;
143 reg-io-width = <0x4>;
146 interrupt-parent = <&periph_intc>;
148 clocks = <&uart_clk>;
153 clock-frequency = <390000>;
154 compatible = "brcm,brcmstb-i2c";
155 interrupt-parent = <&upg_irq0_intc>;
156 reg = <0x406200 0x58>;
158 interrupt-names = "upg_bsca";
163 clock-frequency = <390000>;
164 compatible = "brcm,brcmstb-i2c";
165 interrupt-parent = <&upg_irq0_intc>;
166 reg = <0x406280 0x58>;
168 interrupt-names = "upg_bscb";
173 clock-frequency = <390000>;
174 compatible = "brcm,brcmstb-i2c";
175 interrupt-parent = <&upg_irq0_intc>;
176 reg = <0x406300 0x58>;
178 interrupt-names = "upg_bscc";
183 clock-frequency = <390000>;
184 compatible = "brcm,brcmstb-i2c";
185 interrupt-parent = <&upg_irq0_intc>;
186 reg = <0x406380 0x58>;
188 interrupt-names = "upg_bscd";
193 compatible = "brcm,bcm7038-pwm";
194 reg = <0x406580 0x28>;
200 upg_gio: gpio@406700 {
201 compatible = "brcm,brcmstb-gpio";
202 reg = <0x406700 0x80>;
204 #interrupt-cells = <2>;
206 interrupt-controller;
207 interrupt-parent = <&upg_irq0_intc>;
209 brcm,gpio-bank-widths = <32 32 32 18>;
213 compatible = "brcm,bcm7125-ehci", "generic-ehci";
214 reg = <0x488300 0x100>;
216 interrupt-parent = <&periph_intc>;
222 compatible = "brcm,bcm7125-ohci", "generic-ohci";
223 reg = <0x488400 0x100>;
225 interrupt-parent = <&periph_intc>;
230 spi_l2_intc: interrupt-controller@411d00 {
231 compatible = "brcm,l2-intc";
232 reg = <0x411d00 0x30>;
233 interrupt-controller;
234 #interrupt-cells = <1>;
235 interrupt-parent = <&periph_intc>;
240 #address-cells = <0x1>;
242 compatible = "brcm,spi-bcm-qspi",
243 "brcm,spi-brcmstb-qspi";
245 reg = <0x440920 0x4 0x443200 0x188 0x443000 0x50>;
246 reg-names = "cs_reg", "hif_mspi", "bspi";
247 interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6>;
248 interrupt-parent = <&spi_l2_intc>;
249 interrupt-names = "spi_lr_fullness_reached",
250 "spi_lr_session_aborted",
252 "spi_lr_session_done",
260 #address-cells = <1>;
262 compatible = "brcm,spi-bcm-qspi",
263 "brcm,spi-brcmstb-mspi";
265 reg = <0x406400 0x180>;
268 interrupt-parent = <&upg_irq0_intc>;
269 interrupt-names = "mspi_done";