4 compatible = "brcm,bcm7420";
10 mips-hpt-frequency = <93750000>;
13 compatible = "brcm,bmips5000";
19 compatible = "brcm,bmips5000";
29 cpu_intc: interrupt-controller {
31 compatible = "mti,cpu-interrupt-controller";
34 #interrupt-cells = <1>;
39 compatible = "fixed-clock";
41 clock-frequency = <81000000>;
45 compatible = "fixed-clock";
47 clock-frequency = <27000000>;
55 compatible = "simple-bus";
56 ranges = <0 0x10000000 0x01000000>;
58 periph_intc: interrupt-controller@441400 {
59 compatible = "brcm,bcm7038-l1-intc";
60 reg = <0x441400 0x30>, <0x441600 0x30>;
63 #interrupt-cells = <1>;
65 interrupt-parent = <&cpu_intc>;
66 interrupts = <2>, <3>;
69 sun_l2_intc: interrupt-controller@401800 {
70 compatible = "brcm,l2-intc";
71 reg = <0x401800 0x30>;
73 #interrupt-cells = <1>;
74 interrupt-parent = <&periph_intc>;
79 compatible = "brcm,bcm7400-gisb-arb";
80 reg = <0x400000 0xdc>;
82 interrupt-parent = <&sun_l2_intc>;
83 interrupts = <0>, <2>;
84 brcm,gisb-arb-master-mask = <0x3ff>;
85 brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "pci_0",
86 "pcie_0", "bsp_0", "rdc_0",
87 "rptd_0", "avd_0", "avd_1",
91 upg_irq0_intc: interrupt-controller@406780 {
92 compatible = "brcm,bcm7120-l2-intc";
95 brcm,int-map-mask = <0x44>, <0x1f000000>;
96 brcm,int-fwd-mask = <0x70000>;
99 #interrupt-cells = <1>;
101 interrupt-parent = <&periph_intc>;
102 interrupts = <18>, <19>;
103 interrupt-names = "upg_main", "upg_bsc";
106 sun_top_ctrl: syscon@404000 {
107 compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
108 reg = <0x404000 0x60c>;
113 compatible = "brcm,bcm7038-reboot";
114 syscon = <&sun_top_ctrl 0x8 0x14>;
117 uart0: serial@406b00 {
118 compatible = "ns16550a";
119 reg = <0x406b00 0x20>;
120 reg-io-width = <0x4>;
122 interrupt-parent = <&periph_intc>;
124 clocks = <&uart_clk>;
128 uart1: serial@406b40 {
129 compatible = "ns16550a";
130 reg = <0x406b40 0x20>;
131 reg-io-width = <0x4>;
133 interrupt-parent = <&periph_intc>;
135 clocks = <&uart_clk>;
139 uart2: serial@406b80 {
140 compatible = "ns16550a";
141 reg = <0x406b80 0x20>;
142 reg-io-width = <0x4>;
144 interrupt-parent = <&periph_intc>;
146 clocks = <&uart_clk>;
151 clock-frequency = <390000>;
152 compatible = "brcm,brcmstb-i2c";
153 interrupt-parent = <&upg_irq0_intc>;
154 reg = <0x406200 0x58>;
156 interrupt-names = "upg_bsca";
161 clock-frequency = <390000>;
162 compatible = "brcm,brcmstb-i2c";
163 interrupt-parent = <&upg_irq0_intc>;
164 reg = <0x406280 0x58>;
166 interrupt-names = "upg_bscb";
171 clock-frequency = <390000>;
172 compatible = "brcm,brcmstb-i2c";
173 interrupt-parent = <&upg_irq0_intc>;
174 reg = <0x406300 0x58>;
176 interrupt-names = "upg_bscc";
181 clock-frequency = <390000>;
182 compatible = "brcm,brcmstb-i2c";
183 interrupt-parent = <&upg_irq0_intc>;
184 reg = <0x406380 0x58>;
186 interrupt-names = "upg_bscd";
191 clock-frequency = <390000>;
192 compatible = "brcm,brcmstb-i2c";
193 interrupt-parent = <&upg_irq0_intc>;
194 reg = <0x406800 0x58>;
196 interrupt-names = "upg_bsce";
201 compatible = "brcm,bcm7038-pwm";
202 reg = <0x406580 0x28>;
209 compatible = "brcm,bcm7038-pwm";
210 reg = <0x406880 0x28>;
216 upg_gio: gpio@406700 {
217 compatible = "brcm,brcmstb-gpio";
218 reg = <0x406700 0x80>;
220 #interrupt-cells = <2>;
222 interrupt-controller;
223 interrupt-parent = <&upg_irq0_intc>;
225 brcm,gpio-bank-widths = <32 32 32 27>;
228 enet0: ethernet@468000 {
229 phy-mode = "internal";
230 phy-handle = <&phy1>;
231 mac-address = [ 00 10 18 36 23 1a ];
232 compatible = "brcm,genet-v1";
233 #address-cells = <0x1>;
235 reg = <0x468000 0x3c8c>;
236 interrupts = <69>, <79>;
237 interrupt-parent = <&periph_intc>;
241 compatible = "brcm,genet-mdio-v1";
242 #address-cells = <0x1>;
246 phy1: ethernet-phy@1 {
249 compatible = "brcm,65nm-ephy",
250 "ethernet-phy-ieee802.3-c22";
256 compatible = "brcm,bcm7420-ehci", "generic-ehci";
257 reg = <0x488300 0x100>;
258 interrupt-parent = <&periph_intc>;
264 compatible = "brcm,bcm7420-ohci", "generic-ohci";
265 reg = <0x488400 0x100>;
268 interrupt-parent = <&periph_intc>;
274 compatible = "brcm,bcm7420-ehci", "generic-ehci";
275 reg = <0x488500 0x100>;
276 interrupt-parent = <&periph_intc>;
282 compatible = "brcm,bcm7420-ohci", "generic-ohci";
283 reg = <0x488600 0x100>;
286 interrupt-parent = <&periph_intc>;