arch/mips/boot/dts/ingenic/jz4770.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 #include <dt-bindings/clock/jz4770-cgu.h>
   4 #include <dt-bindings/clock/ingenic,tcu.h>
   5
   6 / {
   7         #address-cells = <1>;
   8         #size-cells = <1>;
   9         compatible = "ingenic,jz4770";
  10
  11         cpuintc: interrupt-controller {
  12                 #address-cells = <0>;
  13                 #interrupt-cells = <1>;
  14                 interrupt-controller;
  15                 compatible = "mti,cpu-interrupt-controller";
  16         };
  17
  18         intc: interrupt-controller@10001000 {
  19                 compatible = "ingenic,jz4770-intc";
  20                 reg = <0x10001000 0x40>;
  21
  22                 interrupt-controller;
  23                 #interrupt-cells = <1>;
  24
  25                 interrupt-parent = <&cpuintc>;
  26                 interrupts = <2>;
  27         };
  28
  29         ext: ext {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32         };
  33
  34         osc32k: osc32k {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <32768>;
  38         };
  39
  40         cgu: jz4770-cgu@10000000 {
  41                 compatible = "ingenic,jz4770-cgu";
  42                 reg = <0x10000000 0x100>;
  43
  44                 clocks = <&ext>, <&osc32k>;
  45                 clock-names = "ext", "osc32k";
  46
  47                 #clock-cells = <1>;
  48         };
  49
  50         tcu: timer@10002000 {
  51                 compatible = "ingenic,jz4770-tcu", "simple-mfd";
  52                 reg = <0x10002000 0x1000>;
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 ranges = <0x0 0x10002000 0x1000>;
  56
  57                 #clock-cells = <1>;
  58
  59                 clocks = <&cgu JZ4770_CLK_RTC>,
  60                          <&cgu JZ4770_CLK_EXT>,
  61                          <&cgu JZ4770_CLK_PCLK>;
  62                 clock-names = "rtc", "ext", "pclk";
  63
  64                 interrupt-controller;
  65                 #interrupt-cells = <1>;
  66
  67                 interrupt-parent = <&intc>;
  68                 interrupts = <27 26 25>;
  69
  70                 watchdog: watchdog@0 {
  71                         compatible = "ingenic,jz4770-watchdog",
  72                                      "ingenic,jz4740-watchdog";
  73                         reg = <0x0 0xc>;
  74
  75                         clocks = <&tcu TCU_CLK_WDT>;
  76                         clock-names = "wdt";
  77                 };
  78
  79                 pwm: pwm@40 {
  80                         compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
  81                         reg = <0x40 0x80>;
  82
  83                         #pwm-cells = <3>;
  84
  85                         clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
  86                                  <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
  87                                  <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
  88                                  <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
  89                         clock-names = "timer0", "timer1", "timer2", "timer3",
  90                                       "timer4", "timer5", "timer6", "timer7";
  91                 };
  92
  93                 ost: timer@e0 {
  94                         compatible = "ingenic,jz4770-ost";
  95                         reg = <0xe0 0x20>;
  96
  97                         clocks = <&tcu TCU_CLK_OST>;
  98                         clock-names = "ost";
  99
 100                         interrupts = <15>;
 101                 };
 102         };
 103
 104         pinctrl: pin-controller@10010000 {
 105                 compatible = "ingenic,jz4770-pinctrl";
 106                 reg = <0x10010000 0x600>;
 107
 108                 #address-cells = <1>;
 109                 #size-cells = <0>;
 110
 111                 gpa: gpio@0 {
 112                         compatible = "ingenic,jz4770-gpio";
 113                         reg = <0>;
 114
 115                         gpio-controller;
 116                         gpio-ranges = <&pinctrl 0 0 32>;
 117                         #gpio-cells = <2>;
 118
 119                         interrupt-controller;
 120                         #interrupt-cells = <2>;
 121
 122                         interrupt-parent = <&intc>;
 123                         interrupts = <17>;
 124                 };
 125
 126                 gpb: gpio@1 {
 127                         compatible = "ingenic,jz4770-gpio";
 128                         reg = <1>;
 129
 130                         gpio-controller;
 131                         gpio-ranges = <&pinctrl 0 32 32>;
 132                         #gpio-cells = <2>;
 133
 134                         interrupt-controller;
 135                         #interrupt-cells = <2>;
 136
 137                         interrupt-parent = <&intc>;
 138                         interrupts = <16>;
 139                 };
 140
 141                 gpc: gpio@2 {
 142                         compatible = "ingenic,jz4770-gpio";
 143                         reg = <2>;
 144
 145                         gpio-controller;
 146                         gpio-ranges = <&pinctrl 0 64 32>;
 147                         #gpio-cells = <2>;
 148
 149                         interrupt-controller;
 150                         #interrupt-cells = <2>;
 151
 152                         interrupt-parent = <&intc>;
 153                         interrupts = <15>;
 154                 };
 155
 156                 gpd: gpio@3 {
 157                         compatible = "ingenic,jz4770-gpio";
 158                         reg = <3>;
 159
 160                         gpio-controller;
 161                         gpio-ranges = <&pinctrl 0 96 32>;
 162                         #gpio-cells = <2>;
 163
 164                         interrupt-controller;
 165                         #interrupt-cells = <2>;
 166
 167                         interrupt-parent = <&intc>;
 168                         interrupts = <14>;
 169                 };
 170
 171                 gpe: gpio@4 {
 172                         compatible = "ingenic,jz4770-gpio";
 173                         reg = <4>;
 174
 175                         gpio-controller;
 176                         gpio-ranges = <&pinctrl 0 128 32>;
 177                         #gpio-cells = <2>;
 178
 179                         interrupt-controller;
 180                         #interrupt-cells = <2>;
 181
 182                         interrupt-parent = <&intc>;
 183                         interrupts = <13>;
 184                 };
 185
 186                 gpf: gpio@5 {
 187                         compatible = "ingenic,jz4770-gpio";
 188                         reg = <5>;
 189
 190                         gpio-controller;
 191                         gpio-ranges = <&pinctrl 0 160 32>;
 192                         #gpio-cells = <2>;
 193
 194                         interrupt-controller;
 195                         #interrupt-cells = <2>;
 196
 197                         interrupt-parent = <&intc>;
 198                         interrupts = <12>;
 199                 };
 200         };
 201
 202         uart0: serial@10030000 {
 203                 compatible = "ingenic,jz4770-uart";
 204                 reg = <0x10030000 0x100>;
 205
 206                 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
 207                 clock-names = "baud", "module";
 208
 209                 interrupt-parent = <&intc>;
 210                 interrupts = <5>;
 211
 212                 status = "disabled";
 213         };
 214
 215         uart1: serial@10031000 {
 216                 compatible = "ingenic,jz4770-uart";
 217                 reg = <0x10031000 0x100>;
 218
 219                 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
 220                 clock-names = "baud", "module";
 221
 222                 interrupt-parent = <&intc>;
 223                 interrupts = <4>;
 224
 225                 status = "disabled";
 226         };
 227
 228         uart2: serial@10032000 {
 229                 compatible = "ingenic,jz4770-uart";
 230                 reg = <0x10032000 0x100>;
 231
 232                 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
 233                 clock-names = "baud", "module";
 234
 235                 interrupt-parent = <&intc>;
 236                 interrupts = <3>;
 237
 238                 status = "disabled";
 239         };
 240
 241         uart3: serial@10033000 {
 242                 compatible = "ingenic,jz4770-uart";
 243                 reg = <0x10033000 0x100>;
 244
 245                 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
 246                 clock-names = "baud", "module";
 247
 248                 interrupt-parent = <&intc>;
 249                 interrupts = <2>;
 250
 251                 status = "disabled";
 252         };
 253
 254         dmac0: dma-controller@13420000 {
 255                 compatible = "ingenic,jz4770-dma";
 256                 reg = <0x13420000 0xC0>, <0x13420300 0x20>;
 257
 258                 #dma-cells = <2>;
 259
 260                 clocks = <&cgu JZ4770_CLK_DMA>;
 261                 interrupt-parent = <&intc>;
 262                 interrupts = <24>;
 263
 264                 /* Disable dmac0 until we have something that uses it */
 265                 status = "disabled";
 266         };
 267
 268         dmac1: dma-controller@13420100 {
 269                 compatible = "ingenic,jz4770-dma";
 270                 reg = <0x13420100 0xC0>, <0x13420400 0x20>;
 271
 272                 #dma-cells = <2>;
 273
 274                 clocks = <&cgu JZ4770_CLK_DMA>;
 275                 interrupt-parent = <&intc>;
 276                 interrupts = <23>;
 277
 278                 /* Disable dmac1 until we have something that uses it */
 279                 status = "disabled";
 280         };
 281
 282         uhc: uhc@13430000 {
 283                 compatible = "generic-ohci";
 284                 reg = <0x13430000 0x1000>;
 285
 286                 clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
 287                 assigned-clocks = <&cgu JZ4770_CLK_UHC>;
 288                 assigned-clock-rates = <48000000>;
 289
 290                 interrupt-parent = <&intc>;
 291                 interrupts = <20>;
 292
 293                 status = "disabled";
 294         };
 295 };