1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/dma/jz4780-dma.h>
8 compatible = "ingenic,jz4780";
10 cpuintc: interrupt-controller {
12 #interrupt-cells = <1>;
14 compatible = "mti,cpu-interrupt-controller";
17 intc: interrupt-controller@10001000 {
18 compatible = "ingenic,jz4780-intc";
19 reg = <0x10001000 0x50>;
22 #interrupt-cells = <1>;
24 interrupt-parent = <&cpuintc>;
29 compatible = "fixed-clock";
34 compatible = "fixed-clock";
36 clock-frequency = <32768>;
39 cgu: jz4780-cgu@10000000 {
40 compatible = "ingenic,jz4780-cgu";
41 reg = <0x10000000 0x100>;
43 clocks = <&ext>, <&rtc>;
44 clock-names = "ext", "rtc";
50 compatible = "ingenic,jz4780-tcu",
53 reg = <0x10002000 0x1000>;
56 ranges = <0x0 0x10002000 0x1000>;
60 clocks = <&cgu JZ4780_CLK_RTCLK
62 &cgu JZ4780_CLK_PCLK>;
63 clock-names = "rtc", "ext", "pclk";
66 #interrupt-cells = <1>;
68 interrupt-parent = <&intc>;
69 interrupts = <27 26 25>;
72 rtc_dev: rtc@10003000 {
73 compatible = "ingenic,jz4780-rtc";
74 reg = <0x10003000 0x4c>;
76 interrupt-parent = <&intc>;
79 clocks = <&cgu JZ4780_CLK_RTCLK>;
83 pinctrl: pin-controller@10010000 {
84 compatible = "ingenic,jz4780-pinctrl";
85 reg = <0x10010000 0x600>;
91 compatible = "ingenic,jz4780-gpio";
95 gpio-ranges = <&pinctrl 0 0 32>;
99 #interrupt-cells = <2>;
101 interrupt-parent = <&intc>;
106 compatible = "ingenic,jz4780-gpio";
110 gpio-ranges = <&pinctrl 0 32 32>;
113 interrupt-controller;
114 #interrupt-cells = <2>;
116 interrupt-parent = <&intc>;
121 compatible = "ingenic,jz4780-gpio";
125 gpio-ranges = <&pinctrl 0 64 32>;
128 interrupt-controller;
129 #interrupt-cells = <2>;
131 interrupt-parent = <&intc>;
136 compatible = "ingenic,jz4780-gpio";
140 gpio-ranges = <&pinctrl 0 96 32>;
143 interrupt-controller;
144 #interrupt-cells = <2>;
146 interrupt-parent = <&intc>;
151 compatible = "ingenic,jz4780-gpio";
155 gpio-ranges = <&pinctrl 0 128 32>;
158 interrupt-controller;
159 #interrupt-cells = <2>;
161 interrupt-parent = <&intc>;
166 compatible = "ingenic,jz4780-gpio";
170 gpio-ranges = <&pinctrl 0 160 32>;
173 interrupt-controller;
174 #interrupt-cells = <2>;
176 interrupt-parent = <&intc>;
182 compatible = "spi-gpio";
183 #address-cells = <1>;
185 num-chipselects = <2>;
187 gpio-miso = <&gpe 14 0>;
188 gpio-sck = <&gpe 15 0>;
189 gpio-mosi = <&gpe 17 0>;
190 cs-gpios = <&gpe 16 0
194 compatible = "spidev";
196 spi-max-frequency = <1000000>;
200 uart0: serial@10030000 {
201 compatible = "ingenic,jz4780-uart";
202 reg = <0x10030000 0x100>;
204 interrupt-parent = <&intc>;
207 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
208 clock-names = "baud", "module";
213 uart1: serial@10031000 {
214 compatible = "ingenic,jz4780-uart";
215 reg = <0x10031000 0x100>;
217 interrupt-parent = <&intc>;
220 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
221 clock-names = "baud", "module";
226 uart2: serial@10032000 {
227 compatible = "ingenic,jz4780-uart";
228 reg = <0x10032000 0x100>;
230 interrupt-parent = <&intc>;
233 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
234 clock-names = "baud", "module";
239 uart3: serial@10033000 {
240 compatible = "ingenic,jz4780-uart";
241 reg = <0x10033000 0x100>;
243 interrupt-parent = <&intc>;
246 clocks = <&ext>, <&cgu JZ4780_CLK_UART3>;
247 clock-names = "baud", "module";
252 uart4: serial@10034000 {
253 compatible = "ingenic,jz4780-uart";
254 reg = <0x10034000 0x100>;
256 interrupt-parent = <&intc>;
259 clocks = <&ext>, <&cgu JZ4780_CLK_UART4>;
260 clock-names = "baud", "module";
266 compatible = "ingenic,jz4780-i2c";
267 #address-cells = <1>;
270 reg = <0x10050000 0x1000>;
272 interrupt-parent = <&intc>;
275 clocks = <&cgu JZ4780_CLK_SMB0>;
276 clock-frequency = <100000>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&pins_i2c0_data>;
284 compatible = "ingenic,jz4780-i2c";
285 #address-cells = <1>;
287 reg = <0x10051000 0x1000>;
289 interrupt-parent = <&intc>;
292 clocks = <&cgu JZ4780_CLK_SMB1>;
293 clock-frequency = <100000>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&pins_i2c1_data>;
301 compatible = "ingenic,jz4780-i2c";
302 #address-cells = <1>;
304 reg = <0x10052000 0x1000>;
306 interrupt-parent = <&intc>;
309 clocks = <&cgu JZ4780_CLK_SMB2>;
310 clock-frequency = <100000>;
311 pinctrl-names = "default";
312 pinctrl-0 = <&pins_i2c2_data>;
318 compatible = "ingenic,jz4780-i2c";
319 #address-cells = <1>;
321 reg = <0x10053000 0x1000>;
323 interrupt-parent = <&intc>;
326 clocks = <&cgu JZ4780_CLK_SMB3>;
327 clock-frequency = <100000>;
328 pinctrl-names = "default";
329 pinctrl-0 = <&pins_i2c3_data>;
335 compatible = "ingenic,jz4780-i2c";
336 #address-cells = <1>;
338 reg = <0x10054000 0x1000>;
340 interrupt-parent = <&intc>;
343 clocks = <&cgu JZ4780_CLK_SMB4>;
344 clock-frequency = <100000>;
345 pinctrl-names = "default";
346 pinctrl-0 = <&pins_i2c4_data>;
351 watchdog: watchdog@10002000 {
352 compatible = "ingenic,jz4780-watchdog";
353 reg = <0x10002000 0x10>;
355 clocks = <&cgu JZ4780_CLK_RTCLK>;
359 nemc: nemc@13410000 {
360 compatible = "ingenic,jz4780-nemc";
361 reg = <0x13410000 0x10000>;
362 #address-cells = <2>;
364 ranges = <1 0 0x1b000000 0x1000000
365 2 0 0x1a000000 0x1000000
366 3 0 0x19000000 0x1000000
367 4 0 0x18000000 0x1000000
368 5 0 0x17000000 0x1000000
369 6 0 0x16000000 0x1000000>;
371 clocks = <&cgu JZ4780_CLK_NEMC>;
377 compatible = "ingenic,jz4780-dma";
378 reg = <0x13420000 0x400
382 interrupt-parent = <&intc>;
385 clocks = <&cgu JZ4780_CLK_PDMA>;
389 compatible = "ingenic,jz4780-mmc";
390 reg = <0x13450000 0x1000>;
392 interrupt-parent = <&intc>;
395 clocks = <&cgu JZ4780_CLK_MSC0>;
401 dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>,
402 <&dma JZ4780_DMA_MSC0_TX 0xffffffff>;
403 dma-names = "rx", "tx";
409 compatible = "ingenic,jz4780-mmc";
410 reg = <0x13460000 0x1000>;
412 interrupt-parent = <&intc>;
415 clocks = <&cgu JZ4780_CLK_MSC1>;
421 dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>,
422 <&dma JZ4780_DMA_MSC1_TX 0xffffffff>;
423 dma-names = "rx", "tx";
429 compatible = "ingenic,jz4780-bch";
430 reg = <0x134d0000 0x10000>;
432 clocks = <&cgu JZ4780_CLK_BCH>;