arch/mips/cobalt/setup.c

   1 /*
   2  * Setup pointers to hardware dependent routines.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
   9  * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  10  *
  11  */
  12 #include <linux/interrupt.h>
  13 #include <linux/pci.h>
  14 #include <linux/init.h>
  15 #include <linux/pm.h>
  16 #include <linux/serial.h>
  17 #include <linux/serial_core.h>
  18
  19 #include <asm/bootinfo.h>
  20 #include <asm/time.h>
  21 #include <asm/io.h>
  22 #include <asm/irq.h>
  23 #include <asm/processor.h>
  24 #include <asm/reboot.h>
  25 #include <asm/gt64120.h>
  26 #include <asm/serial.h>
  27
  28 #include <asm/mach-cobalt/cobalt.h>
  29
  30 extern void cobalt_machine_restart(char *command);
  31 extern void cobalt_machine_halt(void);
  32 extern void cobalt_machine_power_off(void);
  33 extern void cobalt_early_console(void);
  34
  35 int cobalt_board_id;
  36
  37 const char *get_system_type(void)
  38 {
  39         switch (cobalt_board_id) {
  40                 case COBALT_BRD_ID_QUBE1:
  41                         return "Cobalt Qube";
  42                 case COBALT_BRD_ID_RAQ1:
  43                         return "Cobalt RaQ";
  44                 case COBALT_BRD_ID_QUBE2:
  45                         return "Cobalt Qube2";
  46                 case COBALT_BRD_ID_RAQ2:
  47                         return "Cobalt RaQ2";
  48         }
  49         return "MIPS Cobalt";
  50 }
  51
  52 void __init plat_timer_setup(struct irqaction *irq)
  53 {
  54         /* Load timer value for 1KHz (TCLK is 50MHz) */
  55         GALILEO_OUTL(50*1000*1000 / 1000, GT_TC0_OFS);
  56
  57         /* Enable timer */
  58         GALILEO_OUTL(GALILEO_ENTC0 | GALILEO_SELTC0, GT_TC_CONTROL_OFS);
  59
  60         /* Register interrupt */
  61         setup_irq(COBALT_GALILEO_IRQ, irq);
  62
  63         /* Enable interrupt */
  64         GALILEO_OUTL(GALILEO_INTR_T0EXP | GALILEO_INL(GT_INTRMASK_OFS), GT_INTRMASK_OFS);
  65 }
  66
  67 extern struct pci_ops gt64111_pci_ops;
  68
  69 static struct resource cobalt_mem_resource = {
  70         .start  = GT64111_MEM_BASE,
  71         .end    = GT64111_MEM_END,
  72         .name   = "PCI memory",
  73         .flags  = IORESOURCE_MEM
  74 };
  75
  76 static struct resource cobalt_io_resource = {
  77         .start  = 0x1000,
  78         .end    = 0xffff,
  79         .name   = "PCI I/O",
  80         .flags  = IORESOURCE_IO
  81 };
  82
  83 static struct resource cobalt_io_resources[] = {
  84         {
  85                 .start  = 0x00,
  86                 .end    = 0x1f,
  87                 .name   = "dma1",
  88                 .flags  = IORESOURCE_BUSY
  89         }, {
  90                 .start  = 0x40,
  91                 .end    = 0x5f,
  92                 .name   = "timer",
  93                 .flags  = IORESOURCE_BUSY
  94         }, {
  95                 .start  = 0x60,
  96                 .end    = 0x6f,
  97                 .name   = "keyboard",
  98                 .flags  = IORESOURCE_BUSY
  99         }, {
 100                 .start  = 0x80,
 101                 .end    = 0x8f,
 102                 .name   = "dma page reg",
 103                 .flags  = IORESOURCE_BUSY
 104         }, {
 105                 .start  = 0xc0,
 106                 .end    = 0xdf,
 107                 .name   = "dma2",
 108                 .flags  = IORESOURCE_BUSY
 109         },
 110 };
 111
 112 #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
 113
 114 static struct pci_controller cobalt_pci_controller = {
 115         .pci_ops        = &gt64111_pci_ops,
 116         .mem_resource   = &cobalt_mem_resource,
 117         .mem_offset     = 0,
 118         .io_resource    = &cobalt_io_resource,
 119         .io_offset      = 0 - GT64111_IO_BASE
 120 };
 121
 122 void __init plat_mem_setup(void)
 123 {
 124         static struct uart_port uart;
 125         unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
 126         int i;
 127
 128         _machine_restart = cobalt_machine_restart;
 129         _machine_halt = cobalt_machine_halt;
 130         pm_power_off = cobalt_machine_power_off;
 131
 132         set_io_port_base(CKSEG1ADDR(GT64111_IO_BASE));
 133
 134         /* I/O port resource must include UART and LCD/buttons */
 135         ioport_resource.end = 0x0fffffff;
 136
 137         /* request I/O space for devices used on all i[345]86 PCs */
 138         for (i = 0; i < COBALT_IO_RESOURCES; i++)
 139                 request_resource(&ioport_resource, cobalt_io_resources + i);
 140
 141         /* Read the cobalt id register out of the PCI config space */
 142         PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
 143         cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
 144         cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
 145         cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
 146
 147         printk("Cobalt board ID: %d\n", cobalt_board_id);
 148
 149 #ifdef CONFIG_PCI
 150         register_pci_controller(&cobalt_pci_controller);
 151 #endif
 152
 153 #ifdef CONFIG_SERIAL_8250
 154         if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
 155
 156 #ifdef CONFIG_EARLY_PRINTK
 157                 cobalt_early_console();
 158 #endif
 159
 160                 uart.line       = 0;
 161                 uart.type       = PORT_UNKNOWN;
 162                 uart.uartclk    = 18432000;
 163                 uart.irq        = COBALT_SERIAL_IRQ;
 164                 uart.flags      = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
 165                 uart.iobase     = 0xc800000;
 166                 uart.iotype     = UPIO_PORT;
 167
 168                 early_serial_setup(&uart);
 169         }
 170 #endif
 171 }
 172
 173 /*
 174  * Prom init. We read our one and only communication with the firmware.
 175  * Grab the amount of installed memory.
 176  * Better boot loaders (CoLo) pass a command line too :-)
 177  */
 178
 179 void __init prom_init(void)
 180 {
 181         int narg, indx, posn, nchr;
 182         unsigned long memsz;
 183         char **argv;
 184
 185         mips_machgroup = MACH_GROUP_COBALT;
 186
 187         memsz = fw_arg0 & 0x7fff0000;
 188         narg = fw_arg0 & 0x0000ffff;
 189
 190         if (narg) {
 191                 arcs_cmdline[0] = '\0';
 192                 argv = (char **) fw_arg1;
 193                 posn = 0;
 194                 for (indx = 1; indx < narg; ++indx) {
 195                         nchr = strlen(argv[indx]);
 196                         if (posn + 1 + nchr + 1 > sizeof(arcs_cmdline))
 197                                 break;
 198                         if (posn)
 199                                 arcs_cmdline[posn++] = ' ';
 200                         strcpy(arcs_cmdline + posn, argv[indx]);
 201                         posn += nchr;
 202                 }
 203         }
 204
 205         add_memory_region(0x0, memsz, BOOT_MEM_RAM);
 206 }
 207
 208 unsigned long __init prom_free_prom_memory(void)
 209 {
 210         /* Nothing to do! */
 211         return 0;
 212 }