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1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
7 * Copyright (C) 1999 by Silicon Graphics, Inc.
8 * Copyright (C) 2001 MIPS Technologies, Inc.
9 * Copyright (C) 2002 Maciej W. Rozycki
10 *
11 * Some useful macros for MIPS assembler code
12 *
13 * Some of the routines below contain useless nops that will be optimized
14 * away by gas in -O mode. These nops are however required to fill delay
15 * slots in noreorder mode.
16 */
17 #ifndef __ASM_ASM_H
18 #define __ASM_ASM_H
19
20 #include <asm/sgidefs.h>
21 #include <asm/asm-eva.h>
22
23 /*
24 * LEAF - declare leaf routine
25 */
26 #define LEAF(symbol) \
27 .globl symbol; \
28 .align 2; \
29 .type symbol, @function; \
30 .ent symbol, 0; \
31 symbol: .frame sp, 0, ra; \
32 .cfi_startproc; \
33 .insn
34
35 /*
36 * NESTED - declare nested routine entry point
37 */
38 #define NESTED(symbol, framesize, rpc) \
39 .globl symbol; \
40 .align 2; \
41 .type symbol, @function; \
42 .ent symbol, 0; \
43 symbol: .frame sp, framesize, rpc; \
44 .cfi_startproc; \
45 .insn
46
47 /*
48 * END - mark end of function
49 */
50 #define END(function) \
51 .cfi_endproc; \
52 .end function; \
53 .size function, .-function
54
55 /*
56 * EXPORT - export definition of symbol
57 */
58 #define EXPORT(symbol) \
59 .globl symbol; \
60 symbol:
61
62 /*
63 * FEXPORT - export definition of a function symbol
64 */
65 #define FEXPORT(symbol) \
66 .globl symbol; \
67 .type symbol, @function; \
68 symbol: .insn
69
70 /*
71 * ABS - export absolute symbol
72 */
73 #define ABS(symbol,value) \
74 .globl symbol; \
75 symbol = value
76
77 #define PANIC(msg) \
78 .set push; \
79 .set reorder; \
80 PTR_LA a0, 8f; \
81 jal panic; \
82 9: b 9b; \
83 .set pop; \
84 TEXT(msg)
85
86 /*
87 * Print formatted string
88 */
89 #ifdef CONFIG_PRINTK
90 #define PRINT(string) \
91 .set push; \
92 .set reorder; \
93 PTR_LA a0, 8f; \
94 jal printk; \
95 .set pop; \
96 TEXT(string)
97 #else
98 #define PRINT(string)
99 #endif
100
101 #define TEXT(msg) \
102 .pushsection .data; \
103 8: .asciiz msg; \
104 .popsection;
105
106 /*
107 * Stack alignment
108 */
109 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
110 #define ALSZ 7
111 #define ALMASK ~7
112 #endif
113 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
114 #define ALSZ 15
115 #define ALMASK ~15
116 #endif
117
118 /*
119 * Macros to handle different pointer/register sizes for 32/64-bit code
120 */
121
122 /*
123 * Size of a register
124 */
125 #ifdef __mips64
126 #define SZREG 8
127 #else
128 #define SZREG 4
129 #endif
130
131 /*
132 * Use the following macros in assemblercode to load/store registers,
133 * pointers etc.
134 */
135 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
136 #define REG_S sw
137 #define REG_L lw
138 #define REG_SUBU subu
139 #define REG_ADDU addu
140 #endif
141 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
142 #define REG_S sd
143 #define REG_L ld
144 #define REG_SUBU dsubu
145 #define REG_ADDU daddu
146 #endif
147
148 /*
149 * How to add/sub/load/store/shift C int variables.
150 */
151 #if (_MIPS_SZINT == 32)
152 #define INT_ADD add
153 #define INT_ADDU addu
154 #define INT_ADDI addi
155 #define INT_ADDIU addiu
156 #define INT_SUB sub
157 #define INT_SUBU subu
158 #define INT_L lw
159 #define INT_S sw
160 #define INT_SLL sll
161 #define INT_SLLV sllv
162 #define INT_SRL srl
163 #define INT_SRLV srlv
164 #define INT_SRA sra
165 #define INT_SRAV srav
166 #endif
167
168 #if (_MIPS_SZINT == 64)
169 #define INT_ADD dadd
170 #define INT_ADDU daddu
171 #define INT_ADDI daddi
172 #define INT_ADDIU daddiu
173 #define INT_SUB dsub
174 #define INT_SUBU dsubu
175 #define INT_L ld
176 #define INT_S sd
177 #define INT_SLL dsll
178 #define INT_SLLV dsllv
179 #define INT_SRL dsrl
180 #define INT_SRLV dsrlv
181 #define INT_SRA dsra
182 #define INT_SRAV dsrav
183 #endif
184
185 /*
186 * How to add/sub/load/store/shift C long variables.
187 */
188 #if (_MIPS_SZLONG == 32)
189 #define LONG_ADD add
190 #define LONG_ADDU addu
191 #define LONG_ADDI addi
192 #define LONG_ADDIU addiu
193 #define LONG_SUB sub
194 #define LONG_SUBU subu
195 #define LONG_L lw
196 #define LONG_S sw
197 #define LONG_SP swp
198 #define LONG_SLL sll
199 #define LONG_SLLV sllv
200 #define LONG_SRL srl
201 #define LONG_SRLV srlv
202 #define LONG_SRA sra
203 #define LONG_SRAV srav
204
205 #define LONG .word
206 #define LONGSIZE 4
207 #define LONGMASK 3
208 #define LONGLOG 2
209 #endif
210
211 #if (_MIPS_SZLONG == 64)
212 #define LONG_ADD dadd
213 #define LONG_ADDU daddu
214 #define LONG_ADDI daddi
215 #define LONG_ADDIU daddiu
216 #define LONG_SUB dsub
217 #define LONG_SUBU dsubu
218 #define LONG_L ld
219 #define LONG_S sd
220 #define LONG_SP sdp
221 #define LONG_SLL dsll
222 #define LONG_SLLV dsllv
223 #define LONG_SRL dsrl
224 #define LONG_SRLV dsrlv
225 #define LONG_SRA dsra
226 #define LONG_SRAV dsrav
227
228 #define LONG .dword
229 #define LONGSIZE 8
230 #define LONGMASK 7
231 #define LONGLOG 3
232 #endif
233
234 /*
235 * How to add/sub/load/store/shift pointers.
236 */
237 #if (_MIPS_SZPTR == 32)
238 #define PTR_ADD add
239 #define PTR_ADDU addu
240 #define PTR_ADDI addi
241 #define PTR_ADDIU addiu
242 #define PTR_SUB sub
243 #define PTR_SUBU subu
244 #define PTR_L lw
245 #define PTR_S sw
246 #define PTR_LA la
247 #define PTR_LI li
248 #define PTR_SLL sll
249 #define PTR_SLLV sllv
250 #define PTR_SRL srl
251 #define PTR_SRLV srlv
252 #define PTR_SRA sra
253 #define PTR_SRAV srav
254
255 #define PTR_SCALESHIFT 2
256
257 #define PTR .word
258 #define PTRSIZE 4
259 #define PTRLOG 2
260 #endif
261
262 #if (_MIPS_SZPTR == 64)
263 #define PTR_ADD dadd
264 #define PTR_ADDU daddu
265 #define PTR_ADDI daddi
266 #define PTR_ADDIU daddiu
267 #define PTR_SUB dsub
268 #define PTR_SUBU dsubu
269 #define PTR_L ld
270 #define PTR_S sd
271 #define PTR_LA dla
272 #define PTR_LI dli
273 #define PTR_SLL dsll
274 #define PTR_SLLV dsllv
275 #define PTR_SRL dsrl
276 #define PTR_SRLV dsrlv
277 #define PTR_SRA dsra
278 #define PTR_SRAV dsrav
279
280 #define PTR_SCALESHIFT 3
281
282 #define PTR .dword
283 #define PTRSIZE 8
284 #define PTRLOG 3
285 #endif
286
287 /*
288 * Some cp0 registers were extended to 64bit for MIPS III.
289 */
290 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
291 #define MFC0 mfc0
292 #define MTC0 mtc0
293 #endif
294 #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
295 #define MFC0 dmfc0
296 #define MTC0 dmtc0
297 #endif
298
299 #define SSNOP sll zero, zero, 1
300
301 #ifdef CONFIG_SGI_IP28
302 /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
303 #include <asm/cacheops.h>
304 #define R10KCBARRIER(addr) cache Cache_Barrier, addr;
305 #else
306 #define R10KCBARRIER(addr)
307 #endif
308
309 #endif /* __ASM_ASM_H */