arch/mips/include/asm/mach-lantiq/xway/xway_dma.h

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify it
   3  *   under the terms of the GNU General Public License version 2 as published
   4  *   by the Free Software Foundation.
   5  *
   6  *   This program is distributed in the hope that it will be useful,
   7  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  *   GNU General Public License for more details.
  10  *
  11  *   You should have received a copy of the GNU General Public License
  12  *   along with this program; if not, write to the Free Software
  13  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
  14  *
  15  *   Copyright (C) 2011 John Crispin <blogic@openwrt.org>
  16  */
  17
  18 #ifndef LTQ_DMA_H__
  19 #define LTQ_DMA_H__
  20
  21 #define LTQ_DESC_SIZE           0x08    /* each descriptor is 64bit */
  22 #define LTQ_DESC_NUM            0x40    /* 64 descriptors / channel */
  23
  24 #define LTQ_DMA_OWN             BIT(31) /* owner bit */
  25 #define LTQ_DMA_C               BIT(30) /* complete bit */
  26 #define LTQ_DMA_SOP             BIT(29) /* start of packet */
  27 #define LTQ_DMA_EOP             BIT(28) /* end of packet */
  28 #define LTQ_DMA_TX_OFFSET(x)    ((x & 0x1f) << 23) /* data bytes offset */
  29 #define LTQ_DMA_RX_OFFSET(x)    ((x & 0x7) << 23) /* data bytes offset */
  30 #define LTQ_DMA_SIZE_MASK       (0xffff) /* the size field is 16 bit */
  31
  32 struct ltq_dma_desc {
  33         u32 ctl;
  34         u32 addr;
  35 };
  36
  37 struct ltq_dma_channel {
  38         int nr;                         /* the channel number */
  39         int irq;                        /* the mapped irq */
  40         int desc;                       /* the current descriptor */
  41         struct ltq_dma_desc *desc_base; /* the descriptor base */
  42         int phys;                       /* physical addr */
  43 };
  44
  45 enum {
  46         DMA_PORT_ETOP = 0,
  47         DMA_PORT_DEU,
  48 };
  49
  50 extern void ltq_dma_enable_irq(struct ltq_dma_channel *ch);
  51 extern void ltq_dma_disable_irq(struct ltq_dma_channel *ch);
  52 extern void ltq_dma_ack_irq(struct ltq_dma_channel *ch);
  53 extern void ltq_dma_open(struct ltq_dma_channel *ch);
  54 extern void ltq_dma_close(struct ltq_dma_channel *ch);
  55 extern void ltq_dma_alloc_tx(struct ltq_dma_channel *ch);
  56 extern void ltq_dma_alloc_rx(struct ltq_dma_channel *ch);
  57 extern void ltq_dma_free(struct ltq_dma_channel *ch);
  58 extern void ltq_dma_init_port(int p);
  59
  60 #endif