arch/mips/include/asm/mach-pnx833x/irq-mapping.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /*
   4  *  irq.h: IRQ mappings for PNX833X.
   5  *
   6  *  Copyright 2008 NXP Semiconductors
   7  *        Chris Steel <chris.steel@nxp.com>
   8  *    Daniel Laird <daniel.j.laird@nxp.com>
   9  */
  10
  11 #ifndef __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H
  12 #define __ASM_MIPS_MACH_PNX833X_IRQ_MAPPING_H
  13 /*
  14  * The "IRQ numbers" are completely virtual.
  15  *
  16  * In PNX8330/1, we have 48 interrupt lines, numbered from 1 to 48.
  17  * Let's use numbers 1..48 for PIC interrupts, number 0 for timer interrupt,
  18  * numbers 49..64 for (virtual) GPIO interrupts.
  19  *
  20  * In PNX8335, we have 57 interrupt lines, numbered from 1 to 57,
  21  * connected to PIC, which uses core hardware interrupt 2, and also
  22  * a timer interrupt through hardware interrupt 5.
  23  * Let's use numbers 1..64 for PIC interrupts, number 0 for timer interrupt,
  24  * numbers 65..80 for (virtual) GPIO interrupts.
  25  *
  26  */
  27 #include <irq.h>
  28
  29 #define PNX833X_TIMER_IRQ                               (MIPS_CPU_IRQ_BASE + 7)
  30
  31 /* Interrupts supported by PIC */
  32 #define PNX833X_PIC_I2C0_INT                    (PNX833X_PIC_IRQ_BASE +  1)
  33 #define PNX833X_PIC_I2C1_INT                    (PNX833X_PIC_IRQ_BASE +  2)
  34 #define PNX833X_PIC_UART0_INT                   (PNX833X_PIC_IRQ_BASE +  3)
  35 #define PNX833X_PIC_UART1_INT                   (PNX833X_PIC_IRQ_BASE +  4)
  36 #define PNX833X_PIC_TS_IN0_DV_INT               (PNX833X_PIC_IRQ_BASE +  5)
  37 #define PNX833X_PIC_TS_IN0_DMA_INT              (PNX833X_PIC_IRQ_BASE +  6)
  38 #define PNX833X_PIC_GPIO_INT                    (PNX833X_PIC_IRQ_BASE +  7)
  39 #define PNX833X_PIC_AUDIO_DEC_INT               (PNX833X_PIC_IRQ_BASE +  8)
  40 #define PNX833X_PIC_VIDEO_DEC_INT               (PNX833X_PIC_IRQ_BASE +  9)
  41 #define PNX833X_PIC_CONFIG_INT                  (PNX833X_PIC_IRQ_BASE + 10)
  42 #define PNX833X_PIC_AOI_INT                             (PNX833X_PIC_IRQ_BASE + 11)
  43 #define PNX833X_PIC_SYNC_INT                    (PNX833X_PIC_IRQ_BASE + 12)
  44 #define PNX8330_PIC_SPU_INT                             (PNX833X_PIC_IRQ_BASE + 13)
  45 #define PNX8335_PIC_SATA_INT                    (PNX833X_PIC_IRQ_BASE + 13)
  46 #define PNX833X_PIC_OSD_INT                             (PNX833X_PIC_IRQ_BASE + 14)
  47 #define PNX833X_PIC_DISP1_INT                   (PNX833X_PIC_IRQ_BASE + 15)
  48 #define PNX833X_PIC_DEINTERLACER_INT    (PNX833X_PIC_IRQ_BASE + 16)
  49 #define PNX833X_PIC_DISPLAY2_INT                (PNX833X_PIC_IRQ_BASE + 17)
  50 #define PNX833X_PIC_VC_INT                              (PNX833X_PIC_IRQ_BASE + 18)
  51 #define PNX833X_PIC_SC_INT                              (PNX833X_PIC_IRQ_BASE + 19)
  52 #define PNX833X_PIC_IDE_INT                             (PNX833X_PIC_IRQ_BASE + 20)
  53 #define PNX833X_PIC_IDE_DMA_INT                 (PNX833X_PIC_IRQ_BASE + 21)
  54 #define PNX833X_PIC_TS_IN1_DV_INT               (PNX833X_PIC_IRQ_BASE + 22)
  55 #define PNX833X_PIC_TS_IN1_DMA_INT              (PNX833X_PIC_IRQ_BASE + 23)
  56 #define PNX833X_PIC_SGDX_DMA_INT                (PNX833X_PIC_IRQ_BASE + 24)
  57 #define PNX833X_PIC_TS_OUT_INT                  (PNX833X_PIC_IRQ_BASE + 25)
  58 #define PNX833X_PIC_IR_INT                              (PNX833X_PIC_IRQ_BASE + 26)
  59 #define PNX833X_PIC_VMSP1_INT                   (PNX833X_PIC_IRQ_BASE + 27)
  60 #define PNX833X_PIC_VMSP2_INT                   (PNX833X_PIC_IRQ_BASE + 28)
  61 #define PNX833X_PIC_PIBC_INT                    (PNX833X_PIC_IRQ_BASE + 29)
  62 #define PNX833X_PIC_TS_IN0_TRD_INT              (PNX833X_PIC_IRQ_BASE + 30)
  63 #define PNX833X_PIC_SGDX_TPD_INT                (PNX833X_PIC_IRQ_BASE + 31)
  64 #define PNX833X_PIC_USB_INT                             (PNX833X_PIC_IRQ_BASE + 32)
  65 #define PNX833X_PIC_TS_IN1_TRD_INT              (PNX833X_PIC_IRQ_BASE + 33)
  66 #define PNX833X_PIC_CLOCK_INT                   (PNX833X_PIC_IRQ_BASE + 34)
  67 #define PNX833X_PIC_SGDX_PARSER_INT             (PNX833X_PIC_IRQ_BASE + 35)
  68 #define PNX833X_PIC_VMSP_DMA_INT                (PNX833X_PIC_IRQ_BASE + 36)
  69
  70 #if defined(CONFIG_SOC_PNX8335)
  71 #define PNX8335_PIC_MIU_INT                                     (PNX833X_PIC_IRQ_BASE + 37)
  72 #define PNX8335_PIC_AVCHIP_IRQ_INT                      (PNX833X_PIC_IRQ_BASE + 38)
  73 #define PNX8335_PIC_SYNC_HD_INT                         (PNX833X_PIC_IRQ_BASE + 39)
  74 #define PNX8335_PIC_DISP_HD_INT                         (PNX833X_PIC_IRQ_BASE + 40)
  75 #define PNX8335_PIC_DISP_SCALER_INT                     (PNX833X_PIC_IRQ_BASE + 41)
  76 #define PNX8335_PIC_OSD_HD1_INT                         (PNX833X_PIC_IRQ_BASE + 42)
  77 #define PNX8335_PIC_DTL_WRITER_Y_INT            (PNX833X_PIC_IRQ_BASE + 43)
  78 #define PNX8335_PIC_DTL_WRITER_C_INT            (PNX833X_PIC_IRQ_BASE + 44)
  79 #define PNX8335_PIC_DTL_EMULATOR_Y_IR_INT       (PNX833X_PIC_IRQ_BASE + 45)
  80 #define PNX8335_PIC_DTL_EMULATOR_C_IR_INT       (PNX833X_PIC_IRQ_BASE + 46)
  81 #define PNX8335_PIC_DENC_TTX_INT                        (PNX833X_PIC_IRQ_BASE + 47)
  82 #define PNX8335_PIC_MMI_SIF0_INT                        (PNX833X_PIC_IRQ_BASE + 48)
  83 #define PNX8335_PIC_MMI_SIF1_INT                        (PNX833X_PIC_IRQ_BASE + 49)
  84 #define PNX8335_PIC_MMI_CDMMU_INT                       (PNX833X_PIC_IRQ_BASE + 50)
  85 #define PNX8335_PIC_PIBCS_INT                           (PNX833X_PIC_IRQ_BASE + 51)
  86 #define PNX8335_PIC_ETHERNET_INT                        (PNX833X_PIC_IRQ_BASE + 52)
  87 #define PNX8335_PIC_VMSP1_0_INT                         (PNX833X_PIC_IRQ_BASE + 53)
  88 #define PNX8335_PIC_VMSP1_1_INT                         (PNX833X_PIC_IRQ_BASE + 54)
  89 #define PNX8335_PIC_VMSP1_DMA_INT                       (PNX833X_PIC_IRQ_BASE + 55)
  90 #define PNX8335_PIC_TDGR_DE_INT                         (PNX833X_PIC_IRQ_BASE + 56)
  91 #define PNX8335_PIC_IR1_IRQ_INT                         (PNX833X_PIC_IRQ_BASE + 57)
  92 #endif
  93
  94 /* GPIO interrupts */
  95 #define PNX833X_GPIO_0_INT                      (PNX833X_GPIO_IRQ_BASE +  0)
  96 #define PNX833X_GPIO_1_INT                      (PNX833X_GPIO_IRQ_BASE +  1)
  97 #define PNX833X_GPIO_2_INT                      (PNX833X_GPIO_IRQ_BASE +  2)
  98 #define PNX833X_GPIO_3_INT                      (PNX833X_GPIO_IRQ_BASE +  3)
  99 #define PNX833X_GPIO_4_INT                      (PNX833X_GPIO_IRQ_BASE +  4)
 100 #define PNX833X_GPIO_5_INT                      (PNX833X_GPIO_IRQ_BASE +  5)
 101 #define PNX833X_GPIO_6_INT                      (PNX833X_GPIO_IRQ_BASE +  6)
 102 #define PNX833X_GPIO_7_INT                      (PNX833X_GPIO_IRQ_BASE +  7)
 103 #define PNX833X_GPIO_8_INT                      (PNX833X_GPIO_IRQ_BASE +  8)
 104 #define PNX833X_GPIO_9_INT                      (PNX833X_GPIO_IRQ_BASE +  9)
 105 #define PNX833X_GPIO_10_INT                     (PNX833X_GPIO_IRQ_BASE + 10)
 106 #define PNX833X_GPIO_11_INT                     (PNX833X_GPIO_IRQ_BASE + 11)
 107 #define PNX833X_GPIO_12_INT                     (PNX833X_GPIO_IRQ_BASE + 12)
 108 #define PNX833X_GPIO_13_INT                     (PNX833X_GPIO_IRQ_BASE + 13)
 109 #define PNX833X_GPIO_14_INT                     (PNX833X_GPIO_IRQ_BASE + 14)
 110 #define PNX833X_GPIO_15_INT                     (PNX833X_GPIO_IRQ_BASE + 15)
 111
 112 #endif