arch/mips/include/asm/tlbex.h

   1 #ifndef __ASM_TLBEX_H
   2 #define __ASM_TLBEX_H
   3
   4 #include <asm/uasm.h>
   5
   6 /*
   7  * Write random or indexed TLB entry, and care about the hazards from
   8  * the preceding mtc0 and for the following eret.
   9  */
  10 enum tlb_write_entry {
  11         tlb_random,
  12         tlb_indexed
  13 };
  14
  15 extern int pgd_reg;
  16
  17 void build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r,
  18                       unsigned int tmp, unsigned int ptr);
  19 void build_get_pgde32(u32 **p, unsigned int tmp, unsigned int ptr);
  20 void build_get_ptep(u32 **p, unsigned int tmp, unsigned int ptr);
  21 void build_update_entries(u32 **p, unsigned int tmp, unsigned int ptep);
  22 void build_tlb_write_entry(u32 **p, struct uasm_label **l,
  23                            struct uasm_reloc **r,
  24                            enum tlb_write_entry wmode);
  25
  26 #endif /* __ASM_TLBEX_H */