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1 /*
2 * Mips Jazz DMA controller support
3 * Copyright (C) 1995, 1996 by Andreas Busse
4 *
5 * NOTE: Some of the argument checking could be removed when
6 * things have settled down. Also, instead of returning 0xffffffff
7 * on failure of vdma_alloc() one could leave page #0 unused
8 * and return the more usual NULL pointer as logical address.
9 */
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/errno.h>
14 #include <linux/mm.h>
15 #include <linux/bootmem.h>
16 #include <linux/spinlock.h>
17 #include <asm/mipsregs.h>
18 #include <asm/jazz.h>
19 #include <asm/io.h>
20 #include <asm/uaccess.h>
21 #include <asm/dma.h>
22 #include <asm/jazzdma.h>
23 #include <asm/pgtable.h>
24
25 /*
26 * Set this to one to enable additional vdma debug code.
27 */
28 #define CONF_DEBUG_VDMA 0
29
30 static unsigned long vdma_pagetable_start;
31
32 static DEFINE_SPINLOCK(vdma_lock);
33
34 /*
35 * Debug stuff
36 */
37 #define vdma_debug ((CONF_DEBUG_VDMA) ? debuglvl : 0)
38
39 static int debuglvl = 3;
40
41 /*
42 * Initialize the pagetable with a one-to-one mapping of
43 * the first 16 Mbytes of main memory and declare all
44 * entries to be unused. Using this method will at least
45 * allow some early device driver operations to work.
46 */
47 static inline void vdma_pgtbl_init(void)
48 {
49 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
50 unsigned long paddr = 0;
51 int i;
52
53 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
54 pgtbl[i].frame = paddr;
55 pgtbl[i].owner = VDMA_PAGE_EMPTY;
56 paddr += VDMA_PAGESIZE;
57 }
58 }
59
60 /*
61 * Initialize the Jazz R4030 dma controller
62 */
63 void __init vdma_init(void)
64 {
65 /*
66 * Allocate 32k of memory for DMA page tables. This needs to be page
67 * aligned and should be uncached to avoid cache flushing after every
68 * update.
69 */
70 vdma_pagetable_start = alloc_bootmem_low_pages(VDMA_PGTBL_SIZE);
71 if (!vdma_pagetable_start)
72 BUG();
73 dma_cache_wback_inv(vdma_pagetable_start, VDMA_PGTBL_SIZE);
74 vdma_pagetable_start = KSEG1ADDR(vdma_pagetable_start);
75
76 /*
77 * Clear the R4030 translation table
78 */
79 vdma_pgtbl_init();
80
81 r4030_write_reg32(JAZZ_R4030_TRSTBL_BASE,
82 CPHYSADDR(vdma_pagetable_start));
83 r4030_write_reg32(JAZZ_R4030_TRSTBL_LIM, VDMA_PGTBL_SIZE);
84 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
85
86 printk("VDMA: R4030 DMA pagetables initialized.\n");
87 }
88
89 /*
90 * Allocate DMA pagetables using a simple first-fit algorithm
91 */
92 unsigned long vdma_alloc(unsigned long paddr, unsigned long size)
93 {
94 VDMA_PGTBL_ENTRY *entry = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
95 int first, last, pages, frame, i;
96 unsigned long laddr, flags;
97
98 /* check arguments */
99
100 if (paddr > 0x1fffffff) {
101 if (vdma_debug)
102 printk("vdma_alloc: Invalid physical address: %08lx\n",
103 paddr);
104 return VDMA_ERROR; /* invalid physical address */
105 }
106 if (size > 0x400000 || size == 0) {
107 if (vdma_debug)
108 printk("vdma_alloc: Invalid size: %08lx\n", size);
109 return VDMA_ERROR; /* invalid physical address */
110 }
111
112 spin_lock_irqsave(&vdma_lock, flags);
113 /*
114 * Find free chunk
115 */
116 pages = (size + 4095) >> 12; /* no. of pages to allocate */
117 first = 0;
118 while (1) {
119 while (entry[first].owner != VDMA_PAGE_EMPTY &&
120 first < VDMA_PGTBL_ENTRIES) first++;
121 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */
122 spin_unlock_irqrestore(&vdma_lock, flags);
123 return VDMA_ERROR;
124 }
125
126 last = first + 1;
127 while (entry[last].owner == VDMA_PAGE_EMPTY
128 && last - first < pages)
129 last++;
130
131 if (last - first == pages)
132 break; /* found */
133 }
134
135 /*
136 * Mark pages as allocated
137 */
138 laddr = (first << 12) + (paddr & (VDMA_PAGESIZE - 1));
139 frame = paddr & ~(VDMA_PAGESIZE - 1);
140
141 for (i = first; i < last; i++) {
142 entry[i].frame = frame;
143 entry[i].owner = laddr;
144 frame += VDMA_PAGESIZE;
145 }
146
147 /*
148 * Update translation table and return logical start address
149 */
150 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
151
152 if (vdma_debug > 1)
153 printk("vdma_alloc: Allocated %d pages starting from %08lx\n",
154 pages, laddr);
155
156 if (vdma_debug > 2) {
157 printk("LADDR: ");
158 for (i = first; i < last; i++)
159 printk("%08x ", i << 12);
160 printk("\nPADDR: ");
161 for (i = first; i < last; i++)
162 printk("%08x ", entry[i].frame);
163 printk("\nOWNER: ");
164 for (i = first; i < last; i++)
165 printk("%08x ", entry[i].owner);
166 printk("\n");
167 }
168
169 spin_unlock_irqrestore(&vdma_lock, flags);
170
171 return laddr;
172 }
173
174 EXPORT_SYMBOL(vdma_alloc);
175
176 /*
177 * Free previously allocated dma translation pages
178 * Note that this does NOT change the translation table,
179 * it just marks the free'd pages as unused!
180 */
181 int vdma_free(unsigned long laddr)
182 {
183 VDMA_PGTBL_ENTRY *pgtbl = (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
184 int i;
185
186 i = laddr >> 12;
187
188 if (pgtbl[i].owner != laddr) {
189 printk
190 ("vdma_free: trying to free other's dma pages, laddr=%8lx\n",
191 laddr);
192 return -1;
193 }
194
195 while (pgtbl[i].owner == laddr && i < VDMA_PGTBL_ENTRIES) {
196 pgtbl[i].owner = VDMA_PAGE_EMPTY;
197 i++;
198 }
199
200 if (vdma_debug > 1)
201 printk("vdma_free: freed %ld pages starting from %08lx\n",
202 i - (laddr >> 12), laddr);
203
204 return 0;
205 }
206
207 EXPORT_SYMBOL(vdma_free);
208
209 /*
210 * Map certain page(s) to another physical address.
211 * Caller must have allocated the page(s) before.
212 */
213 int vdma_remap(unsigned long laddr, unsigned long paddr, unsigned long size)
214 {
215 VDMA_PGTBL_ENTRY *pgtbl =
216 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
217 int first, pages, npages;
218
219 if (laddr > 0xffffff) {
220 if (vdma_debug)
221 printk
222 ("vdma_map: Invalid logical address: %08lx\n",
223 laddr);
224 return -EINVAL; /* invalid logical address */
225 }
226 if (paddr > 0x1fffffff) {
227 if (vdma_debug)
228 printk
229 ("vdma_map: Invalid physical address: %08lx\n",
230 paddr);
231 return -EINVAL; /* invalid physical address */
232 }
233
234 npages = pages =
235 (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
236 first = laddr >> 12;
237 if (vdma_debug)
238 printk("vdma_remap: first=%x, pages=%x\n", first, pages);
239 if (first + pages > VDMA_PGTBL_ENTRIES) {
240 if (vdma_debug)
241 printk("vdma_alloc: Invalid size: %08lx\n", size);
242 return -EINVAL;
243 }
244
245 paddr &= ~(VDMA_PAGESIZE - 1);
246 while (pages > 0 && first < VDMA_PGTBL_ENTRIES) {
247 if (pgtbl[first].owner != laddr) {
248 if (vdma_debug)
249 printk("Trying to remap other's pages.\n");
250 return -EPERM; /* not owner */
251 }
252 pgtbl[first].frame = paddr;
253 paddr += VDMA_PAGESIZE;
254 first++;
255 pages--;
256 }
257
258 /*
259 * Update translation table
260 */
261 r4030_write_reg32(JAZZ_R4030_TRSTBL_INV, 0);
262
263 if (vdma_debug > 2) {
264 int i;
265 pages = (((paddr & (VDMA_PAGESIZE - 1)) + size) >> 12) + 1;
266 first = laddr >> 12;
267 printk("LADDR: ");
268 for (i = first; i < first + pages; i++)
269 printk("%08x ", i << 12);
270 printk("\nPADDR: ");
271 for (i = first; i < first + pages; i++)
272 printk("%08x ", pgtbl[i].frame);
273 printk("\nOWNER: ");
274 for (i = first; i < first + pages; i++)
275 printk("%08x ", pgtbl[i].owner);
276 printk("\n");
277 }
278
279 return 0;
280 }
281
282 /*
283 * Translate a physical address to a logical address.
284 * This will return the logical address of the first
285 * match.
286 */
287 unsigned long vdma_phys2log(unsigned long paddr)
288 {
289 int i;
290 int frame;
291 VDMA_PGTBL_ENTRY *pgtbl =
292 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
293
294 frame = paddr & ~(VDMA_PAGESIZE - 1);
295
296 for (i = 0; i < VDMA_PGTBL_ENTRIES; i++) {
297 if (pgtbl[i].frame == frame)
298 break;
299 }
300
301 if (i == VDMA_PGTBL_ENTRIES)
302 return ~0UL;
303
304 return (i << 12) + (paddr & (VDMA_PAGESIZE - 1));
305 }
306
307 EXPORT_SYMBOL(vdma_phys2log);
308
309 /*
310 * Translate a logical DMA address to a physical address
311 */
312 unsigned long vdma_log2phys(unsigned long laddr)
313 {
314 VDMA_PGTBL_ENTRY *pgtbl =
315 (VDMA_PGTBL_ENTRY *) vdma_pagetable_start;
316
317 return pgtbl[laddr >> 12].frame + (laddr & (VDMA_PAGESIZE - 1));
318 }
319
320 EXPORT_SYMBOL(vdma_log2phys);
321
322 /*
323 * Print DMA statistics
324 */
325 void vdma_stats(void)
326 {
327 int i;
328
329 printk("vdma_stats: CONFIG: %08x\n",
330 r4030_read_reg32(JAZZ_R4030_CONFIG));
331 printk("R4030 translation table base: %08x\n",
332 r4030_read_reg32(JAZZ_R4030_TRSTBL_BASE));
333 printk("R4030 translation table limit: %08x\n",
334 r4030_read_reg32(JAZZ_R4030_TRSTBL_LIM));
335 printk("vdma_stats: INV_ADDR: %08x\n",
336 r4030_read_reg32(JAZZ_R4030_INV_ADDR));
337 printk("vdma_stats: R_FAIL_ADDR: %08x\n",
338 r4030_read_reg32(JAZZ_R4030_R_FAIL_ADDR));
339 printk("vdma_stats: M_FAIL_ADDR: %08x\n",
340 r4030_read_reg32(JAZZ_R4030_M_FAIL_ADDR));
341 printk("vdma_stats: IRQ_SOURCE: %08x\n",
342 r4030_read_reg32(JAZZ_R4030_IRQ_SOURCE));
343 printk("vdma_stats: I386_ERROR: %08x\n",
344 r4030_read_reg32(JAZZ_R4030_I386_ERROR));
345 printk("vdma_chnl_modes: ");
346 for (i = 0; i < 8; i++)
347 printk("%04x ",
348 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
349 (i << 5)));
350 printk("\n");
351 printk("vdma_chnl_enables: ");
352 for (i = 0; i < 8; i++)
353 printk("%04x ",
354 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
355 (i << 5)));
356 printk("\n");
357 }
358
359 /*
360 * DMA transfer functions
361 */
362
363 /*
364 * Enable a DMA channel. Also clear any error conditions.
365 */
366 void vdma_enable(int channel)
367 {
368 int status;
369
370 if (vdma_debug)
371 printk("vdma_enable: channel %d\n", channel);
372
373 /*
374 * Check error conditions first
375 */
376 status = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
377 if (status & 0x400)
378 printk("VDMA: Channel %d: Address error!\n", channel);
379 if (status & 0x200)
380 printk("VDMA: Channel %d: Memory error!\n", channel);
381
382 /*
383 * Clear all interrupt flags
384 */
385 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
386 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
387 (channel << 5)) | R4030_TC_INTR
388 | R4030_MEM_INTR | R4030_ADDR_INTR);
389
390 /*
391 * Enable the desired channel
392 */
393 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
394 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
395 (channel << 5)) |
396 R4030_CHNL_ENABLE);
397 }
398
399 EXPORT_SYMBOL(vdma_enable);
400
401 /*
402 * Disable a DMA channel
403 */
404 void vdma_disable(int channel)
405 {
406 if (vdma_debug) {
407 int status =
408 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
409 (channel << 5));
410
411 printk("vdma_disable: channel %d\n", channel);
412 printk("VDMA: channel %d status: %04x (%s) mode: "
413 "%02x addr: %06x count: %06x\n",
414 channel, status,
415 ((status & 0x600) ? "ERROR" : "OK"),
416 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_MODE +
417 (channel << 5)),
418 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_ADDR +
419 (channel << 5)),
420 (unsigned) r4030_read_reg32(JAZZ_R4030_CHNL_COUNT +
421 (channel << 5)));
422 }
423
424 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
425 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
426 (channel << 5)) &
427 ~R4030_CHNL_ENABLE);
428
429 /*
430 * After disabling a DMA channel a remote bus register should be
431 * read to ensure that the current DMA acknowledge cycle is completed.
432 */
433 *((volatile unsigned int *) JAZZ_DUMMY_DEVICE);
434 }
435
436 EXPORT_SYMBOL(vdma_disable);
437
438 /*
439 * Set DMA mode. This function accepts the mode values used
440 * to set a PC-style DMA controller. For the SCSI and FDC
441 * channels, we also set the default modes each time we're
442 * called.
443 * NOTE: The FAST and BURST dma modes are supported by the
444 * R4030 Rev. 2 and PICA chipsets only. I leave them disabled
445 * for now.
446 */
447 void vdma_set_mode(int channel, int mode)
448 {
449 if (vdma_debug)
450 printk("vdma_set_mode: channel %d, mode 0x%x\n", channel,
451 mode);
452
453 switch (channel) {
454 case JAZZ_SCSI_DMA: /* scsi */
455 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
456 /* R4030_MODE_FAST | */
457 /* R4030_MODE_BURST | */
458 R4030_MODE_INTR_EN |
459 R4030_MODE_WIDTH_16 |
460 R4030_MODE_ATIME_80);
461 break;
462
463 case JAZZ_FLOPPY_DMA: /* floppy */
464 r4030_write_reg32(JAZZ_R4030_CHNL_MODE + (channel << 5),
465 /* R4030_MODE_FAST | */
466 /* R4030_MODE_BURST | */
467 R4030_MODE_INTR_EN |
468 R4030_MODE_WIDTH_8 |
469 R4030_MODE_ATIME_120);
470 break;
471
472 case JAZZ_AUDIOL_DMA:
473 case JAZZ_AUDIOR_DMA:
474 printk("VDMA: Audio DMA not supported yet.\n");
475 break;
476
477 default:
478 printk
479 ("VDMA: vdma_set_mode() called with unsupported channel %d!\n",
480 channel);
481 }
482
483 switch (mode) {
484 case DMA_MODE_READ:
485 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
486 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
487 (channel << 5)) &
488 ~R4030_CHNL_WRITE);
489 break;
490
491 case DMA_MODE_WRITE:
492 r4030_write_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5),
493 r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE +
494 (channel << 5)) |
495 R4030_CHNL_WRITE);
496 break;
497
498 default:
499 printk
500 ("VDMA: vdma_set_mode() called with unknown dma mode 0x%x\n",
501 mode);
502 }
503 }
504
505 EXPORT_SYMBOL(vdma_set_mode);
506
507 /*
508 * Set Transfer Address
509 */
510 void vdma_set_addr(int channel, long addr)
511 {
512 if (vdma_debug)
513 printk("vdma_set_addr: channel %d, addr %lx\n", channel,
514 addr);
515
516 r4030_write_reg32(JAZZ_R4030_CHNL_ADDR + (channel << 5), addr);
517 }
518
519 EXPORT_SYMBOL(vdma_set_addr);
520
521 /*
522 * Set Transfer Count
523 */
524 void vdma_set_count(int channel, int count)
525 {
526 if (vdma_debug)
527 printk("vdma_set_count: channel %d, count %08x\n", channel,
528 (unsigned) count);
529
530 r4030_write_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5), count);
531 }
532
533 EXPORT_SYMBOL(vdma_set_count);
534
535 /*
536 * Get Residual
537 */
538 int vdma_get_residue(int channel)
539 {
540 int residual;
541
542 residual = r4030_read_reg32(JAZZ_R4030_CHNL_COUNT + (channel << 5));
543
544 if (vdma_debug)
545 printk("vdma_get_residual: channel %d: residual=%d\n",
546 channel, residual);
547
548 return residual;
549 }
550
551 /*
552 * Get DMA channel enable register
553 */
554 int vdma_get_enable(int channel)
555 {
556 int enable;
557
558 enable = r4030_read_reg32(JAZZ_R4030_CHNL_ENABLE + (channel << 5));
559
560 if (vdma_debug)
561 printk("vdma_get_enable: channel %d: enable=%d\n", channel,
562 enable);
563
564 return enable;
565 }