arch/mips/kernel/head.S

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 1994, 1995 Waldorf Electronics
   7  * Written by Ralf Baechle and Andreas Busse
   8  * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 Ralf Baechle
   9  * Copyright (C) 1996 Paul M. Antoine
  10  * Modified for DECStation and hence R3000 support by Paul M. Antoine
  11  * Further modifications by David S. Miller and Harald Koerfgen
  12  * Copyright (C) 1999 Silicon Graphics, Inc.
  13  * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  14  * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
  15  */
  16 #include <linux/config.h>
  17 #include <linux/init.h>
  18 #include <linux/threads.h>
  19
  20 #include <asm/asm.h>
  21 #include <asm/regdef.h>
  22 #include <asm/page.h>
  23 #include <asm/mipsregs.h>
  24 #include <asm/stackframe.h>
  25 #ifdef CONFIG_SGI_IP27
  26 #include <asm/sn/addrs.h>
  27 #include <asm/sn/sn0/hubni.h>
  28 #include <asm/sn/klkernvars.h>
  29 #endif
  30
  31         .macro  ARC64_TWIDDLE_PC
  32 #if defined(CONFIG_ARC64) || defined(CONFIG_MAPPED_KERNEL)
  33         /* We get launched at a XKPHYS address but the kernel is linked to
  34            run at a KSEG0 address, so jump there.  */
  35         PTR_LA  t0, \@f
  36         jr      t0
  37 \@:
  38 #endif
  39         .endm
  40
  41 #ifdef CONFIG_SGI_IP27
  42         /*
  43          * outputs the local nasid into res.  IP27 stuff.
  44          */
  45         .macro GET_NASID_ASM res
  46         dli     \res, LOCAL_HUB_ADDR(NI_STATUS_REV_ID)
  47         ld      \res, (\res)
  48         and     \res, NSRI_NODEID_MASK
  49         dsrl    \res, NSRI_NODEID_SHFT
  50         .endm
  51 #endif /* CONFIG_SGI_IP27 */
  52
  53         /*
  54          * inputs are the text nasid in t1, data nasid in t2.
  55          */
  56         .macro MAPPED_KERNEL_SETUP_TLB
  57 #ifdef CONFIG_MAPPED_KERNEL
  58         /*
  59          * This needs to read the nasid - assume 0 for now.
  60          * Drop in 0xffffffffc0000000 in tlbhi, 0+VG in tlblo_0,
  61          * 0+DVG in tlblo_1.
  62          */
  63         dli     t0, 0xffffffffc0000000
  64         dmtc0   t0, CP0_ENTRYHI
  65         li      t0, 0x1c000             # Offset of text into node memory
  66         dsll    t1, NASID_SHFT          # Shift text nasid into place
  67         dsll    t2, NASID_SHFT          # Same for data nasid
  68         or      t1, t1, t0              # Physical load address of kernel text
  69         or      t2, t2, t0              # Physical load address of kernel data
  70         dsrl    t1, 12                  # 4K pfn
  71         dsrl    t2, 12                  # 4K pfn
  72         dsll    t1, 6                   # Get pfn into place
  73         dsll    t2, 6                   # Get pfn into place
  74         li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _CACHE_CACHABLE_COW) >> 6)
  75         or      t0, t0, t1
  76         mtc0    t0, CP0_ENTRYLO0        # physaddr, VG, cach exlwr
  77         li      t0, ((_PAGE_GLOBAL|_PAGE_VALID| _PAGE_DIRTY|_CACHE_CACHABLE_COW) >> 6)
  78         or      t0, t0, t2
  79         mtc0    t0, CP0_ENTRYLO1        # physaddr, DVG, cach exlwr
  80         li      t0, 0x1ffe000           # MAPPED_KERN_TLBMASK, TLBPGMASK_16M
  81         mtc0    t0, CP0_PAGEMASK
  82         li      t0, 0                   # KMAP_INX
  83         mtc0    t0, CP0_INDEX
  84         li      t0, 1
  85         mtc0    t0, CP0_WIRED
  86         tlbwi
  87 #else
  88         mtc0    zero, CP0_WIRED
  89 #endif
  90         .endm
  91
  92         /*
  93          * For the moment disable interrupts, mark the kernel mode and
  94          * set ST0_KX so that the CPU does not spit fire when using
  95          * 64-bit addresses.  A full initialization of the CPU's status
  96          * register is done later in per_cpu_trap_init().
  97          */
  98         .macro  setup_c0_status set clr
  99         .set    push
 100         mfc0    t0, CP0_STATUS
 101         or      t0, ST0_CU0|\set|0x1f|\clr
 102         xor     t0, 0x1f|\clr
 103         mtc0    t0, CP0_STATUS
 104         .set    noreorder
 105         sll     zero,3                          # ehb
 106         .set    pop
 107         .endm
 108
 109         .macro  setup_c0_status_pri
 110 #ifdef CONFIG_MIPS64
 111         setup_c0_status ST0_KX 0
 112 #else
 113         setup_c0_status 0 0
 114 #endif
 115         .endm
 116
 117         .macro  setup_c0_status_sec
 118 #ifdef CONFIG_MIPS64
 119         setup_c0_status ST0_KX ST0_BEV
 120 #else
 121         setup_c0_status 0 ST0_BEV
 122 #endif
 123         .endm
 124
 125         /*
 126          * Reserved space for exception handlers.
 127          * Necessary for machines which link their kernels at KSEG0.
 128          */
 129         .fill   0x400
 130
 131 EXPORT(stext)                                   # used for profiling
 132 EXPORT(_stext)
 133
 134         __INIT
 135
 136 NESTED(kernel_entry, 16, sp)                    # kernel entry point
 137         setup_c0_status_pri
 138
 139 #ifdef CONFIG_SGI_IP27
 140         GET_NASID_ASM   t1
 141         move    t2, t1                          # text and data are here
 142         MAPPED_KERNEL_SETUP_TLB
 143 #endif /* IP27 */
 144
 145         ARC64_TWIDDLE_PC
 146
 147         PTR_LA          t0, __bss_start         # clear .bss
 148         LONG_S          zero, (t0)
 149         PTR_LA          t1, __bss_stop - LONGSIZE
 150 1:
 151         PTR_ADDIU       t0, LONGSIZE
 152         LONG_S          zero, (t0)
 153         bne             t0, t1, 1b
 154
 155         LONG_S          a0, fw_arg0             # firmware arguments
 156         LONG_S          a1, fw_arg1
 157         LONG_S          a2, fw_arg2
 158         LONG_S          a3, fw_arg3
 159
 160         PTR_LA          $28, init_thread_union
 161         PTR_ADDIU       sp, $28, _THREAD_SIZE - 32
 162         set_saved_sp    sp, t0, t1
 163         PTR_SUBU        sp, 4 * SZREG           # init stack pointer
 164
 165         j               start_kernel
 166         END(kernel_entry)
 167
 168 #ifdef CONFIG_SMP
 169 /*
 170  * SMP slave cpus entry point.  Board specific code for bootstrap calls this
 171  * function after setting up the stack and gp registers.
 172  */
 173 NESTED(smp_bootstrap, 16, sp)
 174         setup_c0_status_sec
 175
 176 #ifdef CONFIG_SGI_IP27
 177         GET_NASID_ASM   t1
 178         dli     t0, KLDIR_OFFSET + (KLI_KERN_VARS * KLDIR_ENT_SIZE) + \
 179                     KLDIR_OFF_POINTER + CAC_BASE
 180         dsll    t1, NASID_SHFT
 181         or      t0, t0, t1
 182         ld      t0, 0(t0)                       # t0 points to kern_vars struct
 183         lh      t1, KV_RO_NASID_OFFSET(t0)
 184         lh      t2, KV_RW_NASID_OFFSET(t0)
 185         MAPPED_KERNEL_SETUP_TLB
 186         ARC64_TWIDDLE_PC
 187 #endif /* CONFIG_SGI_IP27 */
 188
 189         j       start_secondary
 190         END(smp_bootstrap)
 191 #endif /* CONFIG_SMP */
 192
 193         __FINIT
 194
 195         .comm   kernelsp,    NR_CPUS * 8, 8
 196         .comm   pgd_current, NR_CPUS * 8, 8
 197
 198         .comm   fw_arg0, SZREG, SZREG           # firmware arguments
 199         .comm   fw_arg1, SZREG, SZREG
 200         .comm   fw_arg2, SZREG, SZREG
 201         .comm   fw_arg3, SZREG, SZREG
 202
 203         .macro  page name, order=0
 204         .globl  \name
 205 \name:  .size   \name, (_PAGE_SIZE << \order)
 206         .org    . + (_PAGE_SIZE << \order)
 207         .type   \name, @object
 208         .endm
 209
 210         .data
 211         .align  PAGE_SHIFT
 212
 213         /*
 214          * ... but on 64-bit we've got three-level pagetables with a
 215          * slightly different layout ...
 216          */
 217         page    swapper_pg_dir, _PGD_ORDER
 218 #ifdef CONFIG_MIPS64
 219         page    invalid_pmd_table, _PMD_ORDER
 220 #endif
 221         page    invalid_pte_table, _PTE_ORDER